Transfer Head for Transferring Micro Element and Transferring Method of Micro Element

    公开(公告)号:US20210125847A1

    公开(公告)日:2021-04-29

    申请号:US17139976

    申请日:2020-12-31

    Abstract: A method of making a transfer head for transferring micro elements, wherein the transfer head includes a cavity with a plurality of vacuum paths and a suite having arrayed suction nozzles and vacuum paths. The suction nozzles are connected to the vacuum path components respectively, and the vacuum path components are formed to connect to vacuum paths in the cavity respectively. The suction nozzles attract or release the micro element through vacuum pressure transmitted by vacuum. When the suite is mounted in the cavity, the upper surface of the suite is arranged with optical switching components for controlling the switch of the vacuum path components and vacuum paths of each path so that the suction nozzles can attract or release required micro element through vacuum pressure; and fabricating a suite with an array micro-hole structure, wherein the array micro-hole structure serves as the vacuum path components and the suction nozzles.

    Eutectic Electrode Structure of Flip-chip LED Chip and Flip-chip LED Chip

    公开(公告)号:US20190267528A1

    公开(公告)日:2019-08-29

    申请号:US16409090

    申请日:2019-05-10

    Abstract: A flip-chip LED chip includes: a substrate; a first semiconductor layer; a light emitting layer; a second semiconductor layer; a local defect region over part of the second semiconductor layer and extending downward to the first semiconductor layer; first and second metal layers respectively over portions of the first and second semiconductor layers; an insulating layer covering the first and second metal layers, the second and first semiconductor layers in the local defect region. The insulating layer has opening structures over the first and second metal layers respectively; a eutectic electrode structure over the insulating layer with openings and including first and second eutectic layers from bottom up at a vertical direction, and including first-type and second-type electrode regions at a horizontal direction. The second eutectic layer does not overlap with the first and second metal layers at the vertical direction.

    Eutectic Electrode Structure of Flip-chip LED Chip and Flip-chip LED Chip

    公开(公告)号:US20230088776A1

    公开(公告)日:2023-03-23

    申请号:US17806497

    申请日:2022-06-12

    Abstract: A light emitting diode includes: a light emitting layer arranged on at least part of a first semiconductor layer, and a second semiconductor layer; a local defect region over a portion of the second semiconductor layer and extending downward to the first semiconductor layer; a metal layer over a portion of the second semiconductor layer; an insulating layer covering the metal layer, the second and first semiconductor layers in the local defect region, with opening structures over the local defect region and the metal layer, respectively; and an electrode structure over the insulating layer and having a first layer and a second layer, and including a first-type electrode region and a second-type electrode region; wherein an upper surface and a lower surface of the first layer are not flat, and a lower surface of the second layer are both flat.

    Eutectic Electrode Structure of Flip-chip LED Chip and Flip-chip LED Chip

    公开(公告)号:US20200313059A1

    公开(公告)日:2020-10-01

    申请号:US16900538

    申请日:2020-06-12

    Abstract: A light emitting diode includes: a light emitting structure including a first semiconductor layer, a light emitting layer, a second semiconductor layer; a first metal layer arranged on at least a portion of the first semiconductor layer and in contact with the first semiconductor layer; and an electrode layer arranged over the light emitting structure, and having a first electrode layer and a second electrode layer. The first electrode layer is electrically coupled to the first and second semiconductor layers; the second electrode layer is configured for bonding with a package substrate, and includes a first and second bonding regions; the first bonding region is electrically coupled to the first semiconductor layer; the second bonding region is electrically coupled to the second semiconductor layer; and the first metal layer is not overlapped with the first bonding region of the second bonding region in a vertical direction.

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