-
公开(公告)号:US20120119220A1
公开(公告)日:2012-05-17
申请号:US13355108
申请日:2012-01-20
申请人: Yih-Der Guo , Suh-Fang Lin , Wei-Hung Kuo , Po-Chun Liu , Tung-Wei Chi , Chu-Li Chao , Jenq-Dar Tsay
发明人: Yih-Der Guo , Suh-Fang Lin , Wei-Hung Kuo , Po-Chun Liu , Tung-Wei Chi , Chu-Li Chao , Jenq-Dar Tsay
IPC分类号: H01L29/20
CPC分类号: C30B25/02 , C23C14/0005 , C23C14/021 , C23C14/0617 , C23C16/01 , C23C16/0227 , C23C16/303 , C30B29/403 , H01L21/0237 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L21/0265 , H01L21/02664 , H01L33/0079 , H01S2304/12
摘要: A nitride semiconductor substrate includes an epitaxy substrate, a patterned nitride semiconductor pillar layer, a nitride semiconductor layer, and a mask layer is provided. The nitride semiconductor pillar layer includes a plurality of first patterned arranged hollow structures and a plurality of second patterned arranged hollow structures formed among the first patterned arranged hollow structures. The second patterned arranged hollow structures have nano dimensions. The nitride semiconductor pillar layer is formed on the epitaxy substrate, and the nitride semiconductor layer is formed on the nitride semiconductor pillar layer. The mask layer covers surfaces of the nitride semiconductor pillar layer and the epitaxy substrate.
摘要翻译: 氮化物半导体衬底包括外延衬底,图案化氮化物半导体柱层,氮化物半导体层和掩模层。 氮化物半导体柱层包括多个第一图案化布置的中空结构和在第一图案化排列的中空结构之间形成的多个第二图案化布置的中空结构。 第二图案化排列的中空结构具有纳米尺寸。 在外延基板上形成氮化物半导体柱层,在氮化物半导体柱层上形成氮化物半导体层。 掩模层覆盖氮化物半导体柱层和外延基板的表面。
-
2.
公开(公告)号:US20100090312A1
公开(公告)日:2010-04-15
申请号:US12584942
申请日:2009-09-14
申请人: Yih-Der Guo , Suh-Fang Lin , Wei-Hung Kuo , Po-Chun Liu , Tung-Wei Chi , Chu-Li Chao , Jenq-Dar Tsay
发明人: Yih-Der Guo , Suh-Fang Lin , Wei-Hung Kuo , Po-Chun Liu , Tung-Wei Chi , Chu-Li Chao , Jenq-Dar Tsay
CPC分类号: C30B25/02 , C23C14/0005 , C23C14/021 , C23C14/0617 , C23C16/01 , C23C16/0227 , C23C16/303 , C30B29/403 , H01L21/0237 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L21/0265 , H01L21/02664 , H01L33/0079 , H01S2304/12
摘要: A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes an epitaxy substrate, a nitride pillar layer, a nitride semiconductor layer, and a mask layer. The nitride pillar layer includes a plurality of first patterned arranged pillars and a plurality of second patterned arranged pillars. The nitride pillar layer is formed on the epitaxy substrate. A width of a cross-section of each of the second patterned arranged pillars is smaller than a width of a cross-section of each of the first patterned arranged pillars, and a distance among each of the second patterned arranged pillars is longer than a distance among each of the first patterned arranged pillars. Surfaces of the epitaxy substrate, the first patterned arranged pillars, and the second patterned arranged pillars are covered by the mask layer. The nitride semiconductor layer is formed on the nitride pillar layer.
摘要翻译: 提供一种氮化物半导体衬底及其制造方法。 氮化物半导体衬底包括外延衬底,氮化物衬底层,氮化物半导体层和掩模层。 氮化物柱层包括多个第一图案化排列的柱和多个第二图案化排列的柱。 在外延基板上形成氮化物柱层。 每个第二图案化排列的柱的横截面的宽度小于每个第一图案化排列的柱的横截面的宽度,并且每个第二图案化排列的柱之间的距离长于距离 在每个第一图案化排列的柱子中。 外延衬底的表面,第一图案化排列的柱和第二图案化排列的柱被掩模层覆盖。 氮化物半导体层形成在氮化物柱层上。
-
公开(公告)号:US20110003410A1
公开(公告)日:2011-01-06
申请号:US12648308
申请日:2009-12-29
申请人: Jenq-Dar Tsay , Suh-Fang Lin , Yu-Hsiang Chang , Yih-Der Guo , Sheng-Huei Kuo , Wei-Hung Kuo , Hsun-Chih Liu
发明人: Jenq-Dar Tsay , Suh-Fang Lin , Yu-Hsiang Chang , Yih-Der Guo , Sheng-Huei Kuo , Wei-Hung Kuo , Hsun-Chih Liu
CPC分类号: H01L33/0079 , H01L33/20 , H01L33/405 , H01L33/44
摘要: A method of manufacturing a light emitting diode element is provided. A first patterned semi-conductor layer, a patterned light emitting layer, and a second patterned semi-conductor layer are sequentially formed on an epitaxy substrate so as to form a plurality of epitaxy structures, wherein the first patterned semi-conductor layer has a thinner portion in a non-epitaxy area outside the epitaxy structures. A passivation layer covering the epitaxy structures and the thinner portion is formed. The passivation layer covering on the thinner portion is partially removed to form a patterned passivation layer. A patterned reflector is formed directly on each of the epitaxy structures. The epitaxy structures are bonded to a carrier substrate. A lift-off process is performed to separate the epitaxy structures from the epitaxy substrate. An electrode is formed on each of the epitaxy structures far from the patterned reflector.
摘要翻译: 提供一种制造发光二极管元件的方法。 在外延基板上依次形成第一图案化半导体层,图案化发光层和第二图案化半导体层,以形成多个外延结构,其中第一图案化半导体层具有较薄的 部分在外延结构外的非外延区域。 形成覆盖外延结构和较薄部分的钝化层。 覆盖在较薄部分上的钝化层被部分地去除以形成图案化的钝化层。 在每个外延结构上直接形成图案化反射体。 外延结构被结合到载体衬底上。 进行剥离处理以将外延结构与外延基板分离。 在远离图案化反射器的每个外延结构上形成电极。
-
公开(公告)号:US08173456B2
公开(公告)日:2012-05-08
申请号:US12648308
申请日:2009-12-29
申请人: Jenq-Dar Tsay , Suh-Fang Lin , Yu-Hsiang Chang , Yih-Der Guo , Sheng-Huei Kuo , Wei-Hung Kuo , Hsun-Chih Liu
发明人: Jenq-Dar Tsay , Suh-Fang Lin , Yu-Hsiang Chang , Yih-Der Guo , Sheng-Huei Kuo , Wei-Hung Kuo , Hsun-Chih Liu
IPC分类号: H01L21/00
CPC分类号: H01L33/0079 , H01L33/20 , H01L33/405 , H01L33/44
摘要: A method of manufacturing a light emitting diode element is provided. A first patterned semi-conductor layer, a patterned light emitting layer, and a second patterned semi-conductor layer are sequentially formed on an epitaxy substrate so as to form a plurality of epitaxy structures, wherein the first patterned semi-conductor layer has a thinner portion in a non-epitaxy area outside the epitaxy structures. A passivation layer covering the epitaxy structures and the thinner portion is formed. The passivation layer covering on the thinner portion is partially removed to form a patterned passivation layer. A patterned reflector is formed directly on each of the epitaxy structures. The epitaxy structures are bonded to a carrier substrate. A lift-off process is performed to separate the epitaxy structures from the epitaxy substrate. An electrode is formed on each of the epitaxy structures far from the patterned reflector.
摘要翻译: 提供一种制造发光二极管元件的方法。 在外延基板上依次形成第一图案化半导体层,图案化发光层和第二图案化半导体层,以形成多个外延结构,其中第一图案化半导体层具有较薄的 部分在外延结构外的非外延区域。 形成覆盖外延结构和较薄部分的钝化层。 覆盖在较薄部分上的钝化层被部分地去除以形成图案化的钝化层。 在每个外延结构上直接形成图案化反射体。 外延结构被结合到载体衬底上。 进行剥离处理以将外延结构与外延基板分离。 在远离图案化反射器的每个外延结构上形成电极。
-
公开(公告)号:US08188573B2
公开(公告)日:2012-05-29
申请号:US12584942
申请日:2009-09-14
申请人: Yih-Der Guo , Suh-Fang Lin , Wei-Hung Kuo
发明人: Yih-Der Guo , Suh-Fang Lin , Wei-Hung Kuo
IPC分类号: H01L29/20
CPC分类号: C30B25/02 , C23C14/0005 , C23C14/021 , C23C14/0617 , C23C16/01 , C23C16/0227 , C23C16/303 , C30B29/403 , H01L21/0237 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L21/0265 , H01L21/02664 , H01L33/0079 , H01S2304/12
摘要: A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes an epitaxy substrate, a nitride pillar layer, a nitride semiconductor layer, and a mask layer. The nitride pillar layer includes a plurality of first patterned arranged pillars and a plurality of second patterned arranged pillars. The nitride pillar layer is formed on the epitaxy substrate. A width of a cross-section of each of the second patterned arranged pillars is smaller than a width of a cross-section of each of the first patterned arranged pillars, and a distance among each of the second patterned arranged pillars is longer than a distance among each of the first patterned arranged pillars. Surfaces of the epitaxy substrate, the first patterned arranged pillars, and the second patterned arranged pillars are covered by the mask layer. The nitride semiconductor layer is formed on the nitride pillar layer.
摘要翻译: 提供一种氮化物半导体衬底及其制造方法。 氮化物半导体衬底包括外延衬底,氮化物衬底层,氮化物半导体层和掩模层。 氮化物柱层包括多个第一图案化排列的柱和多个第二图案化排列的柱。 在外延基板上形成氮化物柱层。 每个第二图案化排列的柱的横截面的宽度小于每个第一图案化排列的柱的横截面的宽度,并且每个第二图案化排列的柱之间的距离长于距离 在每个第一图案化排列的柱子中。 外延衬底的表面,第一图案化排列的柱和第二图案化排列的柱被掩模层覆盖。 氮化物半导体层形成在氮化物柱层上。
-
6.
公开(公告)号:US20110254044A1
公开(公告)日:2011-10-20
申请号:US13070486
申请日:2011-03-24
申请人: Wei-Hung Kuo , Yi-Keng Fu , Suh-Fang Lin , Rong Xuan
发明人: Wei-Hung Kuo , Yi-Keng Fu , Suh-Fang Lin , Rong Xuan
IPC分类号: H01L33/36
CPC分类号: H01L33/38 , H01L33/0079 , H01L33/145 , H01L33/405 , H01L33/44
摘要: A light emitting device and a method of fabricating a light emitting device are provided. The light emitting device includes a carrier substrate, at least one epitaxy structure, a high resistant ring wall, a first electrode, and a second electrode. The epitaxy structure is disposed on the carrier substrate and includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence. The first semiconductor layer is relatively away from the carrier substrate and the second semiconductor layer is relatively close to the carrier substrate. The high resistant ring wall surrounds the epitaxy structure and a width of the high resistant ring wall is greater than 5 μm. The first electrode is disposed between the carrier substrate and the epitaxy structure. The second electrode is disposed at a side of the epitaxy structure away from the carrier substrate.
摘要翻译: 提供发光器件和制造发光器件的方法。 发光器件包括载体衬底,至少一个外延结构,高电阻环壁,第一电极和第二电极。 外延结构设置在载体基板上,并且包括依次堆叠的第一半导体层,有源层和第二半导体层。 第一半导体层相对离开载体衬底,并且第二半导体层相对靠近载体衬底。 高阻环圈围绕外延结构,高阻环壁的宽度大于5μm。 第一电极设置在载体衬底和外延结构之间。 第二电极设置在远离载体衬底的外延结构的一侧。
-
公开(公告)号:US08587017B2
公开(公告)日:2013-11-19
申请号:US13070486
申请日:2011-03-24
申请人: Wei-Hung Kuo , Yi-Keng Fu , Suh-Fang Lin , Rong Xuan
发明人: Wei-Hung Kuo , Yi-Keng Fu , Suh-Fang Lin , Rong Xuan
CPC分类号: H01L33/38 , H01L33/0079 , H01L33/145 , H01L33/405 , H01L33/44
摘要: A light emitting device and a method of fabricating a light emitting device are provided. The light emitting device includes a carrier substrate, at least one epitaxy structure, a high resistant ring wall, a first electrode, and a second electrode. The epitaxy structure is disposed on the carrier substrate and includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence. The first semiconductor layer is relatively away from the carrier substrate and the second semiconductor layer is relatively close to the carrier substrate. The high resistant ring wall surrounds the epitaxy structure and a width of the high resistant ring wall is greater than 5 μm. The first electrode is disposed between the carrier substrate and the epitaxy structure. The second electrode is disposed at a side of the epitaxy structure away from the carrier substrate.
摘要翻译: 提供发光器件和制造发光器件的方法。 发光器件包括载体衬底,至少一个外延结构,高电阻环壁,第一电极和第二电极。 外延结构设置在载体基板上,并且包括依次堆叠的第一半导体层,有源层和第二半导体层。 第一半导体层相对离开载体衬底,并且第二半导体层相对靠近载体衬底。 高阻环圈围绕外延结构,高阻环的宽度大于5um。 第一电极设置在载体衬底和外延结构之间。 第二电极设置在远离载体衬底的外延结构的一侧。
-
公开(公告)号:US20130100047A1
公开(公告)日:2013-04-25
申请号:US13352355
申请日:2012-01-18
申请人: Chin-Yueh Liao , Ping-Hwan Lee , Tsung-Shou Chin , Wei-Hung Kuo , Seok-Lyul Lee
发明人: Chin-Yueh Liao , Ping-Hwan Lee , Tsung-Shou Chin , Wei-Hung Kuo , Seok-Lyul Lee
IPC分类号: G06F3/041
CPC分类号: G06F3/044 , G02F1/13338 , G06F2203/04103
摘要: A touch display device is provided. The touch display device includes a touch panel, a display panel, an anti-splinted film and a transparent conductive layer. The anti-splinted film is disposed between the touch panel and the display panel. The transparent conductive layer is disposed between the display panel and the anti-splinted film.
摘要翻译: 提供触摸显示装置。 触摸显示装置包括触摸面板,显示面板,防夹板和透明导电层。 防夹板被设置在触摸面板和显示面板之间。 透明导电层设置在显示面板和防夹板之间。
-
公开(公告)号:US08952921B2
公开(公告)日:2015-02-10
申请号:US13033613
申请日:2011-02-24
申请人: Yen-Liang Huang , Wei-Hung Kuo , Chau-Shiang Huang , Tun-Chun Yang , Seok-Lyul Lee , Wei-Ming Huang
发明人: Yen-Liang Huang , Wei-Hung Kuo , Chau-Shiang Huang , Tun-Chun Yang , Seok-Lyul Lee , Wei-Ming Huang
IPC分类号: G06F3/044
CPC分类号: G06F3/044
摘要: A capacitive touch display panel includes a display panel, a touch sensing unit, and a plurality of diode ESD protection devices. The touch sensing unit includes a plurality of first sensing pads and second sensing pads. Each diode ESD protection device is disposed between two adjacent first sensing pads and between two adjacent second sensing pads. The two adjacent first sensing pads are electrically disconnected from each other, and the two adjacent second sensing pads are electrically disconnected from each other.
摘要翻译: 电容式触摸显示面板包括显示面板,触摸感测单元和多个二极管ESD保护装置。 触摸感测单元包括多个第一感测垫和第二感测垫。 每个二极管ESD保护装置设置在两个相邻的第一感测焊盘之间以及两个相邻的第二传感焊盘之间。 两个相邻的第一感测垫彼此电断开,并且两个相邻的第二感测垫彼此电断开。
-
公开(公告)号:US08669920B2
公开(公告)日:2014-03-11
申请号:US12779954
申请日:2010-05-14
申请人: Wei-Hung Kuo , Tun-Chun Yang , Seok-Lyul Lee , Wei-Ming Huang
发明人: Wei-Hung Kuo , Tun-Chun Yang , Seok-Lyul Lee , Wei-Ming Huang
IPC分类号: G09G3/20
CPC分类号: G09G3/3607 , G02F1/13338 , G02F1/134309 , G02F1/136213 , G02F1/136286 , G02F2201/40 , G06F3/0412 , G06F3/044 , G06F3/045 , G09G2300/0452
摘要: A pixel array including scan lines, data lines and pixels is provided. The data lines and the scan lines are intersected so as to define sub-pixel regions arranged in array. Each pixel is disposed in a pixel region including (m×n) sub-pixel regions, wherein m is a positive integral and n is a positive integral larger than one. Each pixel includes a plurality of sub-pixels, wherein each sub-pixel includes an active device, a pixel electrode and a storage capacitor. At least a portion of the storage capacitors of the sub-pixels within the same pixel is concentrically disposed in one of the sub-pixel regions.
摘要翻译: 提供了包括扫描线,数据线和像素的像素阵列。 数据线和扫描线相交,以便定义排列成阵列的子像素区域。 每个像素设置在包括(m×n)个子像素区域的像素区域中,其中m是正整数,n是大于1的正积分。 每个像素包括多个子像素,其中每个子像素包括有源器件,像素电极和存储电容器。 同一像素内的子像素的存储电容器的至少一部分同心地设置在一个子像素区域中。
-
-
-
-
-
-
-
-
-