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    Multi-layer capacitor
    1.
    发明授权
    Multi-layer capacitor 有权
    多层电容器

    公开(公告)号：US06407904B1

    公开(公告)日：2002-06-18

    申请号：US09501083

    申请日：2000-02-09

    申请人： Yoichi Kuroda ,  Yasuyuki Naito ,  Masaaki Taniguchi ,  Haruo Hori ,  Takanori Kondo ,  Michihiro Murata ,  Yoshitaka Tanino

    发明人： Yoichi Kuroda ,  Yasuyuki Naito ,  Masaaki Taniguchi ,  Haruo Hori ,  Takanori Kondo ,  Michihiro Murata ,  Yoshitaka Tanino

    IPC分类号： H01G4005

    CPC分类号： H01G4/232 ,  H01G4/30 ,  H01L23/642 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/01068 ,  H01L2924/15312 ,  H01L2924/19106 ,  H01L2924/3011 ,  H01L2224/05647 ,  H01L2924/00014

    摘要： A multi-layer capacitor is constructed to minimize equivalent series inductance, increase resonance frequency, reduce the size of the capacitor and greatly improve the ease of mounting of the capacitor. A dimension in a length direction and a dimension in a width direction of a capacitor body are substantially equal, and a pattern of opposing first and second internal electrodes is substantially square. First lead-out portions of the first internal electrode and second lead-out portions of the second internal electrode are extended onto two side surfaces and two end surfaces. First external electrode terminals connected to the first lead-out portions and second external electrode terminals connected to the second lead-out portions are arranged so that they alternate adjacently and are arranged such that oppositely disposed external electrode terminals have opposite polarities.

    摘要翻译： 构造了多层电容器，以使等效串联电感最小化，共振频率增加，减小电容器尺寸，大大提高了电容器的安装容易度。 电容器主体的长度方向的尺寸和宽度方向的尺寸基本相等，相反的第一和第二内部电极的图案基本上是正方形。 第一内部电极的第一引出部分和第二内部电极的第二引出部分延伸到两个侧表面和两个端部表面。 连接到第一引出部分的第一外部电极端子和连接到第二引出部分的第二外部电极端子被布置成使得它们相邻地交替并且被布置为使得相对设置的外部电极端子具有相反的极性。

    Multi-layer capacitor, wiring board, and high-frequency circuit
    2.
    发明授权
    Multi-layer capacitor, wiring board, and high-frequency circuit 有权
    多层电容器，接线板和高频电路

    公开(公告)号：US06327134B1

    公开(公告)日：2001-12-04

    申请号：US09678937

    申请日：2000-10-04

    申请人： Yoichi Kuroda ,  Masaaki Taniguchi ,  Yasuyuki Naito ,  Haruo Hori ,  Takanori Kondo ,  Michihiro Murata

    发明人： Yoichi Kuroda ,  Masaaki Taniguchi ,  Yasuyuki Naito ,  Haruo Hori ,  Takanori Kondo ,  Michihiro Murata

    IPC分类号： H01G4005

    CPC分类号： H01G4/232 ,  H01G4/30 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/15159 ,  H01L2924/15311 ,  H05K1/0231 ,  H05K1/181

    摘要： A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.

    摘要翻译： 多层电容器包括交替布置在电容器主体的四个侧表面上的第一和第二侧面端子电极。 第一和第二主表面端子电极布置在电容器主体的主表面上。 在电容器体内彼此相对的第一和第二内部电极在端部分别电连接到第一和第二侧面端子电极，并且还分别电连接到第一和第二主表面端子电极，通过 通孔导体。 通过这种布置，在多层电容器内流动的电流的方向是多样化的，并且导流通路的长度被缩短以达到非常低的ESL值。

    Multi-layer capacitor, wiring substrate, decoupling circuit, and high-frequency circuit
    3.
    发明授权
    Multi-layer capacitor, wiring substrate, decoupling circuit, and high-frequency circuit 有权
    多层电容器，布线基板，去耦电路和高频电路

    公开(公告)号：US06351369B1

    公开(公告)日：2002-02-26

    申请号：US09514516

    申请日：2000-02-28

    申请人： Yoichi Kuroda ,  Masaaki Taniguchi ,  Yasuyuki Naito ,  Haruo Hori ,  Takanori Kondo

    发明人： Yoichi Kuroda ,  Masaaki Taniguchi ,  Yasuyuki Naito ,  Haruo Hori ,  Takanori Kondo

    IPC分类号： H01G4228

    CPC分类号： H01G4/232 ,  H01G4/30 ,  H01L23/642 ,  H01L2924/0002 ,  H05K1/0231 ,  H05K2201/10515 ,  H05K2201/10734 ,  H01L2924/00

    摘要： A multi-layer capacitor achieves significant reduction in equivalent series inductance (ESL) and includes first inner electrodes and second inner electrodes opposing each other, first feed-through conductors and second feed-through conductors, and first outer terminal electrodes and second outer terminal electrodes. The first feed-through conductors electrically connect the first inner electrodes and the first outer terminal electrodes, and the second feed-through conductors electrically connect the second inner electrodes and the second outer terminal electrodes. The first and second feed-through conductors are arranged such that the feed-through conductors mutually cancel magnetic fields induced by current flowing through the first and second inner electrodes. Furthermore, when an alignment pitch of the first and second feed-through conductors is indicated by P and the total number of the first and second feed-through conductors is indicated by N, an arrangement is set such that a ratio of P/N is about 0.085 mm or lower.

    摘要翻译： 多层电容器实现了等效串联电感（ESL）的显着降低，并且包括彼此相对的第一内部电极和第二内部电极，第一馈通导体和第二馈通导体以及第一外部末端电极和第二外部末端电极 。 第一馈通导体电连接第一内电极和第一外端子电极，第二馈通导体电连接第二内电极和第二外端子电极。 第一和第二馈通导体布置成使得馈通导体相互抵消由流过第一和第二内部电极的电流感应的磁场。 此外，当第一和第二馈通导体的对准间距由P表示，并且第一和第二馈通导体的总数由N表示时，设置P / N的比率为 约0.085mm以下。

    Monolithic capacitor
    9.
    发明授权
    Monolithic capacitor 有权
    单片电容器

    公开(公告)号：US6038121A

    公开(公告)日：2000-03-14

    申请号：US234385

    申请日：1999-01-20

    申请人： Yasuyuki Naito ,  Yoichi Kuroda ,  Masaaki Taniguchi ,  Haruo Hori ,  Takanori Kondo

    发明人： Yasuyuki Naito ,  Yoichi Kuroda ,  Masaaki Taniguchi ,  Haruo Hori ,  Takanori Kondo

    IPC分类号： H01G4/30 ,  H01G2/20 ,  H01G4/228 ,  H01G4/232

    CPC分类号： H01G4/232

    摘要： The present invention is to provide a monolithic capacitor for reducing an equivalent series inductance of a monolithic capacitor. The external terminal electrodes are respectively provided on four corners of the capacitor body. External terminal electrodes can also be provided on the side surfaces of the capacitor body. The first inner electrode is connected to two adjacent external corner terminal electrodes and preferably to the external side terminal electrode. The second inner electrode faces the first electrode through a dielectric layer and is connected to other two adjacent external corner terminal electrodes as well as to the external side terminal electrode. The current flowing through the inner electrodes is directed to a variety of directions, and since the current flow in the corner parts of the inner electrodes is smooth, the magnetic fluxes generated in association with the current are cancelled out, thereby reducing the equivalent series inductance.

    摘要翻译： 本发明提供一种用于降低单片电容器的等效串联电感的单片电容器。 外部端子电极分别设置在电容器主体的四个角上。 外部端子电极也可以设置在电容器主体的侧表面上。 第一内部电极连接到两个相邻的外部角端子电极，优选地连接到外部侧端子电极。 第二内电极通过介电层面对第一电极，并且连接到其他两个相邻的外角端子电极以及外侧端子电极。 流过内部电极的电流被引导到各种方向，并且由于内部电极的角部中的电流流动是平滑的，所以与电流相关联地产生的磁通被抵消，从而减小了等效串联电感 。