Wafer transport method
    1.
    发明授权
    Wafer transport method 失效
    晶圆输送方式

    公开(公告)号:US5562800A

    公开(公告)日:1996-10-08

    申请号:US308442

    申请日:1994-09-19

    摘要: A wafer transport method includes the steps of preparing a semiconductor process equipment having a transport chamber and a process chamber. An interface means connects the transport chamber to the process chamber. A transport means transports a semiconductor wafer from the transport chamber to the process chamber by way of the interface means. The transport means mounting a substrate is inserted into a communicating corridor including a supply means and an exhaust means. The substrate is transported while performing the supply and exhaust by sequentially controlling a supply shutoff means, an exhaust shutoff means, and a communicating shutoff means according to the position of a conductance part formed of a gap between the transport means and the communicating corridor. Thus, the substrate is transported at a high throughput without contamination of the substrate while keeping the different atmospheric conditions for the transport chamber and the process chamber, thereby manufacturing a semiconductor device with high performance capabilities.

    摘要翻译: 晶片输送方法包括准备具有输送室和处理室的半导体工艺设备的步骤。 接口装置将输送室连接到处理室。 传送装置通过接口装置将半导体晶片从传送室传送到处理室。 安装基板的输送装置被插入到包括供给装置和排气装置的通信走廊中。 通过根据由输送装置和通信走廊之间的间隙形成的电导部分的位置依次控制供给切断装置,排气关闭装置和通信切断装置,在进行供给和排出的同时运送基板。 因此,在保持输送室和处理室的不同大气条件的同时,以高通量输送基板而不污染基板,从而制造具有高性能的半导体器件。

    Wafer transport method
    2.
    发明授权
    Wafer transport method 失效
    晶圆输送方式

    公开(公告)号:US5601686A

    公开(公告)日:1997-02-11

    申请号:US642510

    申请日:1996-05-03

    摘要: A wafer transport method including the steps of preparing a semiconductor process equipment having a transport chamber, a process chamber, an interface means for connecting the transport chamber to the process chamber, and a transport means for transporting a semiconductor wafer from the transport chamber to the process chamber by way of the interface means; inserting the transport means mounting a substrate in a communicating corridor including a supply means and an exhaust means; and transporting the substrate while performing the supply and exhaust by sequentially controlling a supply shutoff means, an exhaust shutoff means, and a communicating shutoff means according to the position of a conductance part formed of a gap between the transport means and the communicating corridor. With this method, the substrate is transported at a high throughput without the contamination on the substrate while keeping the different atmospheric conditions of the transport chamber and the process chamber, thereby manufacturing a semiconductor device with a high performance.

    摘要翻译: 一种晶片输送方法,包括以下步骤:制备具有输送室的半导体工艺设备,处理室,用于将输送室连接到处理室的接口装置,以及用于将半导体晶片从输送室输送到 处理室; 将安装基板的输送装置插入包括供给装置和排气装置的通信走廊中; 并且通过根据由传送装置和通信走廊之间的间隙形成的电导部分的位置顺序地控制供给关闭装置,排气关闭装置和连通关闭装置,在执行供应和排出的同时运送基板。 利用该方法,在保持输送室和处理室的不同大气条件的同时,以高通量输送基板而不会在基板上产生污染,从而制造具有高性能的半导体器件。

    SCANNING ELECTRON MICROSCOPE
    3.
    发明申请
    SCANNING ELECTRON MICROSCOPE 有权
    扫描电子显微镜

    公开(公告)号:US20120298865A1

    公开(公告)日:2012-11-29

    申请号:US13522984

    申请日:2011-01-21

    IPC分类号: H01J37/26

    摘要: Disclosed is a scanning electron microscope provided with a calculation device (403) for measuring the dimension of a pattern on a sample (413), characterized in that the amount of change of a pattern shape, caused by electron beam irradiation, is calculated and stored, and a pattern shape contour (614; 815; 1512) before the sample is irradiated with an electron beam is restored from a pattern shape contour (613; 814; 1511) in a scanning electron microscope image (612; 813; 1510) after the sample is irradiated with an electron beam using the calculated amount and, then, the pattern shape contour (614; 815; 1512) is displayed. Thus, the shrinking of a resist and/or the effect of electrostatic charge caused when a sample is irradiated with an electron beam are eliminated, so that the shape contour of a two-dimensional pattern before irradiating an electron beam can be restored with a high degree of accuracy, and the dimension of a pattern can be measured with a high degree of accuracy, using the restored image.

    摘要翻译: 公开了一种具有用于测量样品(413)上的图案的尺寸的计算装置(403)的扫描电子显微镜,其特征在于,计算并存储由电子束照射引起的图案形状的变化量 在扫描电子显微镜图像(612; 813; 1510)中从扫描电子显微镜图像(612; 813; 1510)中的图案形状轮廓(613; 814; 1511)恢复在用电子束照射样品之前的图案形状轮廓(614; 815; 1512) 使用计算量用电子束照射样品,然后显示图案形状轮廓(614; 815; 1512)。 因此,消除了当用电子束照射样品时引起的抗蚀剂收缩和/或静电电荷的影响,从而能够以高的电压恢复照射电子束之前的二维图案的形状轮廓 使用恢复的图像,可以高精度地测量图案的精度和尺寸。

    PATTERN DIMENSION MEASUREMENT METHOD AND CHARGED PARTICLE BEAM MICROSCOPE USED IN SAME
    4.
    发明申请
    PATTERN DIMENSION MEASUREMENT METHOD AND CHARGED PARTICLE BEAM MICROSCOPE USED IN SAME 有权
    图案尺寸测量方法和使用的充电颗粒光束显​​微镜

    公开(公告)号:US20120212602A1

    公开(公告)日:2012-08-23

    申请号:US13504129

    申请日:2010-09-30

    IPC分类号: G06K9/48 H04N7/18

    摘要: In order to provide a pattern dimension measurement method with a small measured error and excellent reproducibility even though defocus occurs and a charged particle beam microscope used in the same, in a method for applying a charged particle beam to a specimen formed with a pattern to measure a pattern dimension from a signal intensity distribution of signal charged particles from the specimen, edge index positions (X1) and (X2) on the right and left of the maximum point of signal intensity corresponding to a pattern edge are calculated by a threshold method, and a pattern edge position (Xe) is found from a mean value between the positions. Thus, it is possible to reduce the influence of defocus on the pattern edge position (Xe).

    摘要翻译: 为了提供即使发生散焦而具有小的测量误差和优异的再现性的图案尺寸测量方法,并且在其中使用带电粒子束显微镜,在将带电粒子束施加到形成有待测量图案的样本的方法中 通过阈值法计算来自样本的信号带电粒子的信号强度分布的图案尺寸,对应于图案边缘的最大信号强度点右侧和左侧的边缘索引位置(X1)和(X2) 并且从位置之间的平均值找到图案边缘位置(Xe)。 因此,可以减小散焦对图案边缘位置(Xe)的影响。

    Defect inspection method and its system
    6.
    发明申请
    Defect inspection method and its system 有权
    缺陷检查方法及其系统

    公开(公告)号:US20090206252A1

    公开(公告)日:2009-08-20

    申请号:US12320574

    申请日:2009-01-29

    IPC分类号: G01N23/00

    摘要: A method for enabling management of fatal defects of semiconductor integrated patterns easily, the method enables storing of design data of each pattern designed by a semiconductor integrated circuit designer, as well as storing of design intent data having pattern importance levels ranked according to their design intents respectively. The method also enables anticipating of defects to be generated systematically due to the characteristics of the subject exposure system, etc. while each designed circuit pattern is exposed and delineated onto a wafer in a simulation carried out beforehand and storing those defects as hot spot information. Furthermore, the method also enables combining of the design intent data with hot spot information to limit inspection spots that might include systematic defects at high possibility with respect to the characteristics of the object semiconductor integrated circuit and shorten the defect inspection time significantly.

    摘要翻译: 一种能够容易地管理半导体集成图案的致命缺陷的方法,该方法能够存储由半导体集成电路设计者设计的每个图案的设计数据,以及存储具有根据其设计意图排列的图案重要性级别的设计意图数据 分别。 该方法还可以预测由于目标曝光系统等的特性而系统地产生的缺陷,同时在预先进行的模拟中将每个设计的电路图案暴露并描绘到晶片上,并将这些缺陷存储为热点信息。 此外,该方法还能够将设计意图数据与热点信息组合,以限制可能包括关于对象半导体集成电路的特性的高可能性的系统缺陷的检查点,并显着缩短缺陷检查时间。

    Standard component for calibration and electron-beam system using the same
    7.
    发明申请
    Standard component for calibration and electron-beam system using the same 有权
    用于校准的标准组件和使用其的电子束系统

    公开(公告)号:US20080251868A1

    公开(公告)日:2008-10-16

    申请号:US12078516

    申请日:2008-04-01

    摘要: The invention provides a standard component for calibration that enables a calibration position to be easily specified in order to calibrate accurately a scale factor in the electron-beam system, and provides an electron-beam system using it. High-accuracy metrology calibration capable of specifying a calibration position can be realized by forming a mark pattern or labeled material for identifying the calibration position in proximity of a superlattice pattern of the standard component for system calibration. The standard component for calibration is one that calibrates a scale factor of an electron-beam system based on a signal of secondary charged particles detected by irradiation of a primary electron beam emitted from the electron-beam system on a substrate having a cross section of a superlattice of a multi-layer structure in which different materials are deposited alternately. The substrate have linear patterns that are on the substrate surface parallel to the multi-layer and are arranged at a fixed interval in a direction crossing the cross section of the superlattice pattern, and is so configured that the cross sections of the linear patterns may exist on substantially the same plane of the superlattice cross section, so that the linear patterns enable a position of the superlattice pattern to be identified.

    摘要翻译: 本发明提供了一种用于校准的标准组件,其使得能够容易地指定校准位置,以便准确地校准电子束系统中的比例因子,并提供使用该电子束系统的电子束系统。 可以通过形成用于识别用于系统校准的标准组件的超晶格图案附近的校准位置的标记图案或标记材料来实现能够指定校准位置的高精度度量学校准。 用于校准的标准组件是基于通过照射从电子束系统发射的一次电子束检测的二次带电粒子的信号来校准电子束系统的比例因子的衬底上的横截面为 其中不同材料交替沉积的多层结构的超晶格。 衬底具有平行于多层的衬底表面上的线性图案,并且在与超晶格图案的横截面交叉的方向上以固定的间隔布置,并且被配置成可以存在线形图案的横截面 在超晶格截面的基本上相同的平面上,使得线状图案能够识别超晶格图案的位置。

    Standard reference for metrology and calibration method of electron-beam metrology system using the same
    8.
    发明授权
    Standard reference for metrology and calibration method of electron-beam metrology system using the same 失效
    电子束计量系统的计量和校准方法的标准参考

    公开(公告)号:US07358495B2

    公开(公告)日:2008-04-15

    申请号:US11481973

    申请日:2006-07-07

    IPC分类号: G21K7/00

    摘要: An electron-beam metrology system includes a specimen stage to mount a specimen on which a device pattern is formed, electron optics to radiate the device pattern with an electron-beam, a secondary electron detector to detect a secondary electron generated by the radiation of the electron-beam, and an information processing system to analyze a signal obtained from the secondary electron detector. A standard reference for metrology is held on the specimen stage, and the standard reference includes a first grating unit pattern including an array of gratings having pitch sizes which are verified by an optical method, and a second grating unit pattern including an array of gratings having pitch sizes which are smaller than the pitch sizes of the first grating unit pattern.

    摘要翻译: 电子束计量系统包括用于安装其上形成有器件图案的样本的样品台,用电子束辐射器件图案的电子光学器件,用于检测由电子束的辐射产生的二次电子的二次电子检测器 电子束和用于分析从二次电子检测器获得的信号的信息处理系统。 标准参考标准保持在标本台上,标准参考文献包括第一光栅单元图案,其包括具有通过光学方法验证的间距尺寸的光栅阵列,以及第二光栅单元图案,其包括具有 间距尺寸小于第一光栅单元图案的间距尺寸。

    STANDARD COMPONENT FOR CALIBRATION AND CALIBRATION METHOD USING IT AND ELECTRO BEAM SYSTEM
    9.
    发明申请
    STANDARD COMPONENT FOR CALIBRATION AND CALIBRATION METHOD USING IT AND ELECTRO BEAM SYSTEM 有权
    标准组件用于使用其和电子束系统的校准和校准方法

    公开(公告)号:US20080067447A1

    公开(公告)日:2008-03-20

    申请号:US11744906

    申请日:2007-05-07

    IPC分类号: G21K5/10

    摘要: The positions of diffraction gratings used for calibration can be checked easily by arranging marks near the diffraction gratings, the marks indicating the coordinate positions of the diffraction gratings. Dummy patterns including a pattern of cross marks are arranged around the array of the diffraction gratings. Consequently, a uniform diffraction grating pattern is accomplished in which the proximity effect is uniform across the diffraction grating array. Furthermore, cross marks can be disposed adjacent to the diffraction grating array. Therefore, the diffraction gratings can be placed in position and calibrated accurately and easily by using a standard component capable of realizing accurate positioning of the diffraction gratings. Hence, accurate metrology calibration coping with the next generation of semiconductor lithography technology can be accomplished.

    摘要翻译: 通过在衍射光栅附近设置标记,标记表示衍射光栅的坐标位置,可以容易地检查用于校准的衍射光栅的位置。 包括交叉标记图案的虚拟图案围绕衍射光栅的阵列布置。 因此,实现了均匀衍射光栅图案,其中邻近效应在衍射光栅阵列上是均匀的。 此外,交叉标记可以设置在衍射光栅阵列附近。 因此,可以通过使用能够实现衍射光栅的精确定位的标准部件,将衍射光栅放置在适当位置并且被准确且容易地校准。 因此,可以实现应对下一代半导体光刻技术的精确计量校准。