公开(公告)号：US20050003580A1

公开(公告)日：2005-01-06

申请号：US10881044

申请日：2004-06-30

申请人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

发明人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

IPC分类号： H01L25/18 ,  H01L21/60 ,  H01L23/31 ,  H01L25/065 ,  H01L25/07 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip. Thereby, influences of the fillet made of the adhesive are suppressed, allowing miniaturization of the device and improvement in the mass-productivity.

摘要翻译： 一种堆叠式芯片半导体器件，包括：具有电极焊盘的衬底; 第一半导体芯片，其经由第一粘合剂层倒装芯片封装在所述基板上; 第二半导体芯片，其安装在所述第一半导体芯片的上部并且具有电极焊盘; 用于电连接第二半导体芯片的电极焊盘和基板的电极焊盘的导线; 以及用于封装第一半导体芯片，第二半导体芯片和电线的模制树脂，第一粘合剂层在第一半导体芯片的周围形成圆角。 第一半导体芯片以其中心轴偏离基板的中心轴线的方式设置，偏移被设置成使得第一半导体芯片朝向与圆角的边缘的最大长度相反的一侧偏移 第一个半导体芯片。 由此，抑制了由粘合剂制成的圆角的影响，从而使装置小型化并提高了批量生产率。

公开(公告)号：US20070187811A1

公开(公告)日：2007-08-16

申请号：US11717953

申请日：2007-03-14

申请人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

发明人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip. Thereby, influences of the fillet made of the adhesive are suppressed, allowing miniaturization of the device and improvement in the mass-productivity.

摘要翻译： 一种堆叠式芯片半导体器件，包括：具有电极焊盘的衬底; 第一半导体芯片，其经由第一粘合剂层倒装芯片封装在所述基板上; 第二半导体芯片，其安装在所述第一半导体芯片的上部并且具有电极焊盘; 用于电连接第二半导体芯片的电极焊盘和基板的电极焊盘的导线; 以及用于封装第一半导体芯片，第二半导体芯片和电线的模制树脂，第一粘合剂层在第一半导体芯片的周围形成圆角。 第一半导体芯片以其中心轴偏离基板的中心轴线的方式设置，偏移被设置成使得第一半导体芯片朝向与圆角的边缘的最大长度相反的一侧偏移 第一个半导体芯片。 由此，抑制了由粘合剂制成的圆角的影响，从而使装置小型化并提高了批量生产率。

公开(公告)号：US07521288B2

公开(公告)日：2009-04-21

申请号：US11717953

申请日：2007-03-14

申请人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

发明人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip. Thereby, influences of the fillet made of the adhesive are suppressed, allowing miniaturization of the device and improvement in the mass-productivity.

摘要翻译： 一种堆叠式芯片半导体器件，包括：具有电极焊盘的衬底; 第一半导体芯片，其经由第一粘合剂层倒装芯片封装在所述基板上; 第二半导体芯片，其安装在所述第一半导体芯片的上部并且具有电极焊盘; 用于电连接第二半导体芯片的电极焊盘和基板的电极焊盘的导线; 以及用于封装第一半导体芯片，第二半导体芯片和电线的模制树脂，第一粘合剂层在第一半导体芯片的周围形成圆角。 第一半导体芯片以其中心轴偏离基板的中心轴线的方式设置，偏移被设置成使得第一半导体芯片朝向与圆角的边缘的最大长度相反的一侧偏移 第一个半导体芯片。 由此，抑制了由粘合剂制成的圆角的影响，从而使装置小型化并提高了批量生产率。

公开(公告)号：US07239021B2

公开(公告)日：2007-07-03

申请号：US10881044

申请日：2004-06-30

申请人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

发明人： Yoshiyuki Arai ,  Takashi Yui ,  Fumito Itou ,  Yasutake Yaguchi ,  Toshitaka Akahoshi

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L23/3121 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip. Thereby, influences of the fillet made of the adhesive are suppressed, allowing miniaturization of the device and improvement in the mass-productivity.

公开(公告)号：US07298045B2

公开(公告)日：2007-11-20

申请号：US10995140

申请日：2004-11-24

申请人： Hisaki Fujitani ,  Fumito Itou ,  Toshitaka Akahoshi ,  Toshiyuki Fukuda

发明人： Hisaki Fujitani ,  Fumito Itou ,  Toshitaka Akahoshi ,  Toshiyuki Fukuda

IPC分类号： H01L23/34

CPC分类号： H01L24/97 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1515 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/92247 ,  H01L2224/05599

摘要： A first semiconductor element and second semiconductor element are bonded via die-bonding material. A first electrode of the first semiconductor element and a third electrode are joined, by means of flip-chip bonding, to a semiconductor carrier that has the third electrode on the one face of the semiconductor carrier and a fourth electrode on the perimeter of the other face of the semiconductor carrier. The bonding pad of the second semiconductor element and the fourth electrode of the semiconductor carrier are connected via fine metal wire by means of wire bonding. The periphery of the first semiconductor element and the wiring portion of the fine metal wire are filled with insulating sealing resin between the semiconductor carrier and second semiconductor element and the sealing fill region for the sealing resin is formed substantially the same as the external dimensions of the second semiconductor element.

摘要翻译： 第一半导体元件和第二半导体元件通过芯片接合材料接合。 第一半导体元件的第一电极和第三电极通过倒装芯片接合连接到半导体载体，半导体载体在半导体载体的一个面上具有第三电极，在另一个半导体周边的周边连接第四电极 半导体载体的面。 第二半导体元件的焊盘和半导体载体的第四电极通过引线接合通过细金属线连接。 第一半导体元件的周边和细金属线的布线部分在半导体载体和第二半导体元件之间填充有绝缘密封树脂，并且用于密封树脂的密封填充区域形成为基本上与外部尺寸相同 第二半导体元件。

公开(公告)号：US20050116353A1

公开(公告)日：2005-06-02

申请号：US10995140

申请日：2004-11-24

申请人： Hisaki Fujitani ,  Fumito Itou ,  Toshitaka Akahoshi ,  Toshiyuki Fukuda

发明人： Hisaki Fujitani ,  Fumito Itou ,  Toshitaka Akahoshi ,  Toshiyuki Fukuda

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01L23/12 ,  H01L25/04 ,  H01L25/065 ,  H01L25/07 ,  H01L27/108

CPC分类号： H01L24/97 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1515 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/92247 ,  H01L2224/05599

摘要： A first semiconductor element and second semiconductor element are bonded via die-bonding material. A first electrode of the first semiconductor element and a third electrode are joined, by means of flip-chip bonding, to a semiconductor carrier that has the third electrode on the one face of the semiconductor carrier and a fourth electrode on the perimeter of the other face of the semiconductor carrier. The bonding pad of the second semiconductor element and the fourth electrode of the semiconductor carrier are connected via fine metal wire by means of wire bonding. The periphery of the first semiconductor element and the wiring portion of the fine metal wire are filled with insulating sealing resin between the semiconductor carrier and second semiconductor element and the sealing fill region for the sealing resin is formed substantially the same as the external dimensions of the second semiconductor element.

摘要翻译： 第一半导体元件和第二半导体元件通过芯片接合材料接合。 第一半导体元件的第一电极和第三电极通过倒装芯片接合连接到半导体载体，半导体载体在半导体载体的一个面上具有第三电极，在另一个半导体周边的周边连接第四电极 半导体载体的面。 第二半导体元件的焊盘和半导体载体的第四电极通过引线接合通过细金属线连接。 第一半导体元件的周边和细金属线的布线部分在半导体载体和第二半导体元件之间填充有绝缘的密封树脂，并且用于密封树脂的密封填充区域形成为与外部尺寸基本相同 第二半导体元件。

公开(公告)号：US20060202793A1

公开(公告)日：2006-09-14

申请号：US11373255

申请日：2006-03-13

申请人： Toshitaka Akahoshi

发明人： Toshitaka Akahoshi

IPC分类号： H01C7/00

CPC分类号： H01L27/14618 ,  H01L27/14683 ,  H01L31/0203 ,  H01L2224/16 ,  H04N5/2257

摘要： A metal exposing portion (12) exposed from a surface of a base (2) between an internal terminal portion (8) and an external terminal portion (9) is formed in a metal wiring (7) embedded in the base (2). Accordingly, in a case where a solder ball is not mounted on the external terminal portion (9), although a bled component flows from sealing resin along the upper surface of the base (2) during a manufacturing method, the bled component stops by the metal exposing portion (12) which function as a breakwater and thus the bled component can be prevented from covering the external terminal portion (9).

摘要翻译： 在嵌入基座（2）的金属配线（7）上形成有从内部端子部（8）与外部端子部（9）之间的基部（2）的表面露出的金属露出部（12）。 因此，在焊接球没有安装在外部端子部（9）的情况下，在制造方法中，虽然排出部件沿着基部（2）的上表面从密封树脂流动，但是流出部件停止 可以防止用作防波堤的金属曝光部分（12），从而可以防止出血部件覆盖外部端子部分（9）。

公开(公告)号：US20060220207A1

公开(公告)日：2006-10-05

申请号：US11376309

申请日：2006-03-16

申请人： Toshitaka Akahoshi

发明人： Toshitaka Akahoshi

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L23/3677 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

摘要： A metal pattern for heat dissipation is formed on the backside of a second semiconductor substrate, the metal pattern being in contact with a first semiconductor element mounted on a semiconductor device adjacent to the backside. Vias are formed on the peripheries of semiconductor substrates, the vias penetrating in the thickness direction to transmit heat. The vias and the metal pattern for heat dissipation are connected to each other on the backside of the semiconductor substrate. Solder balls disposed between the semiconductor devices transmit heat having been transmitted to the metal pattern of the semiconductor device to the vias of the semiconductor device adjacent to the backside of the semiconductor device having the metal pattern.

摘要翻译： 用于散热的金属图案形成在第二半导体衬底的背面上，金属图案与安装在与背面相邻的半导体器件上的第一半导体元件接触。 在半导体衬底的周边形成通孔，通孔沿厚度方向穿透以传递热量。 用于散热的通孔和金属图案在半导体衬底的背面彼此连接。 布置在半导体器件之间的焊球将已经传输到半导体器件的金属图案的热传递到与具有金属图案的半导体器件的背面相邻的半导体器件的通孔。

公开(公告)号：US20090091039A1

公开(公告)日：2009-04-09

申请号：US12137578

申请日：2008-06-12

申请人： Toshitaka Akahoshi

发明人： Toshitaka Akahoshi

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L24/94 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/10158 ,  H01L2924/15153 ,  H01L2924/15159 ,  H01L2924/15162 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： According to the present invention, for collective molding of semiconductor devices, a semiconductor substrate includes first electrodes formed on the front side, second electrodes formed on the back side and connected to external electrode terminals, and a plurality of semiconductor element mounting regions 203. Along partition lines 202 for partitioning the semiconductor substrate into the plurality of semiconductor element mounting regions 203, recessed portions 205 are formed on the partition lines 202 on the front side of the semiconductor substrate.

摘要翻译： 根据本发明，对于半导体器件的集合成型，半导体衬底包括形成在前侧的第一电极，形成在背面上并连接到外部电极端子的第二电极和多个半导体元件安装区域203.沿着 用于将半导体衬底分隔成多个半导体元件安装区域203的分隔线202形成在半导体衬底的前侧的分隔线202上的凹部205。