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    METHOD AND APPARATUS FOR MANUFACTURING AN ULTRA LOW DEFECT SEMICONDUCTOR SINGLE CRYSTALLINE INGOT
    2.
    发明申请
    METHOD AND APPARATUS FOR MANUFACTURING AN ULTRA LOW DEFECT SEMICONDUCTOR SINGLE CRYSTALLINE INGOT 有权
    用于制造超低缺陷半导体单晶体的方法和装置

    公开(公告)号：US20090090294A1

    公开(公告)日：2009-04-09

    申请号：US12244283

    申请日：2008-10-02

    申请人： Young-Ho Hong ,  Hyon-Jong Cho ,  Sung-Young Lee ,  Seung-Ho Shin ,  Hong-Woo Lee

    发明人： Young-Ho Hong ,  Hyon-Jong Cho ,  Sung-Young Lee ,  Seung-Ho Shin ,  Hong-Woo Lee

    IPC分类号： C30B15/20 ,  C30B35/00

    CPC分类号： C30B15/14 ,  C30B15/203 ,  C30B15/206 ,  C30B29/06

    摘要： The present invention relates to a method for manufacturing an ultra low defect semiconductor single crystalline ingot, which uses a Czochralski process for growing a semiconductor single crystalline ingot through a solid-liquid interface by dipping a seed into a semiconductor melt received in a quartz crucible and slowly pulling up the seed while rotating the seed, wherein a defect-free margin is controlled by increasing or decreasing a heat space on a surface of the semiconductor melt according to change in length of the single crystalline ingot as progress of the single crystalline ingot growth process.

    摘要翻译： 本发明涉及一种用于制造超低缺陷半导体单晶锭的方法，该方法使用Czochralski工艺，通过将种子浸入容纳在石英坩埚中的半导体熔体中，通过固 - 液界面生长半导体单晶锭;以及 在旋转种子的同时慢慢拉起种子，其中随着单晶锭生长的进展，根据单晶锭的长度变化增加或减少半导体熔体的表面上的热空间来控制无缺陷边缘 处理。

    Apparatus and method for supplying solid raw material to single crystal grower
    3.
    发明申请
    Apparatus and method for supplying solid raw material to single crystal grower 审中-公开
    向单晶种植者提供固体原料的装置和方法

    公开(公告)号：US20080031720A1

    公开(公告)日：2008-02-07

    申请号：US11879465

    申请日：2007-07-17

    申请人： Gyeong-Ho Seo ,  In-Kyoo Lee ,  Sung-Young Lee ,  Hyon-Jong Cho

    发明人： Gyeong-Ho Seo ,  In-Kyoo Lee ,  Sung-Young Lee ,  Hyon-Jong Cho

    IPC分类号： C30B35/00 ,  F27D3/00

    CPC分类号： C30B29/06 ,  C30B15/02 ,  C30B29/08 ,  F27B14/061 ,  F27B14/0806 ,  F27B14/10 ,  F27B14/14 ,  F27B17/0016 ,  Y10T117/10

    摘要： The present invention relates to an apparatus and a method for supplying a solid raw material to a grower of silicon or germanium semiconductor single crystal. In the solid raw material supply apparatus including a cylindrical body mounted above a crucible for receiving the solid raw material therein, a bottom cover detachably installed in the lower end of the body and basically formed in the shape of a cone, and a connection means for relatively moving the bottom cover upwards and downwards with regard to the body, the conic bottom cover is made from the same material as a semiconductor to be grown to the single crystal and the solid raw material is charged while the bottom cover is spaced away from the melt in the crucible at a predetermined distance, thereby the bottom cover can be used repetitively, and even though the bottom cover is broken by shocks resulted from the fall of the solid raw material, fragments of the bottom cover do not contaminate the melt. Further, the present invention basically forms the bottom cover in the shape of a cone and variously changes or modifies the detailed shape and structure of the bottom cover, thereby preventing breakage of the bottom cover and uniformly dispersedly charging the solid raw material in the crucible.

    摘要翻译： 本发明涉及向硅或锗半导体单晶的种植者提供固体原料的装置和方法。 在固体原料供给装置中，包括安装在用于容纳固体原料的坩埚上方的圆筒体，可拆卸地安装在主体的下端并基本形成为锥体的连接装置， 相对于主体相对地使底盖向上和向下移动，锥形底盖由与要生长到单晶体的半导体相同的材料制成，并且固体原料被充电，同时底盖与 在坩埚中以预定距离熔化，从而可以重复使用底盖，即使底盖由于固体原料的下落而产生的冲击而被破坏，底盖的碎片也不会污染熔体。 此外，本发明基本上形成圆锥形的底盖，并且可以对底盖的详细形状和结构进行各种改变或改变，从而防止底盖断裂，并将固体原料均匀地分散在坩埚中。

    Methods of fabricating vertical twin-channel transistors
    5.
    发明授权
    Methods of fabricating vertical twin-channel transistors 失效
    制造垂直双通道晶体管的方法

    公开(公告)号：US07897463B2

    公开(公告)日：2011-03-01

    申请号：US12651688

    申请日：2010-01-04

    申请人： Eun-Jung Yun ,  Sung-Young Lee ,  Min-Sang Kim ,  Sung-Min Kim ,  Hye-Jin Cho

    发明人： Eun-Jung Yun ,  Sung-Young Lee ,  Min-Sang Kim ,  Sung-Min Kim ,  Hye-Jin Cho

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7827 ,  H01L29/0653 ,  H01L29/513 ,  H01L29/66666 ,  H01L29/7831

    摘要： A transistor includes first and second pairs of vertically overlaid source/drain regions on a substrate. Respective first and second vertical channel regions extend between the overlaid source/drain regions of respective ones of the first and second pairs of overlaid source/drain regions. Respective first and second insulation regions are disposed between the overlaid source/drain regions of the respective first and second pairs of overlaid source/drain regions and adjacent respective ones of the first and second vertical channel regions. Respective first and second gate insulators are disposed on respective ones of the first and second vertical channel regions. A gate electrode is disposed between the first and second gate insulators. The first and second vertical channel regions may be disposed near adjacent edges of the overlaid source/drain regions.

    摘要翻译： 晶体管包括在衬底上的第一对和第二对垂直重叠的源/漏区。 相应的第一和第二垂直沟道区域在第一和第二对覆盖的源极/漏极区域中的相应的第一和第二对重叠的源极/漏极区域之间延伸。 相应的第一和第二绝缘区域设置在相应的第一和第二对重叠的源极/漏极区域的重叠的源极/漏极区域之间并且相邻的第一和第二垂直沟道区域中的相应的第一和第二绝缘区域。 相应的第一和第二栅极绝缘体设置在第一和第二垂直沟道区域中的相应的一个上。 栅电极设置在第一和第二栅极绝缘体之间。 第一和第二垂直沟道区域可以设置在覆盖的源极/漏极区域的邻近边缘附近。

    Methods of Forming Semiconductor-On-Insulating (SOI) Field Effect Transistors with Body Contacts
    7.
    发明申请
    Methods of Forming Semiconductor-On-Insulating (SOI) Field Effect Transistors with Body Contacts 有权
    形成具有体接触的半导体绝缘（SOI）场效应晶体管的方法

    公开(公告)号：US20100167474A1

    公开(公告)日：2010-07-01

    申请号：US12721944

    申请日：2010-03-11

    申请人： Sung-Young Lee ,  Dong-suk Shin

    发明人： Sung-Young Lee ,  Dong-suk Shin

    IPC分类号： H01L21/336

    CPC分类号： H01L29/66651 ,  H01L29/0653 ,  H01L29/66553 ,  H01L29/66606 ,  H01L29/66628 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78612 ,  H01L29/78654

    摘要： Semiconductor-on-insulator (SOI) field effect transistors include a semiconductor substrate and a first semiconductor active region on a first portion of a surface of the substrate. A first electrically insulating layer is provided. This first electrically insulating layer extends on a second portion of the surface of the substrate and also on a first sidewall of the first semiconductor active region. A second electrically insulating layer is provided, which extends on a third portion of the surface of the semiconductor substrate. The second electrically insulating layer also extends on a second sidewall of the first semiconductor active region. A second semiconductor active region is provided on the first semiconductor active region. The second semiconductor active region extends on the first semiconductor active region and on ends of the first and second electrically insulating layers. Source and drain regions are also provided, which are electrically coupled to opposite ends of the second semiconductor active region. An insulated gate electrode extends on the second semiconductor active region and opposite the first semiconductor active region.

    摘要翻译： 绝缘体上半导体（SOI）场效应晶体管包括在衬底表面的第一部分上的半导体衬底和第一半导体有源区。 提供第一电绝缘层。 该第一电绝缘层在衬底的表面的第二部分上以及在第一半导体有源区的第一侧壁上延伸。 提供了第二电绝缘层，其在半导体衬底的表面的第三部分上延伸。 第二电绝缘层也在第一半导体有源区的第二侧壁上延伸。 第二半导体有源区设置在第一半导体有源区上。 第二半导体有源区在第一半导体有源区和第一和第二电绝缘层的端部上延伸。 还提供了源极和漏极区域，其电耦合到第二半导体有源区域的相对端。 绝缘栅电极在第二半导体有源区上延伸并与第一半导体有源区相对。

    Heat rod assembly and pre-heater for vehicles including the same
    8.
    发明授权
    Heat rod assembly and pre-heater for vehicles including the same 有权
    用于包括相同车辆的热棒组件和预热器

    公开(公告)号：US07378614B2

    公开(公告)日：2008-05-27

    申请号：US10579840

    申请日：2004-08-03

    申请人： Sung-Young Lee

    发明人： Sung-Young Lee

    IPC分类号： B60L1/02

    CPC分类号： F24H3/0429 ,  F24H3/0405 ,  F24H3/0435 ,  F24H3/0447 ,  F24H3/047 ,  F24H9/1872 ,  H05B3/14 ,  H05B3/50 ,  H05B2203/02

    摘要： A heat rod assembly for preheating internal air of a vehicle by using heat generated from a positive temperature coefficient (PCT) device and a pre-heater for vehicles including the same, in which components of the heat rod assembly and the pre-heater are grouped as module units so that a width and a volume of the heat rod assembly or the pre-heater can be variously formed so that the heat rod assembly or the pre-heater is adaptable for various kinds of vehicles.

    摘要翻译： 一种用于通过使用由正温度系数（PCT）装置产生的热量和包括其的车辆的预热器来预热车辆的内部空气的热棒组件，其中热棒组件和预热器的部件被分组 作为模块单元，使得可以不同地形成热棒组件或预热器的宽度和体积，使得热棒组件或预热器适用于各种车辆。

    Methods of forming a pattern and methods of manufacturing a memory device using the same
    10.
    发明申请
    Methods of forming a pattern and methods of manufacturing a memory device using the same 有权
    形成图案的方法和使用该图案的存储器件的制造方法

    公开(公告)号：US20080081442A1

    公开(公告)日：2008-04-03

    申请号：US11605266

    申请日：2006-11-29

    申请人： Min-Sang Kim ,  Sung-Young Lee ,  Sung-Min Kim ,  Eun-Jung Yun ,  In-Hyuk Choi

    发明人： Min-Sang Kim ,  Sung-Young Lee ,  Sung-Min Kim ,  Eun-Jung Yun ,  In-Hyuk Choi

    IPC分类号： H01L21/20

    CPC分类号： H01L27/115 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02587 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02664 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/66795 ,  H01L29/66833 ,  H01L29/785 ,  H01L29/792

    摘要： In a method of forming a pattern, a sacrificial layer pattern and a stop layer pattern for preventing or reducing an epitaxial growth may be formed on a substrate. The sacrificial layer pattern may have a first hole therethrough, and the first hole partially exposes a top surface of the substrate. At least one active pattern may be formed on a bottom and a sidewall of the first hole by performing a selective epitaxial growth process on the top surface of the substrate and a sidewall of the sacrificial layer pattern. The sacrificial layer pattern and the stop layer pattern for preventing or reducing the epitaxial growth may be removed from the substrate. The at least one active pattern formed by the above method may have a finer size and an improved shaped compared to a conventional active pattern formed by directly patterning layers using a photoresist pattern. Damages in a photolithography process may be prevented or reduced from being generated.

    摘要翻译： 在形成图案的方法中，可以在基板上形成用于防止或减少外延生长的牺牲层图案和停止层图案。 牺牲层图案可以具有穿过其的第一孔，并且第一孔部分地暴露衬底的顶表面。 通过在衬底的顶表面和牺牲层图案的侧壁上执行选择性外延生长工艺，可以在第一孔的底部和侧壁上形成至少一个活性图案。 可以从衬底去除用于防止或减少外延生长的牺牲层图案和停止层图案。 与通过使用光致抗蚀剂图案直接图案化图案形成的常规有源图案相比，通过上述方法形成的至少一个有源图案可以具有更细的尺寸和改进的形状。 可以防止或减少光刻工艺中的损伤。