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    Chip package and method for forming the same
    8.
    发明授权
    Chip package and method for forming the same 有权
    芯片封装及其形成方法

    公开(公告)号：US09024437B2

    公开(公告)日：2015-05-05

    申请号：US13524985

    申请日：2012-06-15

    申请人： Yu-Lin Yen ,  Chien-Hui Chen ,  Tsang-Yu Liu ,  Yen-Shih Ho

    发明人： Yu-Lin Yen ,  Chien-Hui Chen ,  Tsang-Yu Liu ,  Yen-Shih Ho

    IPC分类号： H01L23/48 ,  H01L21/78 ,  H01L23/31

    CPC分类号： H01L23/3128 ,  H01L23/3114 ,  H01L23/481 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2924/1461 ,  H01L2924/014 ,  H01L2924/00

    摘要： An embodiment of the invention provides a chip package which includes: a substrate having a plurality of sides and a plurality of corner regions, wherein each of the corner regions is located at an intersection of at least two of the sides of the substrate; a device region formed in the substrate; a conducting layer disposed on the substrate and electrically connected to the device region; an insulating layer disposed between the substrate and the conducting layer; and a carrier substrate, wherein the substrate is disposed on the carrier substrate, and the substrate has a recess extending towards the carrier substrate in at least one of the corner regions.

    摘要翻译： 本发明的实施例提供一种芯片封装，其包括：具有多个侧面和多个拐角区域的基板，其中每个所述拐角区域位于所述基板的至少两个侧面的相交处; 形成在所述基板中的器件区域; 导电层，其设置在所述基板上并电连接到所述器件区域; 设置在所述基板和所述导电层之间的绝缘层; 以及载体基板，其中所述基板设置在所述载体基板上，并且所述基板具有在至少一个所述拐角区域中朝向所述载体基板延伸的凹部。

    Chip package and method for fabricating the same
    9.
    发明授权
    Chip package and method for fabricating the same 有权
    芯片封装及其制造方法

    公开(公告)号：US08207615B2

    公开(公告)日：2012-06-26

    申请号：US13010478

    申请日：2011-01-20

    申请人： Bai-Yao Lou ,  Tsang-Yu Liu ,  Long-Sheng Yeou

    发明人： Bai-Yao Lou ,  Tsang-Yu Liu ,  Long-Sheng Yeou

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49827 ,  H01L27/14618 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2924/1461 ,  H01L2924/00

    摘要： An embodiment of the invention provides a chip package, which includes a substrate having an upper surface and a lower surface, a chip disposed in or on the substrate, a pad disposed in or on the substrate and electrically connected to the chip, a hole extending from the lower surface toward the upper surface, exposing the pad, wherein a lower opening of the hole near the lower surface has a width that is shorter than that of an upper opening of the hole near the upper surface, an insulating layer located overlying a sidewall of the hole, and a conducting layer located overlying the insulating layer and electrically connected to the pad.

    摘要翻译： 本发明的实施例提供了一种芯片封装，其包括具有上表面和下表面的基板，设置在基板中或基板上的芯片，设置在基板中或基板上并与芯片电连接的焊盘， 从下表面向上表面露出焊盘，其中靠近下表面的孔的下开口具有比上表面附近的孔的上开口短的宽度，绝缘层位于 孔的侧壁，以及位于绝缘层上方并电连接到焊盘的导电层。