公开(公告)号：US06977213B1

公开(公告)日：2005-12-20

申请号：US10928612

申请日：2004-08-27

申请人： Yu-Ying Tsai ,  Shih-Ming Chen ,  Kuo-Wei Lin

发明人： Yu-Ying Tsai ,  Shih-Ming Chen ,  Kuo-Wei Lin

IPC分类号： H01L21/44 ,  H01L21/60 ,  H01L23/485

CPC分类号： H01L24/12 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13012 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00

摘要： Disclosed herein are a method of manufacturing a solder bump on a semiconductor device, a solder bump structure formed on a substrate, and an intermediate solder bump structure. In one embodiment, the method includes creating a bonding pad over a semiconductor substrate, and placing a mask layer over the substrate and the bonding pad. The method also includes forming an opening in the mask layer having a primary solder mold and at least one secondary solder mold joined with the primary mold, where the opening exposes a portion of the bonding pad. In this embodiment, the method further includes filling the primary solder mold and the at least one secondary solder mold with solder material to form corresponding primary and at least one secondary solder columns in electrical contact with the bonding pad. The method also includes removing the mask layer after the filling of the solder molds with the solder material. The method still further includes reflowing the solder material to form a primary solder bump from the solder material of the primary solder column and at least a portion of the solder material from the at least one secondary solder column through cohesion of the solder material from the at least one secondary solder column to the primary solder column when melted.

摘要翻译： 本文公开了一种在半导体器件上制造焊料凸块的方法，形成在基板上的焊料凸块结构和中间焊料凸块结构。 在一个实施例中，该方法包括在半导体衬底上形成接合焊盘，并将掩模层放置在衬底和焊盘上。 该方法还包括在掩模层中形成具有初级焊料模具的开口和与初级模具连接的至少一个次级焊接模具，其中开口暴露焊接区的一部分。 在该实施例中，该方法还包括用焊料材料填充主焊料模具和至少一个二次焊接模具，以形成与焊盘电接触的相应的初级和至少一个次级焊料柱。 该方法还包括在用焊料材料填充焊料模具之后去除掩模层。 该方法还包括回流焊料材料以从主焊料柱的焊料材料形成主要焊料凸点，并且通过焊料材料与焊料的内聚力从至少一个辅助焊料柱形成至少一部分焊料材料 当熔化时，至少一个辅助焊料柱到主焊料柱。

公开(公告)号：US07884471B2

公开(公告)日：2011-02-08

申请号：US11306015

申请日：2005-12-14

申请人： Yu-Ying Tsai ,  Shih-Ming Chen ,  Kuo-Wei Lin

发明人： Yu-Ying Tsai ,  Shih-Ming Chen ,  Kuo-Wei Lin

IPC分类号： H01L29/40

CPC分类号： H01L24/12 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13012 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00

摘要： Disclosed herein are intermediate and solder bump structures. In one embodiment, a structure comprises a primary solder column comprising primary solder material and configured to electrically contact a bonding pad on a semiconductor substrate. The structure also comprises at least one secondary solder column comprising secondary solder material in electrical contact with the primary solder column, the at least one secondary column having a height and volume less than a height and volume of the primary solder column. In such structures, the primary solder column is further configured to form a primary solder bump comprising the primary solder material and at least a portion of the secondary solder material through cohesion from the at least one secondary solder column when the intermediate structure undergoes a reflow process.

摘要翻译： 本文公开了中间和焊料凸块结构。 在一个实施例中，结构包括主焊料柱，其包括主焊料材料并且被配置为电接触半导体衬底上的焊盘。 该结构还包括至少一个辅助焊料柱，其包括与主焊料柱电接触的次要焊料材料，所述至少一个第二柱具有小于主焊料柱的高度和体积的高度和体积。 在这种结构中，主焊料柱进一步构造成当中间结构经历回流工艺时，通过与至少一个次级焊料柱的内聚形成包括主焊料材料和至少一部分辅助焊料材料的主要焊料凸块 。

公开(公告)号：US20060199300A1

公开(公告)日：2006-09-07

申请号：US11306015

申请日：2005-12-14

申请人： Yu-Ying Tsai ,  Shih-Ming Chen ,  Kuo-Wei Lin

发明人： Yu-Ying Tsai ,  Shih-Ming Chen ,  Kuo-Wei Lin

IPC分类号： H01L21/00 ,  H01L23/48

CPC分类号： H01L24/12 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13012 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00

摘要： Disclosed herein are intermediate and solder bump structures. In one embodiment, a structure comprises a primary solder column comprising primary solder material and configured to electrically contact a bonding pad on a semiconductor substrate. The structure also comprises at least one secondary solder column comprising secondary solder material in electrical contact with the primary solder column, the at least one secondary column having a height and volume less than a height and volume of the primary solder column. In such structures, the primary solder column is further configured to form a primary solder bump comprising the primary solder material and at least a portion of the secondary solder material through cohesion from the at least one secondary solder column when the intermediate structure undergoes a reflow process.

摘要翻译： 本文公开了中间和焊料凸块结构。 在一个实施例中，结构包括主焊料柱，其包括主焊料材料并且被配置为电接触半导体衬底上的焊盘。 该结构还包括至少一个辅助焊料柱，其包括与主焊料柱电接触的次要焊料材料，所述至少一个第二柱具有小于主焊料柱的高度和体积的高度和体积。 在这种结构中，主焊料柱进一步构造成当中间结构经历回流工艺时，通过与至少一个次级焊料柱的内聚形成包括主焊料材料和至少一部分辅助焊料材料的主要焊料凸块 。

公开(公告)号：US20110292690A1

公开(公告)日：2011-12-01

申请号：US13064650

申请日：2011-04-06

申请人： Tsorng-Juu Liang ,  Jiann-Fuh Chen ,  Kuo-Ching Tseng ,  Shih-Ming Chen

发明人： Tsorng-Juu Liang ,  Jiann-Fuh Chen ,  Kuo-Ching Tseng ,  Shih-Ming Chen

IPC分类号： H02M3/335

CPC分类号： H02M3/155

摘要： A multi-winding high step-up DC-DC converter includes a three-winding transformer to transform a low DC voltage to a high DC voltage; a power switch to control the energy flux of the primary winding of the three-winding transformer based on turning on/off the power switch; a first diode to control the current of the first secondary winding of the three-winding transformer; a second diode to control the current of the second secondary winding of the three-winding transformer; and a third diode to control the current of the primary winding. When the DC-DC converter is in the first operation state, the switch and the second diode are in on state, and the first and the third diodes are in off state. When the DC-DC converter is in the second operation state, the switch and the second diode are in off state, and the first and the third diodes are in on state.

摘要翻译： 多绕组高升压DC-DC转换器包括一个三绕组变压器，用于将低直流电压转换成高直流电压; 电源开关，用于控制三绕组变压器的初级绕组的能量通量，其基于电源开关的接通/断开; 用于控制三绕组变压器的第一次级绕组的电流的第一二极管; 用于控制三绕组变压器的第二次级绕组的电流的第二二极管; 以及用于控制初级绕组的电流的第三二极管。 当DC-DC转换器处于第一操作状态时，开关和第二二极管处于导通状态，第一和第三二极管处于断开状态。 当DC-DC转换器处于第二操作状态时，开关和第二二极管处于截止状态，第一和第三二极管处于导通状态。

公开(公告)号：US07854522B2

公开(公告)日：2010-12-21

申请号：US12402150

申请日：2009-03-11

申请人： Li-Ching Wang ,  Shih-Ming Chen ,  Jia-Chi Huang ,  Chih-Kuang Chen

发明人： Li-Ching Wang ,  Shih-Ming Chen ,  Jia-Chi Huang ,  Chih-Kuang Chen

IPC分类号： G02B1/11 ,  B05D5/06

CPC分类号： B82Y20/00 ,  G02B5/0226 ,  G02B5/0242 ,  G02B5/0268 ,  G02B2207/101

摘要： The invention provides an antiglare film. A resin layer is disposed on a substrate. Micro-aggregates are distributed in an interior and over a surface of the resin layer. Each of the micro aggregates has a size of 0.1-3 μm and is formed by aggregating aggregated nano-particles. The micro-aggregates distributing over the surface result in a surface roughness of the resin layer. The weight ratio of the resin layer to the micro-aggregates is 1:0.1-0.7.

摘要翻译： 本发明提供防眩膜。 树脂层设置在基板上。 微聚集体分布在树脂层的内部和表面上。 每个微聚集体具有0.1-3μm的尺寸，并且通过聚集聚集的纳米颗粒形成。 分布在表面上的微团聚体导致树脂层的表面粗糙度。 树脂层与微团聚体的重量比为1：0.1-0.7。

公开(公告)号：US07486442B2

公开(公告)日：2009-02-03

申请号：US10954824

申请日：2004-09-30

申请人： Jong-Min Liu ,  Shih-Ming Chen ,  Young-Jen Lee ,  Tzong-Ming Lee

发明人： Jong-Min Liu ,  Shih-Ming Chen ,  Young-Jen Lee ,  Tzong-Ming Lee

IPC分类号： G02B5/30

CPC分类号： G02B1/14 ,  G02B1/105 ,  G02B5/3033 ,  G02F1/133528 ,  Y10T428/10 ,  Y10T428/25

摘要： A protective film for a polarizer. An exemplary polarizer protective film includes a transparent resin with nanoscale particles dispersed therein, having an average diameter not exceeding 50 nanometers.

摘要翻译： 用于偏振器的保护膜。 示例性的偏振器保护膜包括其中分散有纳米级颗粒的透明树脂，平均直径不超过50纳米。

公开(公告)号：US07456816B2

公开(公告)日：2008-11-25

申请号：US11101169

申请日：2005-04-07

申请人： Shih-Ming Chen

发明人： Shih-Ming Chen

IPC分类号： G09G3/36

CPC分类号： H05B41/2824 ,  G09G3/3406 ,  G09G3/3614 ,  G09G2310/08 ,  G09G2320/0247 ,  H05B41/36

摘要： The invention relates to a lamp frequency control system for a display and method for controlling the lamp frequency. The lamp frequency control system comprises a driving control device and a lamp frequency control device. The driving control device has a driving mode selector for selecting a driving mode from at least two driving modes. According to the selected driving mode, the driving mode selector outputs at least one corresponding frequency control signal. According to the corresponding frequency control signal, the lamp frequency control device obtains at least one corresponding lamp frequency. According to the various driving mode, the lamp frequency control system of the invention obtains the corresponding lamp frequency. That is, the lamp frequency can be adjusted to match the driving mode. Therefore, the lamp frequency can be adjusted at a frequency section without the water flow interference. The lamp frequency control system of the invention can resolve the water flow interference.

摘要翻译： 本发明涉及一种用于显示的灯频率控制系统和用于控制灯频率的方法。 灯频率控制系统包括驱动控制装置和灯频率控制装置。 驱动控制装置具有用于从至少两种驱动模式选择驱动模式的驱动模式选择器。 根据所选择的驱动模式，驱动模式选择器输出至少一个对应的频率控制信号。 根据相应的频率控制信号，灯频率控制装置获得至少一个对应的灯频率。 根据各种驱动模式，本发明的灯频控制系统获得相应的灯频率。 也就是说，可以调节灯频率以匹配驾驶模式。 因此，可以在没有水流干扰的频率部分调节灯频率。 本发明的灯频控制系统可以解决水流干扰。

公开(公告)号：US20060110834A1

公开(公告)日：2006-05-25

申请号：US11079085

申请日：2005-03-15

申请人： Yi-Ping Wang ,  Yao-Chung Cheng ,  Shih-Ming Chen

发明人： Yi-Ping Wang ,  Yao-Chung Cheng ,  Shih-Ming Chen

IPC分类号： G01N31/22

CPC分类号： G01N30/88 ,  G01N30/96 ,  G01N2030/8809 ,  G01N2030/8886 ,  G02B5/3025

摘要： A method of real-time monitoring the variation of dye solution in the process of a polarizer is provided that an ion chromatography is utilized to measure the variation of a reduction in the dye solution and analyze the components therein; moreover, an ion meter is utilized to measure the concentration of the dye solution.

摘要翻译： 提供了一种在偏光镜的过程中实时监测染料溶液变化的方法，其中使用离子色谱来测量染料溶液中的还原的变化并分析其中的成分; 此外，使用离子计来测量染料溶液的浓度。

公开(公告)号：US20050258780A1

公开(公告)日：2005-11-24

申请号：US11101169

申请日：2005-04-07

申请人： Shih-Ming Chen

发明人： Shih-Ming Chen

IPC分类号： H05B41/24 ,  G05F1/00 ,  G09G3/20 ,  G09G3/34 ,  G09G3/36 ,  H05B41/282 ,  H05B41/36

CPC分类号： H05B41/2824 ,  G09G3/3406 ,  G09G3/3614 ,  G09G2310/08 ,  G09G2320/0247 ,  H05B41/36

摘要： The invention relates to a lamp frequency control system for a display and method for controlling the lamp frequency. The lamp frequency control system comprises a driving control device and a lamp frequency control device. The driving control device has a driving mode selector for selecting a driving mode from at least two driving modes. According to the selected driving mode, the driving mode selector outputs at least one corresponding frequency control signal. According to the corresponding frequency control signal, the lamp frequency control device obtains at least one corresponding lamp frequency. According to the various driving mode, the lamp frequency control system of the invention obtains the corresponding lamp frequency. That is, the lamp frequency can be adjusted to match the driving mode. Therefore, the lamp frequency can be adjusted at a frequency section without the water flow interference. The lamp frequency control system of the invention can resolve the water flow interference.

摘要翻译： 本发明涉及一种用于显示的灯频率控制系统和用于控制灯频率的方法。 灯频控制系统包括驱动控制装置和灯频控制装置。 驱动控制装置具有用于从至少两种驱动模式选择驱动模式的驱动模式选择器。 根据所选择的驱动模式，驱动模式选择器输出至少一个对应的频率控制信号。 根据相应的频率控制信号，灯频率控制装置获得至少一个对应的灯频率。 根据各种驱动模式，本发明的灯频控制系统获得相应的灯频率。 也就是说，可以调节灯频率以匹配驾驶模式。 因此，可以在没有水流干扰的频率部分调节灯频率。 本发明的灯频控制系统可以解决水流干扰。

公开(公告)号：US06916702B2

公开(公告)日：2005-07-12

申请号：US10951763

申请日：2004-09-29

申请人： Shih-Ming Chen ,  Hsiao-Ying Yang

发明人： Shih-Ming Chen ,  Hsiao-Ying Yang

IPC分类号： H01L21/00 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/105

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11531

摘要： A gate process and a gate process for an embedded memory device. A semiconductor silicon substrate has a memory cell area and a logic circuit area. A first dielectric layer is formed overlying the semiconductor silicon substrate, and then a gate structure is formed overlying the first dielectric layer of the memory cell area. Next, a protective layer is formed overlying the first dielectric layer and the top and sidewall of the gate structure. Next, an insulating spacer is formed overlying the protective layer disposed overlying the sidewall of the gate structure. Next, a pre-cleaning process is performed to remove the protective layer and the first dielectric layer overlying the logic circuit area. Next, a second dielectric layer is formed overlying the logic circuit area, and then a gate layer is formed overlying the second dielectric layer of the logic circuit area.

摘要翻译： 嵌入式存储器件的栅极处理和栅极处理。 半导体硅衬底具有存储单元区域和逻辑电路区域。 在半导体硅衬底上形成第一电介质层，然后形成覆盖在存储单元区域的第一介电层上的栅极结构。 接下来，形成覆盖第一电介质层和栅极结构的顶部和侧壁的保护层。 接下来，形成覆盖在栅极结构的侧壁上的保护层的绝缘间隔物。 接下来，执行预清洁处理以去除覆盖在逻辑电路区域上的保护层和第一介电层。 接下来，形成覆盖逻辑电路区域的第二介电层，然后形成覆盖逻辑电路区域的第二介电层的栅极层。