公开(公告)号：US07323376B2

公开(公告)日：2008-01-29

申请号：US10736605

申请日：2003-12-17

申请人： Yutaka Hirose ,  Yoshito Ikeda ,  Kaoru Inoue

发明人： Yutaka Hirose ,  Yoshito Ikeda ,  Kaoru Inoue

IPC分类号： H01L21/338

CPC分类号： H01L21/28581 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/475 ,  H01L29/66462

摘要： A semiconductor device has a Group III nitride semiconductor layer and a gate electrode formed on the Group III nitride semiconductor layer. The gate electrode contains an adhesion enhancing element. A thermally oxidized insulating film is interposed between the Group III nitride semiconductor layer and the gate electrode.

摘要翻译： 半导体器件具有形成在III族氮化物半导体层上的III族氮化物半导体层和栅电极。 栅极电极含有粘附增强元件。 在III族氮化物半导体层和栅电极之间插入热氧化绝缘膜。

公开(公告)号：US07078743B2

公开(公告)日：2006-07-18

申请号：US10834362

申请日：2004-04-29

申请人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

发明人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

IPC分类号： H01L31/0328

CPC分类号： H01L29/7787 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766

摘要： A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1-xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1-yN; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.

摘要翻译： 半导体器件具有：形成在导电基板上并具有高电阻的Al x Ga 1-x N的缓冲层; 形成在缓冲层上的元件形成层，具有沟道层，由未掺杂的GaN和N型Al y Ga 1-y N制成; 以及选择性地形成在元件形成层上的源电极，漏电极和栅电极。 源电极被填充在设置在缓冲层和元件形成层中的通孔中，因此电连接到导电基板。

公开(公告)号：US20050189651A1

公开(公告)日：2005-09-01

申请号：US10625546

申请日：2003-07-24

申请人： Yutaka Hirose ,  Yoshito Ikeda ,  Kaoru Inoue

发明人： Yutaka Hirose ,  Yoshito Ikeda ,  Kaoru Inoue

IPC分类号： H01L21/285 ,  H01L23/48 ,  H01L33/00 ,  H01L33/32 ,  H01L33/40 ,  H01S5/042 ,  H01S5/323

CPC分类号： H01L21/28575 ,  H01L33/0095 ,  H01L33/32 ,  H01L33/40 ,  H01S5/0425 ,  H01S5/32341

摘要： An object of the present invention is to reduce the resistance of an electrode of a Group III nitride semiconductor. A thin Si film and a thin Ti film are formed selectively in a contact formation region on a surface of an AlGaN layer as a Group III nitride semiconductor layer formed on a substrate, and the resulting substrate is heat-treated at a high temperature. By the heat treatment, Si is diffused into the AlGaN layer in the ohmic contact formation region at a concentration of about 1020 cm3. Further, an electron density sufficiently high to provide an ohmic characteristic through a reaction between Si and Ti is provided. Thus, a low resistance TiSi2 portion resulting from the reaction between Si and Ti, a TiN portion resulting from a reaction between Ti and AlGaN and a Group III metal portion of Ga and Al devoid of nitrogen are formed in the contact formation region thereby to provide a low resistance electrode film mainly comprising TiSi2.

摘要翻译： 本发明的目的是降低III族氮化物半导体的电极的电阻。 在AlGaN层的表面上的接触形成区域中选择性地形成薄的Si膜和薄的Ti膜，作为形成在衬底上的III族氮化物半导体层，并将所得到的衬底在高温下进行热处理。 通过热处理，Si在欧姆接触形成区域中扩散到约10 20 cm 3的浓度的AlGaN层中。 此外，提供足够高的电子密度以通过Si和Ti之间的反应提供欧姆特性。 因此，形成由Si和Ti之间的反应产生的低电阻TiSi 2 H 2部分，由Ti和AlGaN之间的反应导致的TiN部分和缺少氮的Ga和Al的III族金属部分 在接触形成区域中，由此提供主要包含TiSi 2 N的低电阻电极膜。

公开(公告)号：US20050001235A1

公开(公告)日：2005-01-06

申请号：US10834362

申请日：2004-04-29

申请人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

发明人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

IPC分类号： H01L21/20 ,  H01L21/28 ,  H01L21/338 ,  H01L29/20 ,  H01L29/417 ,  H01L29/778 ,  H01L29/812 ,  H01L31/0328 ,  H01S5/30

CPC分类号： H01L29/7787 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766

摘要： A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1-xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1-yN; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.

摘要翻译： 半导体器件具有：形成在导电基板上并由高电阻的Al x Ga 1-x N构成的缓冲层; 形成在缓冲层上的元件形成层，具有沟道层，由未掺杂的GaN和N型Al y Ga 1-y N制成; 以及选择性地形成在元件形成层上的源电极，漏电极和栅电极。 源电极被填充在设置在缓冲层和元件形成层中的通孔中，因此电连接到导电基板。

公开(公告)号：US06770922B2

公开(公告)日：2004-08-03

申请号：US10372979

申请日：2003-02-26

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L2976

CPC分类号： H01L29/513 ,  H01L21/28264 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

摘要： A semiconductor device has a first semiconductor layer composed of a group III-V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III-V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.

摘要翻译： 半导体器件具有由III-V族氮化物构成的第一半导体层，通过氧化由位于第一半导体层的栅电极形成区域上的III-V族氮化物构成的第二半导体层而形成的氧化膜， 在氧化膜上形成的绝缘膜具有与氧化膜的组成不同的组成，以及形成在绝缘膜上的栅电极。

公开(公告)号：US20080083933A1

公开(公告)日：2008-04-10

申请号：US11984723

申请日：2007-11-21

申请人： Yutaka Hirose ,  Yoshito Ikeda ,  Kaoru Inoue

发明人： Yutaka Hirose ,  Yoshito Ikeda ,  Kaoru Inoue

IPC分类号： H01L29/778

CPC分类号： H01L21/28581 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/475 ,  H01L29/66462

摘要： A semiconductor device has a Group III nitride semiconductor layer and a gate electrode formed on the Group III nitride semiconductor layer. The gate electrode contains an adhesion enhancing element. A thermally oxidized insulating film is interposed between the Group III nitride semiconductor layer and the gate electrode.

摘要翻译： 半导体器件具有形成在III族氮化物半导体层上的III族氮化物半导体层和栅电极。 栅极电极含有粘附增强元件。 在III族氮化物半导体层和栅电极之间插入热氧化绝缘膜。

公开(公告)号：US07122451B2

公开(公告)日：2006-10-17

申请号：US10785944

申请日：2004-02-26

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L21/26 ,  H01L21/28 ,  H01L21/44

CPC分类号： H01L29/66878 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66462 ,  H01L29/8126

摘要： A semiconductor device has an active region composed of a group III–V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.

摘要翻译： 半导体器件具有由III-V族氮化物半导体和欧姆电极构成的有源区域和分别形成在有源区域上的栅电极。 有源区域的整个表面暴露于等离子体，使得其中的电子的表面电位低于整个表面不暴露于等离子体的情况。

公开(公告)号：US07037817B2

公开(公告)日：2006-05-02

申请号：US10889028

申请日：2004-07-13

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L21/4763

CPC分类号： H01L29/513 ,  H01L21/28264 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

摘要： A semiconductor device has a first semiconductor layer composed of a group III–V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III–V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.

公开(公告)号：US06737683B2

公开(公告)日：2004-05-18

申请号：US10372079

申请日：2003-02-25

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L310328

CPC分类号： H01L29/66878 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66462 ,  H01L29/8126

摘要： A semiconductor device has an active region composed of a group III-V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.

摘要翻译： 半导体器件具有由III-V族氮化物半导体和欧姆电极构成的有源区域和分别形成在有源区域上的栅电极。 有源区域的整个表面暴露于等离子体，使得其中的电子的表面电位低于整个表面不暴露于等离子体的情况。

公开(公告)号：US07339207B2

公开(公告)日：2008-03-04

申请号：US11455631

申请日：2006-06-20

申请人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

发明人： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

IPC分类号： H01L31/0328

CPC分类号： H01L29/7787 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766

摘要： A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1−xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1−N; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.

摘要翻译： 半导体器件具有：形成在导电衬底上并具有高电阻的Al x Ga 1-x N的缓冲层; 形成在缓冲层上的元件形成层，具有沟道层，由未掺杂的GaN和N型Al y Ga 1-y N构成; 以及选择性地形成在元件形成层上的源电极，漏电极和栅电极。