公开(公告)号：US20130308375A1

公开(公告)日：2013-11-21

申请号：US13954899

申请日：2013-07-30

Applicant: MagSil Corporation

Inventor： Krishnakumar Mani

IPC: G11C11/16

CPC classification number: G11C11/165 ,  G11C5/06 ,  G11C11/161 ,  G11C11/1659

Abstract: A semiconductor integrated circuit comprising a first circuit area for a low voltage operation and a second circuit area for a high voltage operation. The circuit areas comprise two vertically stacked backend patterned metal layers that are separated by an inter-metallic dielectric (IMD). The two metal layers and the IMD form a combination that is operable at the low voltage. The first circuit area uses a first portion of the combination for operating at the low voltage and the second circuit area uses a second portion of the combination for routing at the high voltage, the two metal layers in the second portion being interconnected through the IMD by via hole, for withstanding the high voltage. The first portion may comprise an array of magnetic random access memory (MRAM) devices and the second circuit area may comprise a display drive circuit.

Abstract translation: 一种半导体集成电路，包括用于低电压操作的第一电路区域和用于高电压操作的第二电路区域。 电路区域包括由金属间电介质（IMD）隔开的两个垂直堆叠的后端图案化金属层。 两个金属层和IMD形成在低电压下可操作的组合。 第一电路区域使用组合的第一部分在低电压下操作，并且第二电路区域使用组合的第二部分以高电压路由，第二部分中的两个金属层通过IMD互连通过IMD互连 通孔，用于承受高电压。 第一部分可以包括磁性随机存取存储器（MRAM）装置的阵列，并且第二电路区域可以包括显示驱动电路。

公开(公告)号：US08320175B2

公开(公告)日：2012-11-27

申请号：US12714401

申请日：2010-02-26

Applicant: Krishnakumar Mani ,  Jannier Maximo Roiz Wilson ,  Kimihiro Satoh

Inventor： Krishnakumar Mani ,  Jannier Maximo Roiz Wilson ,  Kimihiro Satoh

IPC: G11C11/14

CPC classification number: H01L27/222 ,  G11C11/1659 ,  G11C11/1675

Abstract: Disclosed is a nonvolatile magnetic memory cell, comprising: a) a switchable magnetic element; b) a word line and a bit line to energize the switchable magnetic element; and c) a magnetic field boosting material positioned adjacent to at least one of the word line and the bit line to boost a magnetic field generated by current flowing therein.

Abstract translation: 公开了一种非易失性磁存储单元，包括：a）可切换磁性元件; b）字线和位线，以激励可切换的磁性元件; 以及c）与所述字线和所述位线中的至少一个相邻定位的磁场增强材料，以增加在其中流动的电流产生的磁场。

公开(公告)号：US20150055410A1

公开(公告)日：2015-02-26

申请号：US13153471

申请日：2011-06-06

Applicant: Krishnakumar Mani

Inventor： Krishnakumar Mani

IPC: G11C11/14

CPC classification number: G11C11/14 ,  G11C7/14 ,  G11C7/24 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1695 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08

Abstract: Memory circuit and method for at least partially dissipating an external magnetic field before the magnetic field affects operation of an array of addressable magnetic storage element stacks in the memory circuit. Multiple dummy magnetic storage element stacks are provided around the periphery of the array. Each of the dummy stacks is substantially circular for orienting along the external magnetic field, thereby causing the dissipation. Each of the addressable and the dummy stacks may be formed with a magnetic tunnel junction (MTJ).

Abstract translation: 用于在磁场影响存储器电路中的可寻址磁存储元件堆阵列的操作之前至少部分耗散外部磁场的存储器电路和方法。 围绕阵列周边设置多个虚拟磁存储元件堆叠。 每个虚拟堆叠基本上是圆形的，用于沿着外部磁场定向，从而导致耗散。 可寻址和虚拟堆叠中的每一个可以形成有磁性隧道结（MTJ）。

公开(公告)号：US20150023096A1

公开(公告)日：2015-01-22

申请号：US13442829

申请日：2012-04-09

Applicant: Jannier Maximo Roiz Wilson

Inventor： Jannier Maximo Roiz Wilson

IPC: G11C11/15

CPC classification number: G11C11/00 ,  G11C11/15

Abstract: A magnetic memory cell is provided. The cell comprises first and second free layers; and an intermediate layer separating the first and second free layers, wherein the first and second free layers are magnetostatically coupled.

Abstract translation: 提供磁存储单元。 该电池包括第一和第二自由层; 以及分离第一和第二自由层的中间层，其中第一和第二自由层被静磁耦合。

公开(公告)号：US20150021724A1

公开(公告)日：2015-01-22

申请号：US13444805

申请日：2012-04-11

Applicant: Krishnakumar Mani

Inventor： Krishnakumar Mani

IPC: H01L43/02

CPC classification number: H01L43/12 ,  G11C11/161 ,  H01L27/222 ,  H01L43/08

Abstract: Embodiments of the invention disclose magnetic memory cell configurations in which a magnetic storage structure is coupled to an upper metal layer with minimal overlay margin. This greatly reduces a size of the memory cell.

Abstract translation: 本发明的实施例公开了磁存储单元配置，其中磁存储结构以最小的覆盖裕度耦合到上金属层。 这大大减小了存储单元的大小。

公开(公告)号：US08248845B2

公开(公告)日：2012-08-21

申请号：US11701322

申请日：2007-01-31

Applicant: Krish Mani

Inventor： Krish Mani

IPC: G11C11/14 ,  G11C11/02 ,  G11C5/06 ,  G11C5/08 ,  G11C5/02

CPC classification number: G11C11/16

Abstract: A horizontally disposed elliptical or rectangular magnetic memory cell includes at least two conductive lines to carry current and a magnetic element disposed between the conductive lines. The current through the conductive lines induces a magnetic field, such that the magnetic element is directly accessible. The magnetic memory cell can be sensed with a GMR head.

Abstract translation: 水平设置的椭圆形或矩形磁性存储单元包括至少两条用于承载电流的导线和设置在导线之间的磁性元件。 通过导线的电流引起磁场，使得磁性元件可以直接接近。 可以用GMR头来感测磁存储单元。

公开(公告)号：US07894252B2

公开(公告)日：2011-02-22

申请号：US12690049

申请日：2010-01-19

Applicant: Krishnakumar Mani

Inventor： Krishnakumar Mani

IPC: G11C11/00

CPC classification number: G01R33/091 ,  G11C11/161 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673

Abstract: A magnetic memory cell in which a sensor is magnetically coupled to a magnetic media wherein the separation of the magnetic media from the sensor permits each to be magnetically optimized separate from the other, thus improving defect tolerance and minimizing the magnetic influence of neighboring cells in an array on one another. In an embodiment, the read circuitry is positioned so that no read current passes through the media during a read operation. In an alternative embodiment, processing is simplified but the read current is allowed to pass through the media.

Abstract translation: 一种磁性存储单元，其中传感器磁耦合到磁介质，其中磁介质与传感器的分离允许每个磁性介质与其他磁体分离，从而提高缺陷容限并最小化邻近单元的磁影响 阵列在另一个。 在一个实施例中，读取电路被定位成使得在读取操作期间没有读取电流通过介质。 在替代实施例中，简化了处理，但允许读取电流通过介质。

公开(公告)号：US20150031146A1

公开(公告)日：2015-01-29

申请号：US13424337

申请日：2012-03-19

Applicant: Krishnakumar Mani

Inventor： Krishnakumar Mani

IPC: H01L21/263 ,  H05B6/10

CPC classification number: H05B6/10 ,  H01L21/67109 ,  H01L21/6719

Abstract: In one embodiment of the invention, there is provided a tool for annealing a magnetic stack. The tool includes a housing defining a heating chamber; a holding mechanism to hold at least one wafer in a single line within the heating chamber, a heating mechanism to heat the at least one wafer; and a magnetic field generator to generate a magnetic field whose field lines pass through the single line of wafers during a magnetic annealing process; wherein the holding mechanism comprises a wafer support of holding the single line of wafers between the heating mechanism and the magnetic field generator. The tool may be a rapid thermal processor retrofitted with the magnetic field generator.

Abstract translation: 在本发明的一个实施例中，提供了一种用于退火磁性堆叠的工具。 该工具包括限定加热室的壳体; 保持机构，用于在所述加热室内的一条线中保持至少一个晶片;加热机构，用于加热所述至少一个晶片; 以及磁场发生器，用于产生磁场，其磁场线在磁退火过程中通过单线晶圆; 其中所述保持机构包括在所述加热机构和所述磁场发生器之间保持单线晶片的晶片支撑件。 该工具可以是用磁场发生器改装的快速热处理器。

公开(公告)号：US20140042569A1

公开(公告)日：2014-02-13

申请号：US14029778

申请日：2013-09-17

Applicant: MagSil Corporation

Inventor： Krishnakumar Mani

IPC: G11C11/16 ,  H01L43/02 ,  H01L43/12

CPC classification number: G11C11/161 ,  G11C7/02 ,  G11C11/02 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/5607 ,  H01L27/222 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

Abstract: Magnetic memory cell comprising two conductors and a magnetic storage element between the two conductors, wherein a magnetic enhancement layer (MEL) is provided in the proximity of at least along a partial length of at least one of the two conductors. The MEL is for enhancing a magnetic field in the element when the two conductors are energized. Methods for operation and fabrication process for the memory cell are also disclosed. The memory cell is particularly for use in magnetic random access memory (MRAM) circuits, when using magnetic tunnel junction (MTJ) stacks as the magnetic storage elements.

Abstract translation: 磁性存储单元包括两个导体和两个导体之间的磁存储元件，其中在至少沿两个导体中的至少一个的部分长度附近提供磁增强层（MEL）。 当两个导体通电时，MEL用于增强元件中的磁场。 还公开了用于存储单元的操作和制造工艺的方法。 当使用磁隧道结（MTJ）堆叠作为磁存储元件时，存储单元特别用于磁随机存取存储器（MRAM）电路。

公开(公告)号：US20110032755A1

公开(公告)日：2011-02-10

申请号：US12852335

申请日：2010-08-06

Applicant: Krishnakumar Mani ,  Anil Gupta

Inventor： Krishnakumar Mani ,  Anil Gupta

IPC: G11C11/14 ,  G11C8/08

CPC classification number: G11C11/16 ,  G11C5/145 ,  G11C8/08

Abstract: Disclosed is a current driving mechanism for a magnetic memory device, comprising: a) a current driver circuit; and b) a current decoding block coupled to the current driver circuit, wherein the current decoding block comprises a transistor M18 to control driver currents from the current driver circuit, and wherein the transistor M18 has a smaller form factor then otherwise possible by virtue of maintaining a gate thereof at a negative voltage.

Abstract translation: 公开了一种用于磁存储器件的电流驱动机构，包括：a）电流驱动电路; 以及b）耦合到当前驱动器电路的当前解码块，其中当前解码块包括用于控制来自当前驱动器电路的驱动器电流的晶体管M18，并且其中晶体管M18具有较小的形状因数，否则可以通过维持 其栅极处于负电压。