Timing-phase control system for duobinary transmission
    1.
    发明授权
    Timing-phase control system for duobinary transmission 失效
    双向传输定时相位控制系统

    公开(公告)号:US4207528A

    公开(公告)日:1980-06-10

    申请号:US12090

    申请日:1979-02-14

    申请人: Akira Sawai

    发明人: Akira Sawai

    CPC分类号: H04L7/0062 H04L7/027

    摘要: A timing-phase control system provided on the receiving side of a duobinary transmission system is adaptable to high-speed PCM repeater systems using a wide-band transmission medium such as a coaxial cable. The system includes a discriminating and regenerating circuit for recovering the transmitted digital signal by discriminating and regenerating in an appropriate timing phase based on an input equalized duobinary waveform, a phase varying circuit for varying the phase of a timing signal externally supplied to the discriminating and regenerating circuit, and a derivative waveform generating circuit. In one embodiment, the derivative waveform generating circuit is responsive to the output of the discriminating and regenerating circuit, and a multiplier multiplies the output of the derivative waveform generating circuit and the equalized duobinary waveform by each other in a predetermined phase relationship. In another embodiment, the derivative waveform generating circuit differentiates the equalized duobinary waveform on a time scale, and a multiplier multiplies the output of this differentiating circuit and that of the discriminating and regenerating circuit in a predetermined phase relationship. In either case, a low-pass amplifier amplifies the output of the multiplier to provide, with a suitable D.C. offset, a negative feedback signal to the phase varying circuit.

    摘要翻译: 在双二进制传输系统的接收侧设置的定时相位控制系统适用于使用诸如同轴电缆的宽带传输介质的高速PCM中继器系统。 该系统包括识别和再生电路,用于基于输入的均衡二进制波形在适当的定时相位中鉴别和再生来恢复所发送的数字信号;相变电路,用于改变外部提供给识别和再生的定时信号的相位 电路和导数波形发生电路。 在一个实施例中,导数波形发生电路响应鉴别和再生电路的输出,乘法器将导数波形发生电路的输出和均衡的双二进制波形以预定的相位关系彼此相乘。 在另一实施例中,微分波形发生电路使均衡的双二进制波形在时间尺度上进行微分,并且乘法器将该微分电路的输出与鉴别和再生电路的输出以预定的相位关系相乘。 在任一种情况下,低通放大器放大乘法器的输出,以将适当的直流偏移提供给相变电路的负反馈信号。

    LIQUID CRYSTAL LENS MANUFACTURING METHOD AND LIQUID CRYSTAL LENS
    2.
    发明申请
    LIQUID CRYSTAL LENS MANUFACTURING METHOD AND LIQUID CRYSTAL LENS 有权
    液晶镜头制造方法和液晶镜头

    公开(公告)号:US20130169920A1

    公开(公告)日:2013-07-04

    申请号:US13822301

    申请日:2012-01-26

    申请人: Masanori Wada

    发明人: Masanori Wada

    IPC分类号: G02F1/1335

    摘要: Provided are a method for manufacturing a liquid crystal lens which, even with the use of a thin sheet glass as a glass sheet for dividing a liquid crystal layer, can reduce the likelihood of breakage of the thin sheet glass in the production process and the liquid crystal lens. A mother liquid crystal lens having a plurality of liquid crystal lens units arrayed in a longitudinal direction thereof is cut for each of the liquid crystal lens units to separate out the liquid crystal lens units and thus manufacture respective liquid crystal lenses 10. Longitudinally extending side surfaces 13c, 13d, 14c, and 14d of glass ribbons which provide thin sheet glasses 13 and 14 have an outwardly bulging curved shape in a cross section perpendicular to the longitudinal direction.

    摘要翻译: 提供一种制造液晶透镜的方法,即使使用薄板玻璃作为用于分割液晶层的玻璃板,也可以减少在制造过程中薄板玻璃的破裂的可能性,液体 水晶镜头。 对于每个液晶透镜单元切割具有沿其纵向方向排列的多个液晶透镜单元的母液晶透镜,以分离出液晶透镜单元,从而制造各自的液晶透镜10.纵向延伸的侧表面 提供薄片玻璃13和14的玻璃带的13c,13d,14c和14d在垂直于纵向方向的横截面中具有向外凸出的弯曲形状。

    Surface acoustic wave device
    3.
    发明授权
    Surface acoustic wave device 失效
    表面声波装置

    公开(公告)号:US5939817A

    公开(公告)日:1999-08-17

    申请号:US531594

    申请日:1995-09-21

    申请人: Heiji Takado

    发明人: Heiji Takado

    IPC分类号: H03H9/05 H01L41/053

    摘要: A surface acoustic wave element 11 having an inter digital electrode 12 formed on one surface of a piezo-electric substrate is arranged in a recess of a package 13 with the one surface being faced to a bottom surface of the recess of the package 13. An elastic conductive pad 35 having pads electrically connected to the electrode of the surface acoustic wave element 11 and electrodes of the package 13 is provided between the one surface of the surface acoustic wave element 11 and the package 13. The conductive pad 35 includes wiring means 35a, with which it is possible to connect the surface acoustic wave element 11 to the package 13 even when the position of the surface acoustic wave element in which the interdigital electrode is formed is deviated from the position of the electrodes of the package 13. The package 13 includes a cap 30 for pressing down the surface acoustic wave element 11. The surface acoustic wave element 11 is mounted on the conductive pad 35 in the package 13 with a surface of the surface acoustic wave element 11 on which the interdigital electrode is formed being down. Since the package 13 is hermetically sealed by the cap 30 while the surface acoustic wave element 11 being pressed down, the wire bonding becomes unnecessary, causing mounting to be facilitated. Further, the improvement of the quality of the device and its miniaturization are realized.

    摘要翻译: 具有形成在压电基板的一个表面上的数字间电极12的表面声波元件11被布置在封装13的凹部中,该一个表面面向封装13的凹部的底表面。 具有与声表面波元件11的电极电连接的焊盘和封装体13的电极的弹性导电焊盘35设置在表面声波元件11的一个表面和封装13之间。导电焊盘35包括布线装置35a 即使当形成叉指电极的表面声波元件的位置偏离了封装13的电极的位置时,也可以将表面声波元件11连接到封装13。 13包括用于按压表面声波元件11的盖30.声表面波元件11安装在封装13中的导电垫35上, 形成交叉指型电极的表面声波元件11的表面被倒下。 由于在按压表面声波元件11的同时,封装13被盖30气密地密封,所以不需要引线接合,从而便于安装。 此外,实现了设备的质量的提高及其小型化。

    Noncontacting charging device
    4.
    发明授权
    Noncontacting charging device 失效
    非接触充电装置

    公开(公告)号:US5600225A

    公开(公告)日:1997-02-04

    申请号:US492628

    申请日:1995-06-20

    申请人: Masataka Goto

    发明人: Masataka Goto

    CPC分类号: H02J7/0004 H02J7/025

    摘要: A non-contacting charging device is disclosed which performs charging in which electric power of a charger 1 is supplied without direct contact to a storage battery 210, and which includes in the charger 1 a primary coil 103 and circuits 104, 105 for supplying AC power to the primary coil, and also includes in the radio communication device having a storage battery 210, a secondary coil 212 that couples electromagnetically with the primary coil 103 and a circuit 211 for supplying the induced current power generated in the secondary coil to the storage battery as charging power. This device is provided with halt signal generating circuits 203, 209, and 214 for generating a halt signal that commands a halt of supply of AC power to the primary coil, and a halting circuit for halting supply of AC power to the primary coil in response to a halt signal, the halt signal generating circuit being provided in the radio communication device. If it is necessary to make or receive a call during charging of the radio communication device, a halt signal is generated on the radio communication device side to halt charging, thereby eliminating the attractive force caused by the electromagnetic induction in effect between the radio communication device and the charger, and allowing removal of the radio communication device from the charger with a minimum of effort.

    摘要翻译: 公开了一种非接触充电装置,其执行充电器1的电力而不直接接触蓄电池210的充电,并且在充电器1中包括初级线圈103和用于提供AC电力的电路104,105 并且还包括在具有蓄电池210的无线电通信装置,与初级线圈103电磁耦合的次级线圈212和用于将次级线圈中产生的感应电流电力提供给蓄电池的电路211 作为充电电源。 该装置设置有用于产生停止向初级线圈供应AC电力的停止信号的停止信号发生电路203,209和214,以及响应于停止向初级线圈提供AC电力的停止电路 停止信号产生电路设置在无线电通信装置中。 如果在无线电通信装置的充电期间需要进行呼叫或接收呼叫,则在无线电通信装置侧产生停止信号以停止充电,从而消除由无线电通信装置之间的电磁感应引起的吸引力 和充电器,并且以最小的努力允许从充电器移除无线电通信装置。

    Memory address control apparatus with separate translation look aside
buffers for a data processor using a virtual memory technique
    5.
    发明授权
    Memory address control apparatus with separate translation look aside buffers for a data processor using a virtual memory technique 失效
    具有单独转换的存储器地址控制装置使用虚拟存储器技术来处理数据处理器的缓冲器

    公开(公告)号:US4727484A

    公开(公告)日:1988-02-23

    申请号:US945991

    申请日:1986-12-24

    申请人: Masato Saito

    发明人: Masato Saito

    CPC分类号: G06F12/0848

    摘要: A memory control apparatus for a data processor using a virtual memory technique includes two cache memories one for storing a portion of the instructions located in the main memory (MMU), the other for storing a portion of the operand data located in main memory. A separate translation look aside buffer (TLB) is connected to each cache memory, with the TLB connected to the cache memory storing instructions operating to translate logical addresses to real addresses in the MMU storing instructions, while the TLB connected to the cache memory storing operand data operating to translate logical addresses to real addresses in the MMU storing operand data.

    摘要翻译: 用于使用虚拟存储器技术的数据处理器的存储器控​​制装置包括两个高速缓存存储器,一个用于存储位于主存储器(MMU)中的指令的一部分,另一个用于存储位于主存储器中的操作数数据的一部分。 单独的翻译旁边缓冲器(TLB)连接到每个高速缓冲存储器,其中TLB连接到高速缓存存储器,其存储指令,其操作以将逻辑地址转换为MMU存储指令中的实际地址,而连接到高速缓冲存储器的TLB存储操作数 用于将逻辑地址转换为存储操作数数据的MMU中的实际地址的数据。

    Tri-state output circuit provided with means for protecting against
abnormal voltage applied to output terminal
    6.
    发明授权
    Tri-state output circuit provided with means for protecting against abnormal voltage applied to output terminal 失效
    三态输出电路具有防止施加到输出端的异常电压的装置

    公开(公告)号:US4717846A

    公开(公告)日:1988-01-05

    申请号:US912197

    申请日:1986-09-25

    申请人: Manabu Ando

    发明人: Manabu Ando

    CPC分类号: H03K19/00315

    摘要: An output circuit protected by an abnormal voltage supplied at an output terminal is disclosed. The output circuit comprises a first switching circuit includes first and second transistors connected in series for providing an output terminal with a first potential therethrough in response to a first logic state of a logic signal, a second switching circuit for providing the output terminal with a second potential in response to a second logic state of the logic signal, and means for making the first and second transistors non-conducting when the first switching circuit is disenabled.

    摘要翻译: 公开了一种由输出端提供的异常电压保护的输出电路。 输出电路包括第一开关电路,其包括串联连接的第一和第二晶体管,用于响应于逻辑信号的第一逻辑状态提供具有第一电位的输出端,第二开关电路用于向输出端提供第二 响应于逻辑信号的第二逻辑状态的电位,以及用于当第一开关电路不被使能时使第一和第二晶体管不导通的装置。

    Analog-to-digital converter
    7.
    发明授权
    Analog-to-digital converter 失效
    模数转换器

    公开(公告)号:US4644322A

    公开(公告)日:1987-02-17

    申请号:US435965

    申请日:1982-10-22

    申请人: Tsuneo Fujita

    发明人: Tsuneo Fujita

    IPC分类号: H03M1/36 H03M1/00 H03M7/16

    CPC分类号: H03M1/1071 H03M1/361

    摘要: A parallel comparison type A/D converter comprises a voltage divider having 2.sup.N divider junctions connected in series between a reference voltage terminal and a ground potential terminal, 2.sup.N comparators for receiving as reference voltages the outputs of the respective divider junctions, a position detection logic circuit for receiving the outputs of the comparators, an encoder for receiving the output of the position detection logic circuit, and a code converter for receiving the output of the first digital encoder. The encoder adopts the Gray code format, and the code converter converts the Gray code format into the binary code format.

    摘要翻译: 并联比较型A / D转换器包括:一个分压器,具有2N个分压器串联连接在一个参考电压端子和一个地电位端子之间; 2N个比较器,用于接收相应的分压器结点的输出作为参考电压,一个位置检测逻辑电路 用于接收比较器的输出,用于接收位置检测逻辑电路的输出的编码器和用于接收第一数字编码器的输出的代码转换器。 编码器采用格雷码格式,代码转换器将格雷码格式转换为二进制码格式。

    High speed-low power consuming IGFET integrated circuit
    8.
    发明授权
    High speed-low power consuming IGFET integrated circuit 失效
    高速低功耗IGFET集成电路

    公开(公告)号:US4635088A

    公开(公告)日:1987-01-06

    申请号:US661837

    申请日:1984-10-17

    申请人: Hirotugu Eguchi

    发明人: Hirotugu Eguchi

    摘要: An improved semiconductor device operable at a high-speed and with a low power consumption is disclosed. The device comprises a common impurity-doped region, a first insulated gate field effect transistor utilizing the common impurity-doped region as a drain thereof, a second insulated gate field effect transistor utilizing the common impurity-doped region as a drain thereof, control means for controlling switching operations of the first and second transistor at the same time and means for deriving an output signal from the common impurity-doped region.

    摘要翻译: 公开了一种以高速和低功耗工作的改进的半导体器件。 该器件包括公共杂质掺杂区域,利用公共杂质掺杂区域作为其漏极的第一绝缘栅场效应晶体管,利用公共杂质掺杂区域作为漏极的第二绝缘栅场效应晶体管,控制装置 用于同时控制第一和第二晶体管的开关操作和用于从公共杂质掺杂区域导出输出信号的装置。

    Continuous speech recognition system
    10.
    发明授权
    Continuous speech recognition system 失效
    连续语音识别系统

    公开(公告)号:US4592086A

    公开(公告)日:1986-05-27

    申请号:US447829

    申请日:1982-12-08

    IPC分类号: G10L15/12 G10L5/06

    CPC分类号: G10L15/12

    摘要: A continuous speech recognition system determines the similarity between input patterns and reference patterns over time such that similarities between previously spoken speech patterns and reference patterns are determined while speech continues to be spoken. Degrees of dissimilarity at arbitrary reference pattern word times are determined asymptotically and are recorded. The minimum degree of dissimilarity is determined and the corresponding word is categorized. Recognition decisions are ultimately made in reverse chronological order.

    摘要翻译: 连续语音识别系统确定输入模式和参考模式随时间的相似性,使得在语音继续被说出的同时确定先前说出的语音模式和参考模式之间的相似性。 任意参考模式字时间的不相似度渐近确定并被记录。 确定最小程度的不相似性并对相应的词进行分类。 识别决定最终按照时间顺序排列。