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17 条记录 (耗时 0.014 秒)

    Systems and methods for protection of audio amplifier circuits
    3.
    发明授权
    Systems and methods for protection of audio amplifier circuits 失效
    用于保护音频放大器电路的系统和方法

    公开(公告)号：US07706545B2

    公开(公告)日：2010-04-27

    申请号：US10805594

    申请日：2004-03-19

    申请人： Michael A. Kost ,  Jack B. Andersen ,  Wilson E. Taylor

    发明人： Michael A. Kost ,  Jack B. Andersen ,  Wilson E. Taylor

    IPC分类号： H03G11/00 ,  H03G7/00 ,  H04B15/00 ,  H02B1/00

    CPC分类号： H04L7/02 ,  H03F1/523 ,  H03F3/2171 ,  H03F2200/331 ,  H03F2200/342 ,  H03F2200/351 ,  H03G7/007 ,  H04L7/005

    摘要： Systems and methods for providing protection from failure events in a digital audio amplification system. One embodiment of the invention comprises a system having a digital amplifier controller, an amplifier output stage coupled to the controller and configured to receive audio signals from the controller, one or more sensors coupled to the output stage and one or more low-pass filters coupled to receive sensor signals from the one or more sensors. The low-pass filter is configured to filter the sensor signals and to provide the filtered sensor signals to the controller, which provides a programmable response to the filtered sensor signals. The response may range from not taking any action, to limiting the amplification of audio signals, to shutting down the system.

    摘要翻译： 用于提供数字音频放大系统中的故障事件保护的系统和方法。 本发明的一个实施例包括具有数字放大器控制器的系统，放大器输出级，其耦合到控制器并且被配置为从控制器接收音频信号，耦合到输出级的一个或多个传感器和耦合到输出级的一个或多个低通滤波器 以从一个或多个传感器接收传感器信号。 低通滤波器被配置为对传感器信号进行滤波，并将滤波后的传感器信号提供给控制器，该控制器为滤波后的传感器信号提供可编程响应。 响应可能不在于采取任何行动，限制音频信号的放大，关闭系统。

    Multi-reference, high-accuracy switching amplifier
    5.
    发明授权
    Multi-reference, high-accuracy switching amplifier 失效
    多参考，高精度开关放大器

    公开(公告)号：US06535058B1

    公开(公告)日：2003-03-18

    申请号：US09831595

    申请日：2001-05-11

    申请人： Larry Kirn

    发明人： Larry Kirn

    IPC分类号： H03F338

    CPC分类号： H03F3/217 ,  H03F3/2173 ,  H03F2200/342 ,  H03F2200/516

    摘要： A switching amplifier employs a plurality of independent output stages in a bridged configuration, with each output stage presenting the product of an independent duty cycle and two or more static of dynamic reference voltages, currents or powers to a single terminal of a common output load. A plurality of electrically controlled switches (207, 208, 209, 210, 211, 212) interconnect the references to the load (218), with a waveform generator (220) controlling the switches for a coarse and fine control of power to the load. The waveform generator preferably uses pulse-code modulation (PCM), though the invention is not limited in this regard, and is applicable to any modulation scheme or waveform suitable to sequence the electrically controlled switches. The load is preferably filtered on either side, and return paths for the power supplies (i.e., ground) are connected through separate switches to the load through the filters (213, 214, 215, 216, 217). The amplifier may be used for audio or other applications benefitting from the design.

    摘要翻译： 开关放大器采用桥接配置中的多个独立输出级，每个输出级呈现独立占空比和两个或更多静态的动态参考电压，电流或功率的乘积到公共输出负载的单个端子。 多个电控开关（207,208,209,210,211,212）将参考连接到负载（218），波形发生器（220）控制开关以粗略和精确地控制负载的功率 。 波形发生器优选地使用脉冲编码调制（PCM），尽管本发明在这方面不受限制，并且可应用于任何适于对电控开关进行排序的调制方案或波形。 负载优选在任一侧进行过滤，并且用于电源（即接地）的返回路径通过分离的开关通过过滤器（213,214,215,216,217）连接到负载。 该放大器可用于从设计中受益的音频或其他应用。

    Digital amplifier, pulse width modulator thereof and method for reducing pop noise for the same
    6.
    发明授权
    Digital amplifier, pulse width modulator thereof and method for reducing pop noise for the same 有权
    数字放大器，其脉冲宽度调制器和用于减少其噪声的方法

    公开(公告)号：US07508873B2

    公开(公告)日：2009-03-24

    申请号：US11192293

    申请日：2005-07-28

    申请人： Tae Ho Kim ,  Jong Hoon Oh

    发明人： Tae Ho Kim ,  Jong Hoon Oh

    IPC分类号： H03K7/08 ,  H03K9/08

    CPC分类号： H03F3/217 ,  H03F1/26 ,  H03F1/305 ,  H03F2200/342 ,  H03F2200/351

    摘要： A pulse width modulator for use in a digital amplifier, includes a pop noise reducer for reducing pop noise by controlling a width and a phase of a pulse of a PWM signal output from the pulse width modulator, wherein the pop noise reducer contains: a PWM pulse register for storing a width and a phase values of a pulse of the PWM signal; and a pulse generator for outputting the PWM signal according to the values stored in the PWM pulse register. The pulse width modulator reduces pop noise generated when power supply to a digital amplifier is started and interrupted.

    摘要翻译： 一种用于数字放大器的脉冲宽度调制器，包括一个用于通过控制从脉宽调制器输出的PWM信号的脉冲宽度和相位来减少弹出噪声的弹出式噪声减小器，其中弹出噪声减小器包括：PWM 脉冲寄存器，用于存储PWM信号的脉冲的宽度和相位值; 以及用于根据存储在PWM脉冲寄存器中的值输出PWM信号的脉冲发生器。 脉冲宽度调制器可以减少对数字放大器的电源开始和中断时产生的弹出噪声。

    Automute detection in digital audio amplifiers
    8.
    发明申请
    Automute detection in digital audio amplifiers 有权
    数字音频放大器中的自动检测

    公开(公告)号：US20070005160A1

    公开(公告)日：2007-01-04

    申请号：US11119572

    申请日：2005-05-02

    申请人： David Zaucha ,  Venkateswar Kowkutla ,  Anker Bjorn-Josefsen ,  Lars Risbo ,  Douglas Roberson ,  Josey Angilivelil

    发明人： David Zaucha ,  Venkateswar Kowkutla ,  Anker Bjorn-Josefsen ,  Lars Risbo ,  Douglas Roberson ,  Josey Angilivelil

    IPC分类号： G06F17/00

    CPC分类号： H03F3/72 ,  H03F1/12 ,  H03F1/26 ,  H03F1/305 ,  H03F3/181 ,  H03F3/217 ,  H03F3/68 ,  H03F2200/03 ,  H03F2200/331 ,  H03F2200/342 ,  H03F2200/351 ,  H03G3/341

    摘要： A digital audio processor (20) for a digital audio receiver (21) having an improved automute sequence is disclosed. The digital audio processor (20) includes automute detection circuitry (42) that monitors the amplitude of digital audio signals before and after the application of digital filters by digital audio processing circuitry (20d). The amplitude of the input signals are compared against a first threshold level, while the amplitude of the output signals are compared against a second threshold level. In response to the amplitude of the input signals for all of the audio channels (44) falling below the first threshold for a selected time period, a gain stage (50) in each channel ramps down the volume to a mute level, and pulse-width-modulation circuitry (54) is disabled. If the output signal amplitude falls below a second threshold for a channel, the pulse-width-modulation circuitry (54) for that channel is disabled. Hysteresis for the input signal amplitude is preferably added into the automute exit determination.

    摘要翻译： 公开了一种用于具有改进的自动序列的数字音频接收器（21）的数字音频处理器（20）。 数字音频处理器（20）包括自动检测电路（42），其在由数字音频处理电路（20d）应用数字滤波器之前和之后监视数字音频信号的幅度。 将输入信号的幅度与第一阈值电平进行比较，同时将输出信号的幅度与第二阈值电平进行比较。 响应于在所选择的时间周期内所有音频通道（44）的输入信号的幅度低于第一阈值，每个通道中的增益级（50）将音量降低到静音电平， 宽度调制电路（54）被禁用。 如果输出信号幅度低于通道的第二阈值，则该通道的脉宽调制电路（54）被禁用。 输入信号振幅的迟滞最好加在自动出口确定中。

    PWM power amplifier
    9.
    发明申请
    PWM power amplifier 有权
    PWM功率放大器

    公开(公告)号：US20020036579A1

    公开(公告)日：2002-03-28

    申请号：US09921643

    申请日：2001-08-03

    申请人： STMicroelectronics S.r.l.

    发明人： Antonio Grosso ,  Edoardo Botti

    IPC分类号： H03M001/66

    CPC分类号： H03M1/825 ,  G06F1/025 ,  H03F3/217 ,  H03F2200/342 ,  H03F2200/351 ,  H03K7/08

    摘要： A PWM power amplifier having at least one PCM/PWM converter fed by PCM digital input signals and producing PWM digital output signals, and at least one power amplification final stage of the PWM digital output signals. At least one PCM/PWM converter includes a counter fed with at least one clock signal produced by a clock generator device and having a digital comparator suitable for comparing the PCM digital input signals of at least one PCM/PWM converter with a digital comparison signal produced by the counter and producing in output the PWM digital signals. The clock generator device includes a pulse generator device and an oscillator; the pulse generator device receives a signal at a frequency that is equal to the frequency of the PCM digital input signals of the at least one PCM/PWM converter and produces in output reset pulses. The reset pulses are sent in input to the oscillator, which produces in output the at least one clock signal.

    摘要翻译： 一个PWM功率放大器，具有由PCM数字输入信号馈送并产生PWM数字输出信号的至少一个PCM / PWM转换器，以及PWM数字输出信号的至少一个功率放大末级。 至少一个PCM / PWM转换器包括一个馈给至少一个由时钟发生器装置产生的时钟信号的计数器，并且具有数字比较器，适用于将至少一个PCM / PWM转换器的PCM数字输入信号与产生的数字比较信号进行比较 由计数器输出PWM数字信号。 时钟发生器装置包括脉冲发生器装置和振荡器; 脉冲发生器装置以等于至少一个PCM / PWM转换器的PCM数字输入信号的频率的频率接收信号，并产生输出复位脉冲。 复位脉冲在输入端发送到振荡器，在输出中产生至少一个时钟信号。

    Digital signal converter
    10.
    发明授权
    Digital signal converter 有权
    数字信号转换器

    公开(公告)号：US07961020B2

    公开(公告)日：2011-06-14

    申请号：US12293816

    申请日：2007-03-27

    申请人： Lusten L. A. H. Dooper ,  Arnaud A. P. Biallais

    发明人： Lusten L. A. H. Dooper ,  Arnaud A. P. Biallais

    IPC分类号： H03K3/017 ,  H03K5/04 ,  H03K7/08

    CPC分类号： H03M5/08 ,  H03F1/305 ,  H03F3/217 ,  H03F3/2175 ,  H03F2200/03 ,  H03F2200/342 ,  H03F2200/351 ,  H03F2200/372 ,  H03M1/0881 ,  H03M1/822

    摘要： A digital signal converter (CNV) converts a digital input signal (PCM) into a pulse width modulated signal (PWM), which is a binary signal that comprises pulses of varying width. The digital signal converter can operate in a signal mode and a transition mode. In the transition mode, the digital converter provides the pulse width modulated signal (PWM) by applying an anti-transient noise shaping function (NSH2) to a direct current modification signal (SC). In the signal mode, the digital signal converter provides the pulse width modulated signal by applying a signal noise shaping function (NSH1) to the digital input signal.

    摘要翻译： 数字信号转换器（CNV）将数字输入信号（PCM）转换成脉冲宽度调制信号（PWM），脉冲宽度调制信号是包含不同宽度脉冲的二进制信号。 数字信号转换器可以在信号模式和转换模式下工作。 在转换模式中，数字转换器通过将抗瞬态噪声整形功能（NSH2）应用于直流修正信号（SC）来提供脉宽调制信号（PWM）。 在信号模式中，数字信号转换器通过对数字输入信号施加信号噪声整形功能（NSH1）来提供脉宽调制信号。