-
1.发明公开公开(公告)号：US20240329303A1
公开(公告)日：2024-10-03
申请号：US18191013
申请日：2023-03-28
发明人： Michael L. FANTO , David HUCUL , Stefan PREBLE , Amos M. SMITH , Zachary SMITH , Kathy-Anne SODERBERG , Christopher TISON
摘要： Apparatus and method for minimum crosstalk between waveguides via on chip filtering and scatter mitigation necessary to provide tunable addressing of atomic memories. Methods are disclosed to improve the extinction ratio between coherent optical outputs capable of selectively striking a single atom in an array of atoms confined in a trapped memory.
-
公开(公告)号：US20240272357A1
公开(公告)日：2024-08-15
申请号：US18641731
申请日：2024-04-22
CPC分类号： G02B6/1228 , G02B6/1223 , G02B6/132 , G02B6/136
摘要： A spot-size converter for a photonic integrated circuit, comprising a substrate, and a waveguide. The waveguide comprises a first waveguide portion and a second waveguide portion. The first waveguide portion is on a first portion of the substrate. The second waveguide portion is on a second portion of the substrate. A size of the first waveguide portion in a first direction perpendicular to a light propagation direction of the waveguide is less than a size of the second waveguide portion in the first direction.
-
公开(公告)号：US12055755B1
公开(公告)日：2024-08-06
申请号：US17961043
申请日：2022-10-06
申请人： Psiquantum, Corp.
发明人： Eric Dudley
CPC分类号： G02B6/12004 , G01J1/0204 , G01J1/44 , G02B6/136 , G06N10/00 , G01J2001/442 , G02B2006/12135 , G02B2006/12138
摘要： A method includes fabricating a device including a first dielectric layer, an optical waveguide in the first dielectric layer, and a superconducting circuit in the first dielectric layer and on the optical waveguide. The method also includes forming a sacrificial structure on the first dielectric layer, the sacrificial structure aligned with the superconducting circuit, depositing a second dielectric layer on the sacrificial structure, and cutting an opening in the second dielectric layer to expose the sacrificial structure. The method further includes wet etching the sacrificial structure through the opening and sealing the opening in the second dielectric layer with a third dielectric layer to form a micro-channel between the first dielectric layer and the second dielectric layer.
-
公开(公告)号：US20240230990A1
公开(公告)日：2024-07-11
申请号：US18557444
申请日：2022-03-24
申请人： IHP GmbH-Innovations for High Performance Microelectronics/Leibniz-Instit. für innovative , Technische Hochschule Wildau
发明人： Patrick STEGLICH , Christian MAI , Andreas MAI , Francesco VILLASMUNTA , Claus VILLRINGER , Sigurd SCHRADER
CPC分类号： G02B6/122 , G02B6/136 , G02B6/43 , G02B2006/12121
摘要： An integrated optical waveguide formed in a substrate is disclosed. The integrated optical waveguide includes a hole, a core, and one or more bridges. The hole extends in an axial direction of the substrate. The core is made of the same material as the substrate, arranged in the hole, and extends in the axial direction. The core has a first refractive index and a sidewall which is at least partly surrounded by a surrounding material which has a second refractive index which is lower than the first refractive index and such that a refractive index difference between the first refractive index and the second refractive index allows to guide light within the core. The bridges extend from the sidewall of the core to a sidewall of the hole. The bridges may be made of the same material as the substrate. Furthermore, one or more of the sidewalls of the core, the hole, and the bridges may be tapered sidewalls which include a section which is oblique to the axial direction. Additionally an axial length of one or more of the bridges may be shorter than an axial length of the core.
-
公开(公告)号：US12032205B2
公开(公告)日：2024-07-09
申请号：US18469710
申请日：2023-09-19
发明人： Brian Mattis , Taran Huffman , Bryan Woo , Thien-An Nguyen
CPC分类号： G02B6/136 , G02B2006/12061 , G02B2006/12097 , G02B2006/12169 , G02B2006/12188 , G02B2006/12197
摘要： A method of co-manufacturing silicon waveguides, SiN waveguides, and semiconductor structures in a photonic integrated circuit. A silicon waveguide structure can be formed using a suitable process, after which it is buried in a cladding. The cladding is polished, and a silicon nitride layer is disposed to define a silicon nitride waveguide. The silicon nitride waveguide is buried in a cladding, and annealed. Thereafter, cladding above the silicon waveguide structure can be trenched through, and low-temperature operations can be performed to or with an exposed surface of the silicon waveguide structure.
-
公开(公告)号：US20240210625A1
公开(公告)日：2024-06-27
申请号：US18395038
申请日：2023-12-22
发明人： Debapam Bose , Jiawei Wang , Daniel J. Blumenthal
IPC分类号： G02B6/136
CPC分类号： G02B6/136 , C23C16/401
摘要： Disclosed herein is methods for fabricating ultra-low loss waveguides. One particular method may include: preparing a substrate including a lower cladding layer in a deposition chamber; flowing precursors including deuterated silane and nitrogen onto the lower cladding layer in the deposition chamber; subjecting the precursors to an inductively coupled plasma-plasma enhanced chemical vapor deposition (ICP-PECVD) process which disassociates the deuterated silane and nitrogen and deposits waveguide material of silicon nitride or silicon oxynitride onto the lower cladding layer; patterning the waveguide material into a patterned waveguide material; and depositing a top cladding layer on the patterned waveguide material, wherein the ICP-PECVD process occurs at a temperature less than or equal to 250° C. Advantageously, the ICP-PECVD process allows for deposition of low hydrogenated deposition of material layers which may allow for low temperature fabrication of ultra-low loss waveguides.
-
公开(公告)号：US20240201439A1
公开(公告)日：2024-06-20
申请号：US18166460
申请日：2023-02-08
发明人： Feng-Wei KUO , Wen-Shiang Liao
IPC分类号： G02B6/124 , G02B6/136 , H01L23/00 , H01L25/00 , H01L25/065
CPC分类号： G02B6/1245 , G02B6/136 , H01L24/16 , H01L24/73 , H01L25/0657 , H01L25/50 , G02B2006/12104 , H01L2224/16146 , H01L2224/16225 , H01L2224/73204 , H01L2225/06517 , H01L2225/06568
摘要： A semiconductor package and a manufacturing method thereof are provided. A die stack in the semiconductor package includes a photonic die and an electronic die stacked on the photonic die by a face-to-face manner. A convex lens is disposed at a back surface of the electronic die, and is formed in an oval shape, such that optical beams can be collimated to have circular beam shape, as passing through the convex lens. In some embodiments, the semiconductor package includes more of the die stacks, and includes an interposer lying below the die stacks. In these embodiments, tilted reflectors are formed in the photonic dies and the interposer, to set up vertical optical paths between the interposer and the photonic dies, and lateral optical paths in the interposer. In this way, optical communication between the photonic dies can be established.
-
公开(公告)号：US12013570B2
公开(公告)日：2024-06-18
申请号：US18094839
申请日：2023-01-09
发明人： Tao-Cheng Liu , Tsai-Hao Hung , Shih-Chi Kuo
IPC分类号： G02B6/136 , G02B5/18 , G02B6/122 , H01L21/306 , H01L21/308
CPC分类号： G02B6/136 , G02B5/1819 , G02B5/1857 , G02B6/1225 , H01L21/30608 , H01L21/3086
摘要： A method includes: forming a first plurality of tiers that each comprises first and second dummy layers over a substrate, wherein within each tier, the second dummy layer is disposed above the first dummy layer; forming a second plurality of recessed regions in the first plurality of tiers, wherein at least one subgroup of the second plurality of recessed regions extend through respective different numbers of the second dummy layers; and performing an etching operation to concurrently forming a third plurality of trenches with respective different depths in the substrate through the at least one subgroup of the second plurality of recessed regions.
-
公开(公告)号：US20240173930A1
公开(公告)日：2024-05-30
申请号：US18388660
申请日：2023-11-10
申请人： Magic Leap, Inc.
发明人： Mauro MELLI , Chieh Chang , Ling Li , Melanie Maputol WEST , Christophe Peroz , Ali KARBASI , Sharad D. Bhagat , Brian George HILL
CPC分类号： B29D11/00682 , B29C33/424 , G02B6/136 , G02B2006/12107 , G02B2006/12173 , G02B2006/12176
摘要： Methods are disclosed for fabricating molds for forming eyepieces having waveguides with integrated spacers. The molds are formed by etching deep holes (e.g., 5 μm to 1000 μm deep) into a substrate using a wet etch or dry etch. The etch masks for defining the holes may be formed with a thick metal layer and/or multiple layers of different metals. A resist layer may be disposed over the etch mask. The resist layer may be patterned to form a pattern of holes, the pattern may be transferred to the etch mask, and the etch mask may be used to transfer the pattern into the underlying substrate. The patterned substrate may be utilized as a mold onto which a flowable polymer may be introduced and allowed to harden. Hardened polymer in the holes may form integrated spacers. The hardened polymer may be removed from the mold to form a waveguide with integrated spacers.
-
公开(公告)号：US20240168229A1
公开(公告)日：2024-05-23
申请号：US18280239
申请日：2022-03-04
发明人： Andrew McKee
CPC分类号： G02B6/136 , G02B6/12002 , G02B6/12004 , G02B2006/12061
摘要： A photonic device has a waveguide, such as a ridge waveguide, defined by a waveguide etch, an etched facet defined by a facet etch and having an optical coupling region optically coupled to the waveguide, and a fiducial mark configured for alignment of an optical component, such as a photonic integrated circuit, to the optical coupling region. The fiducial mark has a first portion defined by at least a part of the waveguide etch and a second portion defined by at least a part of the facet etch. The first portion has an elongate broken bar shape that extends lengthwise along a direction parallel to the waveguide's propagation direction at the optical coupling region. The second portion includes an elongate shape that extends lengthwise orthogonally with respect to its etch depth and with respect to the waveguide's propagation direction at the optical coupling region.
-
-
-
-
-
-
-
-
-
搜索结果
1556 条记录 (耗时 0.033 秒)
