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公开(公告)号：US11532499B2
公开(公告)日：2022-12-20
申请号：US17182782
申请日：2021-02-23
发明人： Tsai-Hao Hung , Ping-Cheng Ko , Tzu-Yang Lin , Fang-Yu Liu , Cheng-Han Wu
IPC分类号： H01L21/687 , H01L21/677 , H01L21/67 , H05F1/00 , H01L21/66
摘要： Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.
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公开(公告)号：US11355544B2
公开(公告)日：2022-06-07
申请号：US16830966
申请日：2020-03-26
发明人： Shih-Yu Liao , Tsai-Hao Hung , Ying-Hsun Chen
IPC分类号： H01L27/14 , H01L27/146 , G01J1/44 , H04N5/369
摘要： The present disclosure describes a method for the formation of mirror micro-structures on radiation-sensing regions of image sensor devices. The method includes forming an opening within a front side surface of a substrate; forming a conformal implant layer on bottom and sidewall surfaces of the opening; growing a first epitaxial layer on the bottom and the sidewall surfaces of the opening; depositing a second epitaxial layer on the first epitaxial layer to fill the opening, where the second epitaxial layer forms a radiation-sensing region. The method further includes depositing a stack on exposed surfaces of the second epitaxial layer, where the stack includes alternating pairs of a high-refractive index material layer and a low-refractive index material layer.
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公开(公告)号：US11131541B2
公开(公告)日：2021-09-28
申请号：US16407799
申请日：2019-05-09
发明人： Shih-Yu Liao , Shih-Chi Kuo , Tsai-Hao Hung , Tsung-Hsien Lee
摘要： The present disclosure is directed to a method and system for monitoring a distance between a shutter and a reference point in a processing module. For example, the method includes moving a shutter relative to a substrate support in a wafer processing module and determining a distance between the shutter and a wall of the wafer processing module with a measurement device. In response to the distance being greater than a value, the method further includes transferring a substrate to the substrate support, and in response to the distance being equal to or less than the value, the method includes resetting the shutter.
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公开(公告)号：US10651237B2
公开(公告)日：2020-05-12
申请号：US16116308
申请日：2018-08-29
发明人： Chun-Chieh Mo , Shih-Chi Kuo , Tsai-Hao Hung
IPC分类号： H01L27/24 , H01L45/00 , C23C16/34 , H01L29/792 , H01L21/28 , H01L27/22 , H01L43/02 , H01L43/08 , H01L43/12 , H01L43/10
摘要： A memory includes: a dielectric fin formed over a substrate; and a pair of memory cells disposed along respective sidewalls of the dielectric fin, each of the pair of memory cells comprising: a first conductor layer; a selector layer; a resistive material layer; and a second conductor layer, wherein the first conductor layer, selector layer, resistive material layer, and second conductor layer each includes upper and lower boundaries, and at least one of the upper and lower boundaries is tilted away from one of the sidewalls of the dielectric fin by an angle.
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公开(公告)号：US10508020B2
公开(公告)日：2019-12-17
申请号：US15411957
申请日：2017-01-20
发明人： Tsai-Hao Hung , Shih-Chi Kuo , Tsung-Hsien Lee , Tao-Cheng Liu
摘要： The present disclosure provides a substrate structure for a micro electro mechanical system (MEMS) device. The substrate structure includes a cap and a micro electro mechanical system (MEMS) substrate. The cap has a cavity, and the MEMS substrate is disposed on the cap. The MEMS substrate has a plurality of through holes exposing the cavity, and an aspect ratio of the through hole is greater than 30.
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公开(公告)号：US11963368B2
公开(公告)日：2024-04-16
申请号：US17330295
申请日：2021-05-25
发明人： Chun-Chieh Mo , Shih-Chi Kuo , Tsai-Hao Hung
IPC分类号： H10B63/00 , H10B61/00 , H10N50/01 , H10N50/10 , H10N50/80 , H10N50/85 , H10N70/00 , H10N70/20
CPC分类号： H10B63/24 , H10B61/10 , H10B63/80 , H10N50/01 , H10N50/10 , H10N50/80 , H10N70/021 , H10N70/063 , H10N70/231 , H10N70/24 , H10N70/245 , H10N70/826 , H10N70/841 , H10N50/85 , H10N70/8825 , H10N70/8833 , H10N70/8845
摘要： A memory includes: a dielectric fin formed over a substrate; and a pair of memory cells disposed along respective sidewalls of the dielectric fin, each of the pair of memory cells comprising: a first conductor layer; a selector layer; a resistive material layer; and a second conductor layer, wherein the first conductor layer, selector layer, resistive material layer, and second conductor layer each includes upper and lower boundaries, and at least one of the upper and lower boundaries is tilted away from one of the sidewalls of the dielectric fin by an angle.
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公开(公告)号：US11923396B2
公开(公告)日：2024-03-05
申请号：US17723127
申请日：2022-04-18
发明人： Chun-Wei Hsu , Tsai-Hao Hung , Chung-Yu Lin , Ying-Hsun Chen
IPC分类号： H01L27/146 , H01L31/0232 , H01L31/0236 , H01L31/028 , H01L31/18 , H01L31/0296 , H01L31/0304 , H01L31/032
CPC分类号： H01L27/14643 , H01L27/14627 , H01L27/1463 , H01L27/14685 , H01L31/02327 , H01L31/02363 , H01L31/028 , H01L31/1804 , H01L27/14612 , H01L27/14636 , H01L31/02966 , H01L31/03046 , H01L31/0324 , H01L31/1808 , H01L31/1812 , H01L31/1832 , H01L31/1844
摘要： An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.
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公开(公告)号：US20220310679A1
公开(公告)日：2022-09-29
申请号：US17805573
申请日：2022-06-06
发明人： Shih-Yu Liao , Tsai-Hao Hung , Ying-Hsun Chen
IPC分类号： H01L27/146 , G01J1/44 , H04N5/369
摘要： The present disclosure describes a method for the formation of mirror micro-structures on radiation-sensing regions of image sensor devices. The method includes forming an opening within a front side surface of a substrate; forming a conformal implant layer on bottom and sidewall surfaces of the opening; growing a first epitaxial layer on the bottom and the sidewall surfaces of the opening; depositing a second epitaxial layer on the first epitaxial layer to fill the opening, where the second epitaxial layer forms a radiation-sensing region. The method further includes depositing a stack on exposed surfaces of the second epitaxial layer, where the stack includes alternating pairs of a high-refractive index material layer and a low-refractive index material layer.
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公开(公告)号：US11024671B2
公开(公告)日：2021-06-01
申请号：US16843635
申请日：2020-04-08
发明人： Chun-Chieh Mo , Shih-Chi Kuo , Tsai-Hao Hung
IPC分类号： H01L27/24 , C23C16/34 , H01L29/792 , H01L21/28 , H01L45/00 , H01L27/22 , H01L43/02 , H01L43/08 , H01L43/12 , H01L43/10
摘要： A memory includes: a dielectric fin formed over a substrate; and a pair of memory cells disposed along respective sidewalls of the dielectric fin, each of the pair of memory cells comprising: a first conductor layer; a selector layer; a resistive material layer; and a second conductor layer, wherein the first conductor layer, selector layer, resistive material layer, and second conductor layer each includes upper and lower boundaries, and at least one of the upper and lower boundaries is tilted away from one of the sidewalls of the dielectric fin by an angle.
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公开(公告)号：US20200227634A1
公开(公告)日：2020-07-16
申请号：US16834232
申请日：2020-03-30
发明人： Tsai-Hao Hung , Shih-Chi Kuo
摘要： A memory includes: a first electrode comprising a top boundary and a sidewall; a resistive material layer, disposed above the first electrode, that comprises at least a first portion and a second portion coupled to a first end of the first portion, wherein the resistive material layer presents a variable resistance value; and a second electrode disposed above the resistive material layer.
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