Measurement method and apparatus
    3.
    发明授权

    公开(公告)号:US11243473B2

    公开(公告)日:2022-02-08

    申请号:US16615207

    申请日:2018-05-28

    IPC分类号: G03F7/20 G03F1/86

    摘要: A method involving obtaining a simulation of a contour of a pattern to be formed on a substrate using a patterning process, determining a location of an evaluation point on the simulated contour of the pattern, the location spatially associated with a location of a corresponding evaluation point on a design layout for the pattern, and producing electronic information corresponding to a spatial bearing between the location of the evaluation point on the simulated contour and the location of the corresponding evaluation point on the design layout, wherein the information corresponding to the spatial bearing is configured for determining a location of an evaluation point on a measured image of at least part of the pattern, the evaluation point on the measured image spatially associated with the corresponding evaluation point on the design layout.

    METHOD OF ETCH MODEL CALIBRATION USING OPTICAL SCATTEROMETRY

    公开(公告)号:US20210216695A1

    公开(公告)日:2021-07-15

    申请号:US17301345

    申请日:2021-03-31

    摘要: Computer-implemented methods of optimizing a process simulation model that predicts a result of a semiconductor device fabrication operation to process parameter values characterizing the semiconductor device fabrication operation are disclosed. The methods involve generating cost values using a computationally predicted result of the semiconductor device fabrication operation and a metrology result produced, at least in part, by performing the semiconductor device fabrication operation in a reaction chamber operating under a set of fixed process parameter values. The determination of the parameters of the process simulation model may employ pre-process profiles, via optimization of the resultant post-process profiles of the parameters against profile metrology results. Cost values for, e.g., optical scatterometry, scanning electron microscopy and transmission electron microscopy may be used to guide optimization.

    OVERLAY MEASUREMENT TARGETS DESIGN

    公开(公告)号:US20210026238A1

    公开(公告)日:2021-01-28

    申请号:US16933297

    申请日:2020-07-20

    申请人: KLA Corporation

    发明人: Hong XIAO

    IPC分类号: G03F1/86 H01L21/027 G03F7/20

    摘要: A device area includes at least a first layer of photoresist and a second layer of photoresist. First layer metrology targets are positioned at an edge of one of the sides of the first layer of the mat. The first layer metrology targets have a relaxed pitch less than a device pitch. Secondary electron and back-scattered electron images can be simultaneously obtained.

    INSPECTION OF A LITHOGRAPHIC MASK THAT IS PROTECTED BY A PELLICLE
    8.
    发明申请
    INSPECTION OF A LITHOGRAPHIC MASK THAT IS PROTECTED BY A PELLICLE 有权
    检查由PELLICLE保护的LITHOGRAPHIC MASK

    公开(公告)号:US20150028203A1

    公开(公告)日:2015-01-29

    申请号:US13948975

    申请日:2013-07-23

    IPC分类号: G03F1/86 H01J37/26

    摘要: A system and a method for evaluating a lithography mask, the system may include: (a) electron optics for directing primary electrons towards a pellicle that is positioned between the electron optics and the lithography mask; wherein the primary electrons exhibit an energy level that allows the primary electrons to pass through the pellicle and to impinge on the lithographic mask; (b) at least one detector for detecting detected emitted electrons and for generating detection signals; wherein detected emitted electrons are generated as a result of an impingement of the primary electrons on the lithographic mask; and (c) a processor for processing the detection signals to provide information about the lithography mask

    摘要翻译: 一种用于评估光刻掩模的系统和方法,该系统可以包括:(a)用于将一次电子引导到位于电子光学器件和光刻掩模之间的防护薄膜的电子光学器件; 其中所述一次电子表现出允许所述一次电子通过所述防护薄膜并撞击所述光刻掩模的能级; (b)至少一个检测器,用于检测检测到的发射电子并产生检测信号; 其中由于一次电子撞击在光刻掩模上而产生检测到的发射电子; 和(c)用于处理检测信号以提供关于光刻掩模的信息的处理器

    Method for quartz bump defect repair with less substrate damage
    9.
    发明授权
    Method for quartz bump defect repair with less substrate damage 失效
    具有较少基板损伤的石英凸点缺陷修复方法

    公开(公告)号:US06933081B2

    公开(公告)日:2005-08-23

    申请号:US10144712

    申请日:2002-05-15

    CPC分类号: G03F1/74 G03F1/26

    摘要: A method for minimizing damage to a substrate while repairing a defect in a phase shifting mask for an integrated circuit comprising locating a bump defect in a phase shifting mask, depositing a first layer of protective coating to an upper surface of the bump defect, depositing a second layer of protective coating to areas of the phase shifting mask adjacent the bump defect, etching the first layer of protective coating and removing the bump defect.

    摘要翻译: 一种用于在修复用于集成电路的相移掩模中的缺陷的同时最小化对基板的损坏的方法,包括将相位移掩模中的凸块缺陷定位,将第一层保护涂层沉积到所述凸起缺陷的上表面, 第二层保护涂层到相移掩模的相邻凸起缺陷的区域,蚀刻第一层保护涂层并去除凸起缺陷。

    Mask for light exposure and process for production of the same
    10.
    发明授权
    Mask for light exposure and process for production of the same 失效
    面罩用于曝光和生产的过程相同

    公开(公告)号:US5700605A

    公开(公告)日:1997-12-23

    申请号:US616306

    申请日:1996-03-15

    CPC分类号: G03F1/30 G03F1/32

    摘要: There is disclosed a mask for light exposure which comprises being provided with a light transparent substrate and a mask pattern formed on the light transparent substrate, the mask pattern comprising a light screening pattern composed of a material which screens the exposure light and transmits the light having the longer wavelength than that of the exposure light and a phase shift pattern formed by engraving a part of the light transparent substrate.

    摘要翻译: 公开了一种用于曝光的掩模,其包括设置有透光基板和形成在透光基板上的掩模图案,掩模图案包括由屏蔽曝光光的材料构成的遮光图案,并透射具有 比曝光光的波长长,通过雕刻一部分透光性基板而形成的相移图案。