公开(公告)号：US12113041B2

公开(公告)日：2024-10-08

申请号：US17717756

申请日：2022-04-11

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Noriko Okunishi ,  Toshiyuki Hata

IPC分类号： H01L23/00 ,  H01L23/495 ,  H01L29/747 ,  H01L29/78 ,  H02K11/33 ,  H02M7/00

CPC分类号： H01L24/40 ,  H01L24/37 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L23/49562 ,  H01L29/747 ,  H01L29/7813 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/4001 ,  H01L2224/4007 ,  H01L2224/40245 ,  H01L2224/4103 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48245 ,  H01L2924/13018 ,  H01L2924/13091 ,  H02K11/33 ,  H02M7/003

摘要： In order to reduce on-resistance in a semiconductor device to be used for high current applications, the semiconductor device includes a source terminal lead located between a gate terminal lead and a Kelvin terminal lead in plan view and electrically connected with a source terminal via a plurality of wires.

公开(公告)号：US20240178216A1

公开(公告)日：2024-05-30

申请号：US18435938

申请日：2024-02-07

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Po-Lin PENG ,  Li-Wei CHU ,  Ming-Fu TSAI ,  Jam-Wem LEE ,  Yu-Ti SU

IPC分类号： H01L27/02 ,  H01L23/60 ,  H01L23/62 ,  H01L27/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/747 ,  H01L29/861 ,  H01L29/87

CPC分类号： H01L27/0262 ,  H01L27/0207 ,  H01L27/0255 ,  H01L29/87 ,  H01L23/60 ,  H01L23/62 ,  H01L27/0248 ,  H01L27/0652 ,  H01L27/0658 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/747 ,  H01L29/8611 ,  H01L2924/13034 ,  H01L2924/13035

摘要： A semiconductor device is provided, including a first doped region of a first conductivity type configured as a first terminal of a first diode, a second doped region of a second conductivity type configured as a second terminal of the first diode, wherein the first and second doped regions are coupled to a first voltage terminal; a first well of the first conductivity type surrounding the first and second doped regions in a layout view; a third doped region of the first conductivity type configured as a first terminal, coupled to an input/output pad, of a second diode; and a second well of the second conductivity type surrounding the third doped region in the layout view. The second and third doped regions, the first well, and the second well are configured as a first electrostatic discharge path between the I/O pad and the first voltage terminal.

公开(公告)号：US20230197835A1

公开(公告)日：2023-06-22

申请号：US18110095

申请日：2023-02-15

申请人： STMicroelectronics (Tours) SAS

发明人： Patrick HAUTTECOEUR ,  Vincent CARO

IPC分类号： H01L29/747 ,  H01L29/66 ,  H01L29/06

CPC分类号： H01L29/747 ,  H01L29/0661 ,  H01L29/66386

摘要： A device includes a semiconductor substrate. A step is formed at a periphery of the semiconductor substrate. A first layer, made of polysilicon doped in oxygen, is deposited on top of and in contact with a first surface of the substrate. This first layer extends at least on a wall and bottom of the step. A second layer, made of glass, is deposited on top of the first layer and the edges of the first layer. The second layer forms a boss between the step and a central area of the device.

公开(公告)号：US11611211B2

公开(公告)日：2023-03-21

申请号：US17234465

申请日：2021-04-19

申请人： Analog Devices, Inc.

发明人： Michael Amato

IPC分类号： H02H9/04 ,  H01L27/02 ,  H01L29/747

摘要： A system having a device for conducting an electrostatic discharge (ESD) current from a designated pin node. The system includes first and second pin nodes, and a switching device having a first switching threshold. The switching device includes a first, terminal coupled to a reference node, and a second terminal, coupled to the first pin node to actuate the switching device to conduct ESD current from the first pin node responsive to a voltage between the first pin node and the reference node exceeding the first switching threshold. The switching device further includes a third terminal, coupled to the second pin node, to actuate the switching device to conduct ESD current from the first pin node responsive to a voltage between the first pin node and the second pin node exceeding a second switching threshold.

公开(公告)号：US20230066664A1

公开(公告)日：2023-03-02

申请号：US18053839

申请日：2022-11-09

申请人： IDEAL POWER INC.

发明人： Alireza MOJAB ,  Daniel BRDAR ,  Ruiyang YU

IPC分类号： H01L29/10 ,  H03K17/082 ,  H01L29/747 ,  H01L29/732

摘要： Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: conducting a first load current from an upper terminal of the power module to an upper-main lead of the transistor, through the transistor, and from a lower-main lead of the transistor to a lower terminal of the power module; and then responsive assertion of a first interrupt signal, interrupting the first load current from the lower-main lead to the lower terminal by opening a lower-main FET and commutating a first shutoff current through a lower-control lead the transistor to the lower terminal; and blocking current from the upper terminal to the lower terminal by the transistor.

公开(公告)号：US11574903B2

公开(公告)日：2023-02-07

申请号：US15665575

申请日：2017-08-01

申请人： Texas Instruments Incorporated

发明人： Henry Litzmann Edwards ,  Akram A. Salman ,  Md Iqbal Mahmud

IPC分类号： H01L27/02 ,  H01L29/747 ,  H01L29/66 ,  H01L29/45 ,  H01L29/74 ,  H01L29/06

摘要： A first silicon controlled rectifier has a breakdown voltage in a first direction and a breakdown voltage in a second direction. A second silicon controlled rectifier has a breakdown voltage with a higher magnitude than the first silicon controlled rectifier in the first direction, and a breakdown voltage with a lower magnitude than the first silicon controlled rectifier in the second direction. A bidirectional electrostatic discharge (ESD) structure utilizes both the first silicon controlled rectifier and the second silicon controlled rectifier to provide bidirectional protection.

公开(公告)号：US20220337054A1

公开(公告)日：2022-10-20

申请号：US17234465

申请日：2021-04-19

申请人： Analog Devices, Inc.

发明人： Michael Amato

IPC分类号： H02H9/04 ,  H01L27/02 ,  H01L29/747

摘要： A system having a device for conducting an electrostatic discharge (ESD) current from a designated pin node. The system includes first and second pin nodes, and a switching device having a first switching threshold. The switching device includes a first, terminal coupled to a reference node, and a second terminal, coupled to the first pin node to actuate the switching device to conduct ESD current from the first pin node responsive to a voltage between the first pin node and the reference node exceeding the first switching threshold. The switching device further includes a third terminal, coupled to the second pin node, to actuate the switching device to conduct ESD current from the first pin node responsive to a voltage between the first pin node and the second pin node exceeding a second switching threshold.

公开(公告)号：US11373996B2

公开(公告)日：2022-06-28

申请号：US16823556

申请日：2020-03-19

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Guang Chen ,  Jie Chen

IPC分类号： H01L27/02 ,  H01L29/10 ,  H01L29/06 ,  H01L29/747

摘要： A silicon-controlled-rectifier electrostatic protection structure and a fabrication method are provided. The structure includes: a substrate of P-type; a first N-type well, a second N-type well, and a third N-type well in the substrate; a first P-type doped region in the first N-type well; first N-type doped regions at sides of the first N-type well along a first direction; first gate structures on a portion of the first N-type doped regions and on a portion of the first P-type doped region; second gate structure groups at sides of the first N-type well along a second direction; second N-type doped regions in the substrate at sides of each second gate structure along the first direction; second P-type doped regions in the second N-type doped regions between adjacent second gate structure groups; and a third P-type doped region and a cathode N-type doped region in the substrate.

公开(公告)号：US20220173243A1

公开(公告)日：2022-06-02

申请号：US17538418

申请日：2021-11-30

申请人： NEXPERIA B.V.

发明人： Kilian ONG ,  Benjamin HUNG

IPC分类号： H01L29/78 ,  H01L29/747 ,  H01L29/06

摘要： A semiconductor device is provided that includes a substrate, a channel with the channel positioned on the top of the substrate, and a drift with the drift positioned on the top of the channel. The semiconductor device further includes a first poly positioned in the channel and the drift, and a second poly positioned on the top of the first poly and positioned in the drift. The first poly and the second poly are isolated by a gate oxide and a RESURF oxide, respectively, from the channel and from the drift.

公开(公告)号：US11171132B2

公开(公告)日：2021-11-09

申请号：US16592013

申请日：2019-10-03

申请人： GLOBALFOUNDRIES U.S. INC.

发明人： Souvick Mitra ,  Alain F. Loiseau ,  Robert J. Gauthier, Jr. ,  You Li ,  Tsung-Che Tsai

IPC分类号： H01L27/02 ,  H01L29/06 ,  H01L29/747 ,  H01L29/66

摘要： The present disclosure relates to semiconductor structures and, more particularly, to bi-directional silicon controlled rectifiers (SCRs) and methods of manufacture. The structure includes: a plurality of diffusion regions; a plurality of p-type (P+) wells adjacent to the diffusion regions, wherein the P+ wells are directly connected; and a plurality of n-type (N+) wells adjacent to the P+ wells.