VOLTAGE VARIABLE MATERIAL FOR DIRECT APPLICATION AND DEVICES EMPLOYING SAME
    91.
    发明申请
    VOLTAGE VARIABLE MATERIAL FOR DIRECT APPLICATION AND DEVICES EMPLOYING SAME 审中-公开
    用于直接应用的电压变化材料和使用它的设备

    公开(公告)号:WO2003088356A1

    公开(公告)日:2003-10-23

    申请号:PCT/US2003/010833

    申请日:2003-04-08

    Abstract: The present invention provides overvoltage protection. Specifically, the present invention provides a voltage variable material (VVM, 100) that includes an insulative binder (50) that is formulated to intrinsically adhere to conductive and non-conductive surfaces. The binder and thus the VVM is self-curable and may be applied to an application in the form of an ink, which dries in a final form for use. The binder eliminates the need to place the VVM in a separate device or for separate printed circuit board pads on which to electrically connect the VVM. The binder and thus the VVM can be directly applied to many different types of substrates, such as a rigid (FR-4) laminate, a polyimide or a polymer. The VVM can also be directly applied to different types of substrates that are placed inside a device.

    Abstract translation: 本发明提供过电压保护。 具体地,本发明提供一种电压可变材料(VVM,100),其包括被配制为固有地粘附到导电表面和非导电表面上的绝缘粘合剂(50)。 粘合剂和因此的VVM是可自固化的,并且可以以油墨的形式施加到应用,其以最终形式干燥以供使用。 粘合剂消除了将VVM放置在单独的设备或用于电连接VVM的单独的印刷电路板焊盘的需要。 粘合剂,因此VVM可以直接应用于许多不同类型的基材,例如刚性(FR-4)层压材料,聚酰亚胺或聚合物。 VVM也可以直接应用于放置在设备内部的不同类型的基板。

    METHOD FOR SHUNTING AND DESHUNTING AN ELECTRICAL COMPONENT AND A SHUNTABLE/SHUNTED ELECTRICAL COMPONENT
    94.
    发明申请
    METHOD FOR SHUNTING AND DESHUNTING AN ELECTRICAL COMPONENT AND A SHUNTABLE/SHUNTED ELECTRICAL COMPONENT 审中-公开
    电气元件和可分离/分离电气元件的分离和分离方法

    公开(公告)号:WO0057405A9

    公开(公告)日:2002-06-20

    申请号:PCT/US0007563

    申请日:2000-03-22

    Abstract: The present invention provides an interconnect and a method for the creation and removal of shunts useful for the prevention of ESD/EOS damage to electrical components. In one embodiment of the present invention, the conductive pathway is provided and removed by exposing the interconnect's carbonizable and ablatable substrate to a radiant energy source such as a laser beam. The present invention provides for interconnects that include at least two conductive wires or leads engaged on at least one surface by a carbonizable and ablatable material. The conductive wires may each include a branched dead end lead portion interleaved with the branched dead end lead portion of the other. Alternatively, the conductive wires may extend in close proximity to each other in a curved or sinuous or serpentine or backtracking pattern. An interconnect in accord with the present invention may include a substrate substantially supporting the conductive wires except at predetermined locations or proposed shunt sites wherein there is at least one through hole in the substrate.

    Abstract translation: 本发明提供了用于创建和去除用于防止对电气部件的ESD / EOS损伤的分流器的互连和方法。 在本发明的一个实施例中,通过将互连的可碳化和可消融衬底暴露于诸如激光束的辐射能量源来提供和去除导电通路。 本发明提供了包括通过可碳化和可烧蚀材料在至少一个表面上接合的至少两个导电线或引线的互连。 导线可以各自包括与另一个的分支死端引线部分交错的分支死端引线部分。 或者,导线可以以弯曲或弯曲或蛇形或回溯模式彼此靠近地延伸。 根据本发明的互连可以包括基本上支撑除了在基板中存在至少一个通孔的预定位置或所提供的分流位置处的导电线的基板。

    FLEXIBLE CIRCUITS WITH STATIC DISCHARGE PROTECTION AND PROCESS FOR MANUFACTURE
    95.
    发明申请
    FLEXIBLE CIRCUITS WITH STATIC DISCHARGE PROTECTION AND PROCESS FOR MANUFACTURE 审中-公开
    具有静态放电保护的柔性电路和制造工艺

    公开(公告)号:WO01067834A1

    公开(公告)日:2001-09-13

    申请号:PCT/US2000/017981

    申请日:2000-06-29

    Abstract: Circuit and circuit carries include a dielectric substrate having a conductive layer mounted thereon. The conductive layer is patterned to define a plurality of spaced apart conductive elements. A static charge dissipative layer is in contact with and extending between at least two of the conductive elements. The static charge dissipative layer has a surface resistivity of between 1 x 10 and 1 x 10 ohms/cm. The static charge dissipative layer is made of a material selected from the group consisting of diamond-like carbon, silicone nitride, boron nitride, boron trifluoride, silicone carbide and silicone dioxide. Circuits and circuit carriers according to the present invention allow static charges to be controllably and reliably dissipated from a surface of the circuit or circuit carrier such that the potential for damage from static discharge to electrical components connected to the circuit is reduced.

    Abstract translation: 电路和电路载体包括其上安装有导电层的电介质基板。 图案化导电层以限定多个间隔开的导电元件。 静电荷耗散层与至少两个导电元件接触并在其中延伸。 静电荷耗散层的表面电阻率在1×10 5至1×10 10欧姆/厘米3之间。 静电荷耗散层由选自由类金刚石碳,氮化硅,氮化硼,三氟化硼,碳化硅和二氧化硅组成的组中的材料制成。 根据本发明的电路和电路载体允许静电荷从电路或电路载体的表面可控地可靠地消散,使得从静电放电到连接到电路的电气部件的损坏的可能性降低。

    IMPROVED GALVANIC ISOLATION FOR ISOLATION TRANSFORMER
    97.
    发明申请
    IMPROVED GALVANIC ISOLATION FOR ISOLATION TRANSFORMER 审中-公开
    改进隔离变压器的电偶隔离

    公开(公告)号:WO2018011269A1

    公开(公告)日:2018-01-18

    申请号:PCT/EP2017/067558

    申请日:2017-07-12

    Applicant: ABB SCHWEIZ AG

    Abstract: The invention relates to a galvanic separating apparatus, comprising a printed circuit board (3), the printed circuit board (3) comprising a first soldering pad (7), a second soldering pad (8) and a recess (12), whereby the pads (7, 8) are arranged on a lower side (9) of the printed circuit board (3) thereby defining a clearance and/or creepage distance (10, 11) between the pads (7, 8), and the recess (12) is arranged between the pads (7, 8), a primary insulated winding layer (5) connected to the first soldering pad (7) and a second insulated winding layer (6) connected to the second soldering part (8), whereby the winding layers (5, 6) are arranged on an upper side (2) of the printed circuit board (3), and an insulating layer (13), whereby the insulating layer (13) extends from the upper side (2) through the recess (12) and protrudes on the lower side (9) beyond the printed circuit board (3) thereby increasing the clearance and/or creepage distance (10, 11).

    Abstract translation: (3),所述印刷电路板(3)包括第一焊盘(7),第二焊盘(8)和第二焊盘 其中垫(7,8)布置在印刷电路板(3)的下侧(9)上,由此限定垫(7,8)之间的间隙和/或爬电距离(10,11) ,所述凹槽(12)布置在所述焊盘(7,8)之间,连接到所述第一焊盘(7)的初级绝缘绕组层(5)和连接到所述第二焊盘 其中绕组层(5,6)布置在印刷电路板(3)的上侧(2)上,以及绝缘层(13),由此绝缘层(13)延伸到第二焊接部分 从上侧(2)穿过凹槽(12)并且在下侧(9)上突出超过印刷电路板(3),由此增加间隙和/或爬电距离(10,11)。

    MULTI-LED SYSTEM
    99.
    发明申请
    MULTI-LED SYSTEM 审中-公开
    多LED系统

    公开(公告)号:WO2017190895A1

    公开(公告)日:2017-11-09

    申请号:PCT/EP2017/057600

    申请日:2017-03-30

    Applicant: EPCOS AG

    Abstract: Ein Multi-LED System weist einen Träger (2) und mehrere Leuchtdioden (3, 3`, 3``) auf, die auf dem Träger (2) angeordnet sind. Der Träger (2) umfasst einen Grundkörper (4), in dem mehrere elektrische Bauelemente (11, 11`, 11``, 12) eingebettet sind. Beispielsweise weist der Grundkörper (4) ein Harz- und/oder Polymermaterial auf. Es kann sich bei dem Multi-LED System (1) insbesondere um ein vierfach LED Flash Modul handeln.

    Abstract translation:

    阿多LED系统包括Tr的AUML; GER(2)和多个发光二极管(3,3`,3``),其中载体&AUML上; GER布置(2)。 载体(2)包括基体(4),多个电气元件(11,11',11“,12)被嵌入其中。 例如,基体(4)包含树脂和/或聚合物材料。 特别是,多LED系统(1)可以是四闪闪LED模块。

    TRÄGERSYSTEM
    100.
    发明申请
    TRÄGERSYSTEM 审中-公开
    输送系统

    公开(公告)号:WO2017182157A1

    公开(公告)日:2017-10-26

    申请号:PCT/EP2017/053388

    申请日:2017-02-15

    Applicant: EPCOS AG

    Abstract: Es wird ein Vielschicht-Trägersystem (10) beschrieben, aufweisend wenigstens ein Vielschichtkeramiksubstrat (2), wenigstens ein Matrixmodul (7) von wärmeproduzierenden Halbleiterbauelementen (1a, 1b), wobei die Halbleiterbauelemente (1a, 1b), auf dem Vielschichtkeramiksubstrat (2) angeordnet sind, und ein weiteres Substrat (3), wobei das Vielschichtkeramiksubstrat (2) auf dem Substrat (3) angeordnet ist, wobei das Matrixmodul (7) über das Vielschichtkeramiksubstrat (2) und das weitere Substrat (3) elektrisch leitend mit einer Treiberschaltung verbunden ist. Ferner werden ein Verfahren zur Herstellung eines Vielschicht-Trägersystems (10) sowie die Verwendung eines Vielschichtkeramiksubstrats beschrieben.

    Abstract translation:

    这是一个多层Tr的AUML;上述gersystem(10),包括至少一个多层陶瓷基板(2),至少一个矩阵模块(7)WÄ rmeproduzierenden半导体装置(1A,1B),所述半导体器件( 1A,1B),(多层陶瓷基板2)上设置,并且另一个衬底(3),其中,所述多层陶瓷基板(2)设置在衬底(3),其中,所述矩阵模块(7)在所述多层陶瓷基板(2 )并且另外的衬底(3)导电地连接到驱动器电路。 此外,描述了用于制造多层载体系统(10)的方法以及多层陶瓷衬底的使用。

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