公开(公告)号：WO03105189A2

公开(公告)日：2003-12-18

申请号：PCT/US0318007

申请日：2003-06-06

Applicant: AMBERWAVE SYSTEMS CORP

Inventor： LOCHTEFELD ANTHONY J ,  LANGDO THOMAS A ,  HAMMOND RICHARD ,  CURRIE MATTHEW T ,  BRAITHWAITE GLYN ,  FITZGERALD EUGENE A

IPC: H01L21/20 ,  H01L21/331 ,  H01L21/336 ,  H01L21/337 ,  H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H01L

CPC classification number: H01L29/785 ,  H01L21/76254 ,  H01L21/76259 ,  H01L21/76264 ,  H01L21/76275 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66242 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/66916 ,  H01L29/7842 ,  H01L29/78603 ,  H01L29/78684 ,  H01L29/78687

Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Abstract translation: 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

公开(公告)号：WO03105189B1

公开(公告)日：2004-05-21

申请号：PCT/US0318007

申请日：2003-06-06

Applicant: AMBERWAVE SYSTEMS CORP

Inventor： LOCHTEFELD ANTHONY J ,  LANGDO THOMAS A ,  HAMMOND RICHARD ,  CURRIE MATTHEW T ,  BRAITHWAITE GLYN ,  FITZGERALD EUGENE A

IPC: H01L21/20 ,  H01L21/331 ,  H01L21/336 ,  H01L21/337 ,  H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L29/785 ,  H01L21/76254 ,  H01L21/76259 ,  H01L21/76264 ,  H01L21/76275 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66242 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/66916 ,  H01L29/7842 ,  H01L29/78603 ,  H01L29/78684 ,  H01L29/78687

Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Abstract translation: 应变半导体的优点与基板和器件制造上的绝缘体绝缘体方法相结合。

公开(公告)号：WO03025984A3

公开(公告)日：2003-09-25

申请号：PCT/US0230033

申请日：2002-09-20

Applicant: AMBERWAVE SYSTEMS CORP

Inventor： CURRIE MATTHEW ,  LOCHTEFELD ANTHONY ,  HAMMOND RICHARD ,  FITZGERALD EUGENE A

IPC: H01L21/20 ,  H01L21/02 ,  H01L21/338 ,  H01L27/12 ,  H01L29/10 ,  H01L29/36 ,  H01L29/778 ,  H01L29/78 ,  H01L29/786 ,  H01L29/812

CPC classification number: H01L29/1054 ,  H01L29/105 ,  H01L29/161 ,  H01L29/36 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7842 ,  Y10S438/926

Abstract: Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layer, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or "FETs") that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

Abstract translation: 包括具有无杂质区的应变材料层的半导体结构和器件及其制造方法。 应变材料层的某些区域不含可与半导体的相邻部分相互扩散的杂质。 当应变材料层的某些区域中存在杂质时，器件性能会降低。 通过采用具有所述特征或根据所述步骤制造的半导体结构和器件（例如，场效应晶体管或“FET”），器件操作得到增强。

公开(公告)号：WO03028106B1

公开(公告)日：2004-01-15

申请号：PCT/US0230226

申请日：2002-09-24

Applicant: AMBERWAVE SYSTEMS CORP

Inventor： BRAITHWAITE GLYN ,  HAMMOND RICHARD ,  CURRIE MATTHEW

IPC: H01L27/06 ,  H01L27/092 ,  H01L29/10 ,  H01L29/51 ,  H01L29/786 ,  H03B5/12 ,  H03K3/354 ,  H03L7/093 ,  H03L7/099 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/8238

CPC classification number: H01L29/7378 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78654 ,  H03B5/1203 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1221 ,  H03B5/1228 ,  H03B5/1243 ,  H03K3/354 ,  H03L7/093 ,  H03L7/099

Abstract: Circuits for processing radio frequency ("RF") and microwave signals are fabricated using field effect transistors ("FETs") that have one or more strained channel layers disposed on one or more planarized substrate layers. FETs having such a configuration exhibit improved values for, for example, transconductance and noise figure. RF circuits such as, for example, voltage controlled oscillators ("VCOs"), low noise amplifiers ("LNAs"), and phase locked loops ("PLLs") built using these FETs also exhibit enhanced performance.

Abstract translation: 用于处理射频（“RF”）和微波信号的电路使用具有设置在一个或多个平坦化衬底层上的一个或多个应变沟道层的场效应晶体管（“FET”）来制造。 具有这种结构的FET对于例如跨导和噪声系数显示出改善的值。 诸如例如压控振荡器（“VCO”），使用这些FET构建的低噪声放大器（“LNA”）和锁相环（“PLL”）的RF电路也表现出增强的性能。

公开(公告)号：WO02101818A2

公开(公告)日：2002-12-19

申请号：PCT/US0217864

申请日：2002-06-07

Applicant: AMBERWAVE SYSTEMS CORP

Inventor： CURRIE MATTHEW ,  HAMMOND RICHARD

IPC: H01L21/762 ,  H01L29/165

CPC classification number: H01L21/76224 ,  H01L29/165

Abstract: A method is disclosed for isolating device regions in a heterostructure that includes at least one layer of a strained semiconductor material. The method includes the steps of forming a trench in the at least one layer of strained semiconductor material using an etch chemistry that is selected to etch different layers of said heterostructure sufficiently similarly that said trench includes walls that are substantially straight, and depositing a dielectric material in the trench.

Abstract translation: 公开了一种用于隔离异质结构中的器件区域的方法，该异质结构包括至少一层应变半导体材料。 该方法包括以下步骤：使用蚀刻化学品在所述至少一层应变半导体材料中形成沟槽，所述蚀刻化学物质被选择为非常类似地蚀刻所述异质结构的不同层，所述沟槽包括基本上直的壁，以及沉积介电材料 在沟里。

公开(公告)号：WO0213262A3

公开(公告)日：2002-05-02

申请号：PCT/US0124614

申请日：2001-08-06

Applicant: AMBERWAVE SYSTEMS CORP

Inventor： FITZGERALD EUGENE A ,  HAMMOND RICHARD ,  CURRIE MATTHEW

IPC: H01L21/20 ,  H01L21/28 ,  H01L21/336 ,  H01L29/10 ,  H01L29/78

CPC classification number: H01L29/66477 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/28194 ,  H01L21/28211 ,  H01L21/28238 ,  H01L29/1054 ,  H01L29/78 ,  H01L29/7838 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor structure including a relaxed Si1-xGex layer on a substrate, a strained channel layer on said relaxed Si1-xGex layer, and a sacrificial Si1-yGey layer. The sacrificial Si1-yGey layer is removed before providing a dielectric layer. The dielectric layer includes a gate dielectric of a MOSFET. In alternative embodiements, the structure includes a Si1-zGey spacer layer and a Si layer. In another embodiment of the invention there is provided a method of fabricating a semiconductor device including providing a semiconductor heterostructure, the heterostructure having a relaxed Si1-xGex layer on a substrate, a strained channel layer on the relaxed Si1-xGex layer, and a Si1-yGey layer; removing the Si1-yGey layer; and providing a dielectric layer.

Abstract translation: 包括在衬底上的弛豫Si1-xGex层，所述弛豫Si1-xGex层上的应变通道层和牺牲Si1-yGey层的半导体结构。 在提供介电层之前去除牺牲Si1-yGey层。 电介质层包括MOSFET的栅极电介质。 在替代实施例中，该结构包括Si1-zGey间隔层和Si层。 在本发明的另一实施例中，提供一种制造半导体器件的方法，包括提供半导体异质结构，在衬底上具有松弛的Si1-xGex层的异质结构，在弛豫的Si1-xGex层上的应变沟道层，以及Si1 -yGey层; 去除Si1-yGey层; 并提供介电层。