公开(公告)号：WO2017123552A1

公开(公告)日：2017-07-20

申请号：PCT/US2017/012872

申请日：2017-01-10

Applicant: APPLIED MATERIALS, INC.

Inventor： HSU, Hao-Chien ,  YIM, Dong-Kil ,  WON, Tae Kyung ,  ZHANG, Xuena ,  SUNG, Won Ho ,  LIM, Rodney Shunleong

IPC: H01L21/02 ,  H01L21/28 ,  H01L21/285 ,  H01L29/66 ,  H01L29/417 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/02631 ,  H01L21/02664 ,  H01L29/7869

Abstract: Embodiments of the present disclosure generally relate to methods for forming a TFT having a metal oxide layer. The method may include forming a metal oxide layer and treating the metal oxide layer with a fluorine containing gas or plasma. The fluorine treatment of the metal oxide layer helps fill the oxygen vacancies in the metal oxide channel layer, leading to a more stable TFT and preventing a negative threshold voltage in the TFT.

Abstract translation: 本公开的实施例总体上涉及用于形成具有金属氧化物层的TFT的方法。 该方法可以包括形成金属氧化物层并用含氟气体或等离子体处理金属氧化物层。 金属氧化物层的氟处理有助于填充金属氧化物沟道层中的氧空位，导致更稳定的TFT并防止TFT中的负阈值电压。

公开(公告)号：WO2014149682A1

公开(公告)日：2014-09-25

申请号：PCT/US2014/020286

申请日：2014-03-04

Applicant: APPLIED MATERIALS, INC.

Inventor： YIM, Dong-Kil ,  WON, Tae Kyung ,  CHO, Seon-Mee ,  WHITE, John M.

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/66969 ,  H01L21/467 ,  H01L29/24 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/7869

Abstract: The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for the passivation layer or the etch stop layers permits a very dense capping layer to be formed over a less dense back channel protection layer. The capping layer can be sufficiently dense so that few pin holes are present and thus, hydrogen may not pass through to the semiconductor layer. As such, hydrogen containing precursors may be used for the capping layer deposition.

Abstract translation: 本发明一般涉及TFT和TFT的制造方法。 对于背沟道蚀刻TFT或蚀刻停止TFT，用于钝化层或蚀刻停止层的多个层允许在较不致密的背沟道保护层上形成非常密集的覆盖层。 封盖层可以是足够密实的，从而存在很少的针孔，因此氢不能通过半导体层。 因此，含氢前体可以用于覆盖层沉积。

公开(公告)号：WO2011137373A2

公开(公告)日：2011-11-03

申请号：PCT/US2011/034623

申请日：2011-04-29

Applicant: APPLIED MATERIALS, INC. ,  KURITA, Shinichi ,  KUDELA, Jozef ,  ANWAR, Suhail ,  WHITE, John M. ,  YIM, Dong-Kil ,  WOLF, Hans ,  ZVALO, Dennis ,  INAGAWA, Makoto ,  MORI, Ikuo

Inventor： KURITA, Shinichi ,  KUDELA, Jozef ,  ANWAR, Suhail ,  WHITE, John M. ,  YIM, Dong-Kil ,  WOLF, Hans ,  ZVALO, Dennis ,  INAGAWA, Makoto ,  MORI, Ikuo

IPC: C23C16/50 ,  C23C16/44 ,  H01L21/205

CPC classification number: H01L21/67712 ,  C23C16/4587 ,  C23C16/46 ,  C23C16/463 ,  C23C16/511 ,  C23C16/54 ,  H01J37/32192 ,  H01J37/3222 ,  H01J37/32513 ,  H01J37/32522 ,  H01J37/32889 ,  H01J37/32899 ,  H01L21/67098 ,  H01L21/67126 ,  H01L21/67173 ,  H01L21/6719 ,  H01L21/67201

Abstract: The present invention generally relates to a vertical CVD system having a processing chamber that is capable of processing multiple substrates. The multiple substrates are disposed on opposite sides of the processing source within the processing chamber, yet the processing environments are not isolated from each other. The processing source is a horizontally centered vertical plasma generator that permits multiple substrates to be processed simultaneously on either side of the plasma generator, yet independent of each other. The system is arranged as a twin system whereby two identical processing lines, each with their own processing chamber, are arranged adjacent to each other. Multiple robots are used to load and unload the substrates from the processing system. Each robot can access both processing lines within the system.

Abstract translation: 本发明一般涉及具有能够处理多个基板的处理室的垂直CVD系统。 多个基板设置在处理室内的处理源的相对侧上，但处理环境彼此不隔离。 处理源是水平居中的垂直等离子体发生器，其允许在等离子体发生器的任一侧上同时处理多个基板，但彼此独立。 该系统被布置为双系统，由此两个相同的处理线各自具有它们自己的处理室，彼此相邻布置。 多个机器人用于从处理系统装载和卸载基板。 每个机器人可以访问系统内的两条处理线。

公开(公告)号：WO2019185183A1

公开(公告)日：2019-10-03

申请号：PCT/EP2018/083003

申请日：2018-11-29

Applicant: APPLIED MATERIALS, INC. ,  HANIKA, Markus ,  OLSON, Joseph C. ,  KURUNCZI, Peter F. ,  YIM, Dong-Kil ,  BENDER, Marcus

Inventor： HANIKA, Markus ,  OLSON, Joseph C. ,  KURUNCZI, Peter F. ,  YIM, Dong-Kil ,  BENDER, Marcus

IPC: C23C14/56 ,  C23C14/50 ,  H01L21/677 ,  H01L21/67 ,  B65G49/06 ,  H01L21/687

Abstract: A vacuum processing apparatus for processing a substrate is described. The vacuum processing apparatus includes a vacuum chamber; at least two processing stations adjacent to the vacuum chamber and operationally coupled to the vacuum chamber, a surface of a substrate has different orientations when the substrate is treated in different processing stations and at least one of the processing stations comprises a linear source with a longitudinal axis, for treating the substrate; and a substrate support. The substrate support includes a support body for holding a substrate; and an actuator configured to move the support body from a non-vertical position around an axis in front of the processing station to a non-horizontal position.

公开(公告)号：WO2017182081A1

公开(公告)日：2017-10-26

申请号：PCT/EP2016/058896

申请日：2016-04-21

Applicant: APPLIED MATERIALS, INC. ,  PARK, Hyun Chan ,  YIM, Dong-Kil ,  MANKE, Georg ,  GEBELE, Thomas

Inventor： PARK, Hyun Chan ,  YIM, Dong-Kil ,  MANKE, Georg ,  GEBELE, Thomas

IPC: C23C14/34 ,  C23C14/35 ,  H01J37/34

CPC classification number: C23C14/352 ,  C23C14/3492 ,  H01J37/3405 ,  H01J37/3417 ,  H01J37/3455 ,  H01J37/347

Abstract: A method for coating a substrate (100) with at least one cathode assembly (10) having three or more rotatable targets (20), the three or more rotatable targets each comprising a magnet assembly (25) positioned there within, is provided. The method includes: rotating the magnet assemblies (25) to a plurality of different angular positions with respect to a plane (22) perpendicularly extending from the substrate (100) to an axis (21) of the respective one of the three or more rotatable targets (20); and varying at least one of: a power provided to the three or more rotatable targets (20), a staying time of the magnet assemblies (25), and an angular velocity of the magnet assemblies (25), which is varied continuously, according to a function stored in a database or a memory.

Abstract translation: 一种用于利用具有三个或更多个可旋转目标（20）的至少一个阴极组件（10）涂覆衬底（100）的方法，所述三个或更多个可旋转目标各自包括磁体组件（25） 定位在那里，被提供。 该方法包括：将磁体组件（25）旋转到相对于从基板（100）垂直延伸到三个或更多个可旋转轴（21）中的相应一个轴的平面（22）的多个不同角位置 目标（20）; 并且改变以下中的至少一个：提供给三个或更多个可旋转目标（20）的功率，磁体组件（25）的停留时间以及连续变化的磁体组件（25）的角速度， 到存储在数据库或内存中的函数。

公开(公告)号：WO2013003004A2

公开(公告)日：2013-01-03

申请号：PCT/US2012/041603

申请日：2012-06-08

Applicant: APPLIED MATERIALS, INC. ,  CHEN, Jrjyan Jerry ,  CHOI, Soo Young ,  YIM, Dong-Kil ,  YE, Yan

Inventor： CHEN, Jrjyan Jerry ,  CHOI, Soo Young ,  YIM, Dong-Kil ,  YE, Yan

CPC classification number: H01L29/66969 ,  H01L21/02565 ,  H01L29/78606 ,  H01L29/7869

Abstract: The present invention generally relates to a method of manufacturing a TFT. The TFT has an active channel that comprises IGZO or zinc oxide. After the source and drain electrodes are formed, but before the passivation layers or etch stop layers are deposited thereover, the active channel is exposed to an N 2 O or O 2 plasma. The interface between the active channel and the passivation layers or etch stop layers are either altered or damaged during formation of the source and drain electrodes. The N 2 O or O 2 plasma alters and repairs the interface between the active channel and the passivation or etch stop layers.

Abstract translation: 本发明总体上涉及一种制造TFT的方法。 TFT具有包含IGZO或氧化锌的有源沟道。 在形成源电极和漏电极之后，但是在其上沉积钝化层或蚀刻停止层之前，将活性通道暴露于N 2 O或O 2等离子体 。 在形成源电极和漏电极期间，有源沟道与钝化层或蚀刻停止层之间的界面或者被改变或者被损坏。 N 2 O或O 2等离子体改变并修复有源沟道和钝化层或蚀刻停止层之间的界面。

公开(公告)号：WO2010008754A2

公开(公告)日：2010-01-21

申请号：PCT/US2009/047780

申请日：2009-06-18

Applicant: APPLIED MATERIALS, INC. ,  CHOI, Soo, Young ,  CHEN, Jriyan, Jerry ,  WON, Tae Kyung ,  YIM, Dong-Kil

Inventor： CHOI, Soo, Young ,  CHEN, Jriyan, Jerry ,  WON, Tae Kyung ,  YIM, Dong-Kil

IPC: H01L21/205 ,  H01L29/786

CPC classification number: H01L21/02532 ,  G02F1/1362 ,  G02F2001/13312 ,  G02F2201/58 ,  G06F3/0412 ,  G06F3/0421 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/0262 ,  H01L27/1214 ,  H01L27/1446 ,  H01L31/022466 ,  H01L31/03762 ,  H01L31/153 ,  H01L31/202 ,  Y02E10/548

Abstract: Embodiments of the present invention relate to methods for depositing an amorphous film that may be suitable for using in a NIP photodiode in display applications. In one embodiment, the method includes providing a substrate into a deposition chamber, supplying a gas mixture having a hydrogen gas to silane gas ratio by volume greater than 4 into the deposition chamber, maintaining a pressure of the gas mixture at greater than about 1 Torr in the deposition chamber, and forming an amorphous silicon film on the substrate in the presence of the gas mixture, wherein the amorphous silicon film is configured to be an intrinsic-type layer in a photodiode sensor.

Abstract translation: 本发明的实施例涉及用于沉积非晶态膜的方法，所述非晶态膜可适用于显示应用中的NIP光电二极管。 在一个实施例中，该方法包括将衬底提供到沉积室中，将具有大于4的氢气与硅烷气体比率的气体混合物供应到沉积室中，将气体混合物的压力保持在大于约1托 在所述沉积室中，并且在所述气体混合物存在下在所述基板上形成非晶硅膜，其中所述非晶硅膜被配置为光电二极管传感器中的本征型层。

公开(公告)号：WO2018164806A1

公开(公告)日：2018-09-13

申请号：PCT/US2018/017416

申请日：2018-02-08

Applicant: APPLIED MATERIALS, INC.

Inventor： LIM, Rodney Shunleong ,  YIM, Dong-Kil

IPC: H01L29/786 ,  H01L27/12 ,  H01L27/32 ,  H01L29/66

Abstract: Embodiments of the disclosure generally provide methods of forming thin film transistor (TFT) device structure with good interface management between active layers of a metal electrode layer and/or source/drain electrode layers and a nearby insulating material so as to provide high electrical performance devices, or for other suitable display applications. In one embodiment, a thin film transistor structure includes a contact region formed between fluorine-doped source and drain regions disposed on a substrate, a gate insulating layer disposed on the contact region, and a metal electrode layer disposed on the gate insulator layer.

公开(公告)号：WO2016162072A1

公开(公告)日：2016-10-13

申请号：PCT/EP2015/057769

申请日：2015-04-09

Applicant: APPLIED MATERIALS, INC. ,  PARK, Hyun Chan ,  SCHEER, Evelyn ,  YIM, Dong-Kil

Inventor： PARK, Hyun Chan ,  SCHEER, Evelyn ,  YIM, Dong-Kil

IPC: C23C14/56 ,  C23C14/35 ,  C23C14/34 ,  H01J37/34

CPC classification number: C23C14/562 ,  C23C14/3464 ,  C23C14/352 ,  H01J37/32376 ,  H01J37/32733 ,  H01J37/3405 ,  H01J37/3417 ,  H01J37/342 ,  H01J37/3438 ,  H01J37/3455 ,  H01J37/347

Abstract: The present disclosure relates to a method for material deposition on a substrate, including moving a substrate (10) into a processing zone in a vacuum chamber having an array of at least three sputter cathodes (110, 120), wherein each of the at least three sputter cathodes (110, 120) provides a plasma zone (116, 126) in which a deposition material is supplied during operation of the at least three sputter cathodes (110, 120), and rotating the plasma zone (116, 126) only once around a respective rotational axis (118, 128) from a first rotational position (140, 140) to a second rotational position (144, 144), wherein each plasma zone (116, 126) is directed away from the processing zone in the first rotational position (140, 140), and wherein each plasma zone (116, 126) moves over the processing zone during rotating from the first rotational position (140, 140) to the second rotational position (144, 144).

Abstract translation: 本公开涉及一种用于在衬底上材料沉积的方法，包括将衬底（10）移动到具有至少三个溅射阴极（110,120）的阵列的真空室中的处理区域中，其中至少 三个溅射阴极（110,120）提供等离子体区域（116,126），其中在至少三个溅射阴极（110,120）的操作期间提供沉积材料，并且仅等离子体区域（116,126）旋转 一次围绕从第一旋转位置（140,140）到第二旋转位置（144,144）的相应旋转轴线（118,128），其中每个等离子体区域（116,126）被引导离开处理区域 第一旋转位置（140,140），并且其中每个等离子体区域（116,126）在从第一旋转位置（140,140）旋转到第二旋转位置（144,144）期间在处理区域上移动。

公开(公告)号：WO2014158955A1

公开(公告)日：2014-10-02

申请号：PCT/US2014/021086

申请日：2014-03-06

Applicant: APPLIED MATERIALS, INC.

Inventor： YIM, Dong-Kil ,  WON, Tae Kyung ,  CHO, Seon-Mee

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L22/12 ,  H01L22/24

Abstract: The present invention generally relates to methods measuring pinhole determination. In one aspect, a method of measuring pinholes in a stack, such as a TFT stack, is provided. The method can include forming an active layer on a deposition surface of a substrate, forming a dielectric layer over the active layer, delivering an etchant to at least the dielectric layer, to etch both the dielectric layer and any pinholes formed therein and optically measuring the pinhole density of the etched dielectric layer using the active layer.

Abstract translation: 本发明一般涉及测量针孔确定的方法。 一方面，提供了一种测量堆叠中的针孔的方法，例如TFT堆叠。 该方法可以包括在衬底的沉积表面上形成有源层，在有源层上形成电介质层，向至少介电层递送蚀刻剂，以蚀刻电介质层和在其中形成的任何针孔，并光学测量 使用有源层的蚀刻介电层的针孔密度。