公开(公告)号：WO2022002733A1

公开(公告)日：2022-01-06

申请号：PCT/EP2021/067266

申请日：2021-06-23

Applicant: IMEC VZW ,  UNIVERSITEIT GENT

Inventor： STERKEN, Tom ,  VAN STEENBERGE, Geert

IPC: H01L21/683 ,  H01L33/00 ,  H01L21/6835 ,  H01L2221/68318 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/95 ,  H01L2224/95136 ,  H01L33/0095

Abstract: A method for accurately positioning a component on a receiver substrate is provided, wherein the component is transferred from a donor substrate to a receiver substrate facing the donor substrate. The method comprises creating at least one nozzle at a predefined location in the area of contact between a blister forming layer on the donor substrate, and a component attached to the donor substrate by adhesion to the blister forming layer. The blister forming layer comprises at least a dynamic release layer, consisting of a dynamic release material, i.e. material that is vaporised when a laser beam of a given wavelength and flux density is directed to the donor substrate at the location of the component, from the back side of the donor substrate. The application of the laser beam thus creates a blister that contains vaporized dynamic release material.The blister expands until a nozzle is created, the nozzle allowing the vaporized dynamic release material to exit the blister and cause the release of the component and its propulsion towards the receiver substrate. The nozzle releases the material in the form of a narrow jet of gas, which improves the directionality of the transfer.

公开(公告)号：WO2021262421A1

公开(公告)日：2021-12-30

申请号：PCT/US2021/035914

申请日：2021-06-04

Applicant: TELEDYNE SCIENTIFIC & IMAGING, LLC

Inventor： URTEAGA, Miguel ,  CARTER, Andy

IPC: H01L29/08 ,  H01L21/683 ,  H01L23/36 ,  H01L29/40 ,  H01L29/417 ,  H01L21/331 ,  H01L29/737 ,  H01L29/45 ,  H01L29/47 ,  H01L21/3212 ,  H01L21/6835 ,  H01L21/8252 ,  H01L2221/68363 ,  H01L29/0821 ,  H01L29/401 ,  H01L29/41708 ,  H01L29/475 ,  H01L29/66318 ,  H01L29/7371

Abstract: A method of forming a bipolar transistor with a vertical collector contact requires providing a transistor comprising a plurality of epitaxial semiconductor layers on a first substrate, and providing a host substrate. A metal collector contact is patterned on the top surface of the host substrate, and the plurality of epitaxial semiconductor layers is transferred from the first substrate onto the metal collector contact on the host substrate. The first substrate is suitably the growth substrate for the plurality of epitaxial semiconductor layers. The host substrate preferably has a higher thermal conductivity than does the first substrate, which improves the heat dissipation characteristics of the transistor and allows it to operate at higher power densities. A plurality of transistors may be transferred onto a common host substrate to form a multi-finger transistor.

公开(公告)号：WO2020123851A2

公开(公告)日：2020-06-18

申请号：PCT/US2019/066054

申请日：2019-12-12

Applicant: TESORO SCIENTIFIC INC.

Inventor： HENLEY, Francois J.

IPC: H01L23/00 ,  H01L27/15 ,  H01L21/033 ,  H01L33/00 ,  H01L33/62 ,  H01L21/6835 ,  H01L22/14 ,  H01L2221/68318 ,  H01L2221/68322 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L25/0753 ,  H01L2933/0033 ,  H01L33/0095

Abstract: Embodiments relate to mass-transfer methods useful for fabricating products containing Light Emitting Diode (LED) structures. LED arrays are transferred from a source substrate to a target substrate by an in-process functional test Known-Good Die (KGD) driven mass-transfer of a plurality of LED devices in a high-speed flexible manner. Certain preferred embodiments using beam-addressed release (BAR) mass-transfer approaches are able to utilize a Known Good Die (KGD) data file of the source substrate in a manner that avoids additional steps, rework and yield losses.

公开(公告)号：WO2023057525A1

公开(公告)日：2023-04-13

申请号：PCT/EP2022/077727

申请日：2022-10-05

Applicant: ROCKLEY PHOTONICS LIMITED

Inventor： YANG, Hua ,  DERNAIKA, Mohamad ,  PETERS, Frank ,  YU, Guomin

IPC: H01L31/0304 ,  H01L33/00 ,  B41F16/0066 ,  G02B6/13 ,  H01L21/6835 ,  H01L21/78 ,  H01L21/8252 ,  H01L2221/68318 ,  H01L2221/6835 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L25/0753 ,  H01L25/167 ,  H01L31/12 ,  H01L31/184 ,  H01L31/1892 ,  H01L33/0093

Abstract: A source wafer for use in a micro-transfer printing process. The source wafer comprising: a wafer substrate; a photonic component, provided in a device coupon, the device coupon being attached to the wafer substrate via a release layer; and one or more etch stop layers, located between the photonic component and the wafer substrate.

公开(公告)号：WO2022046482A2

公开(公告)日：2022-03-03

申请号：PCT/US2021/046455

申请日：2021-08-18

Applicant: MICRON TECHNOLOGY, INC.

Inventor： KIRBY, Kyle K. ,  PAREKH, Kunal R.

IPC: H01L23/485 ,  H01L27/11573 ,  H01L21/60 ,  H01L21/683 ,  H01L21/50 ,  H01L21/6835 ,  H01L21/76802 ,  H01L21/76877 ,  H01L2221/68363 ,  H01L2221/68381 ,  H01L2224/02125 ,  H01L2224/02145 ,  H01L2224/0235 ,  H01L2224/02351 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05647 ,  H01L2224/08058 ,  H01L2224/08145 ,  H01L2224/09181 ,  H01L2224/13111 ,  H01L2224/80006 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/9202 ,  H01L2225/06541 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L25/18 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/11582

Abstract: Systems and methods for a semiconductor device having a front-end-of-line interconnect structure are provided. The semiconductor device may include a dielectric material having a backside formed on a front side of a semiconductor or silicon substrate material and a front side, and a conducting material on the front side of the dielectric material. The conducting material may have a line portion and an interconnect structure electrically coupled to the line portion and separated from the front side of the substrate material by the dielectric material. The interconnect structure has a backside defining a contact surface. The semiconductor device may further include a semiconductor die proximate the front side of the dielectric material, an insulating material encasing at least a portion of the semiconductor die, and an opening through which the active contact surface at the backside of the interconnect structure is exposed for electrical connection.