US09711792B2
Provided is a positive electrode active material for lithium ion secondary batteries, having a crystal structure containing a layered Li2MnO2 structure with a high theoretical electrical capacity as a basic skeleton, and having both a high theoretical electrical capacity and a high open-circuit voltage by increasing an open-circuit voltage to a value of more than 2 V by replacing a part of manganese ions with calcium ions by adding the calcium ions. That is, a positive electrode active material for secondary batteries mainly containing a compound represented by a chemical composition formula Li2−xMn1−yCayO2, and an electrode and a battery including the same are realized. In the formula, x satisfies 0
US09711774B2
The present application provides a lithium ion battery including a thermal sensitive layer comprising polymer particles. The thermal sensitive layer may be disposed between the electrodes and the separator. When the lithium ion battery is under thermal runaway condition and the internal temperature rises to a critical temperature, the polymer particles undergo a thermal transition process (melting) to form an insulating barrier on the electrodes, which blocks lithium ion transfer between the electrodes and shuts down the internal current of the battery.
US09711773B2
The present disclosure provides a separator and a lithium-ion secondary battery. The separator comprises: a microporous membrane having micropores; and a coating provided on a surface of the microporous membrane. The coating comprises polymer particles and binder particles. The polymer particle is a hollow shell structure which comprises a shell and a cavity positioned in the shell, an outer surface of the shell is distributed with nanopores which are communicated with the cavity, a particle diameter of the polymer particle is larger than a pore size of the micropore of the microporous membrane; a particle diameter of the binder particle is larger than the pore size of the micropore of the microporous membrane. The lithium-ion secondary battery comprises: a positive electrode plate; a negative electrode plate; the aforementioned separator interposed between the positive electrode plate and the negative electrode plate; and an electrolyte.
US09711770B2
A battery system comprises a plurality of substantially planar layers extending over transverse areas. The plurality of layers comprises at least one cathode layer, at least one anode layer, and at least one separator layer therebetween.
US09711758B2
An organic light-emitting diode (OLED) light source includes, in order: (i) a biaxially oriented polyester film substrate including light-scattering particles (P1); (ii) optionally an organic planarising coating layer (OPC1); (iii) optionally a barrier layer (B1); (iv) an organic planarising coating layer (OPC2) including light-scattering particles (P2); (v) optionally a barrier layer (B2); and (vi) a multi-layer light-emitting assembly including a first electrode, a light-emitting organic layer and a second electrode; wherein the OLED light source includes at least one of barrier layers (B1) and (B2).
US09711757B2
An organic electroluminescent display device including a rear substrate, an organic electroluminescent portion disposed on a surface of the rear substrate, the organic electroluminescent portion including a first electrode, an organic layer, and a second electrode in sequence, a front substrate coupled to the rear substrate at an internal surface of the front substrate to seal an internal space in which the organic electroluminescent portion is accommodated, thereby isolating the organic electroluminescent portion from the outside, a transparent moisture-absorbing layer coated on the internal surface of the front substrate, and a sealant disposed between the rear substrate and the transparent moisture-absorbing layer to couple the front substrate and the rear substrate.
US09711755B2
A display panel is provided. The display panel includes a first substrate having a display area and a non-display area. A sealant is disposed on the first substrate and on the non-display area. A planarization layer is disposed on the first substrate. The planarization layer has a first trench formed therein on the non-display area. The first trench has a bottom and a side adjacent to the bottom. The bottom has a roughness that is greater than the roughness of the side.
US09711747B2
Disclosed is a white organic light emitting device for enhancing emission efficiency and a color viewing angle or a color reproduction rate. The white organic light emitting device includes a first emission part between a first electrode and a second electrode, the first emission part having a first emission layer, a second emission part on the first emission part, the second emission part having a second emission layer, and a third emission part on the second emission part, the third emission part having a third emission layer. At least two emission layers of the first to third emission layers emit lights having a same color to enhance emission efficiency and a color viewing angle, and the at least two emission layers are adjacent to each other.
US09711740B2
A novel organometallic complex which can emit phosphorescence is provided. A light-emitting element, a light-emitting device, an electronic device, or a lighting device with high emission efficiency is provided. The organometallic complex having an aryl triazine derivative as a ligand is represented by General Formula (G1) below as a representative of the organometallic complex of the present invention.
US09711736B2
A condensed cyclic compound is represented by Formula 1. The components of Formula 1 are described herein. An organic light-emitting device includes the condensed cyclic compound. The organic light-emitting device has improved driving voltage, improved luminance, improved efficiency, and improved half-lifetime, as compared to those of an organic light-emitting device that does not include the condensed cyclic compound.
US09711733B2
An organic thin film transistor containing a compound represented by one of the following formulae in a semiconductor active layer has a high carrier mobility and a small change in the threshold voltage after repeated driving. X represents S or O, and at least one of R1 to R6 represents -L-R wherein L represents alkylene, etc., and R represents alkyl, etc.
US09711727B2
A polymer having at least four different repeat units comprising: In this polymer R1, R2, R3 and R4 can be independently selected from the group consisting of alkyl group, alkoxy group, aryl groups and combinations thereof and where the combination of R1, R2, R3 and R4 are not all identical. Additionally, in this polymer, m, n, o and p can be greater than 1. x and y are different from each other and can be independently selected from the group consisting of: of alkyl group, alkoxy group, aryl groups, where y=1-3, where y=0-12, where R5 is selected from the group consisting of H, of alkyl group, alkoxy group, aryl groups, where R6 is selected from the group consisting of H, alkyl, substituted alkyls, aryls and substituted aryls, where R7 and R8 are independently selected from the group consisting of H, of alkyl group, alkoxy group, aryl groups, —NR9R10 where R9 and R10 are independently selected from the group consisting of H, of alkyl group, alkoxy group, aryl groups.
US09711724B2
A mask has both ends supported on a frame while tensile force is applied in a first direction. The mask includes: a mask main body having a band shape which is extended in the first direction; a plurality of active patterns spaced apart in the first direction from each other in the mask main body and having a first shape; a plurality of first ribs surrounding borders of the plurality of respective active patterns and defining a shape of the active pattern; and a plurality of first dummy patterns surrounding the plurality of first ribs, respectively, and having a second shape.
US09711721B2
According to one embodiment, a plurality of first wirings are disposed in a first direction and a second direction which intersect with each other, and extended in a third direction. A second wiring stack is configured to include second wirings and interlayer insulating films which are extended and alternately stacked in the second direction. A memory cell includes, in the first direction, a first variable resistive layer which is disposed on a side near the first wiring and a second variable resistive layer which is disposed on a side near the second wiring. The second variable resistive layer is disposed between the interlayer insulating films in the third direction, and made of a material which is obtained by oxidizing the second wiring.
US09711716B2
A magnetic memory device and a method for manufacturing the magnetic memory device are disclosed. The method includes forming a first interlayer insulating layer on a substrate, forming a first conductive pattern that penetrates the first interlayer insulating layer, forming a mold insulating layer that includes first and second mold insulating layers on the first interlayer insulating layer, forming a second conductive pattern that penetrates the first and second mold insulating layers and the first interlayer insulating layer, and forming a magnetic tunnel junction pattern on the second conductive pattern. The first mold insulating layer is in contact with the first conductive pattern, and the second mold insulating layer is disposed on the first mold insulating layer.
US09711711B2
A piezoelectric energy harvester device has a cantilevered structure with a rectangular proof mass portion defined by holes through a substrate along three sides of a proof mass portion and supported by a thinned hinge portion for free pivotal movement relative to an anchor portion. Elongated strips of piezoelectric energy harvesting units are formed in side-by-side spaced positions on the hinge portion and aligned parallel or perpendicular to a stress direction. Multiplexing electronics coupled to contact pads on the anchor portion selectively connects different strip combinations to power management circuitry, responsive to variations in vibration magnitude or modes.
US09711709B2
Transducer systems with reduced acoustic noise coupling are disclosed herein. In some embodiments, a transducer system includes pressure balancing features to prevent a floating portion of the transducer system from contacting a fixed portion of the transducer system, or to reduce the degree to which the floating portion is urged into contact with the fixed portion by process pressure or atmospheric pressure. In some embodiments, a transducer system includes one or more acoustic dampening elements, interruption grooves, annular projections, or dampening washers to reduce acoustic noise coupling between various components of the transducer system or between the transducer system and a flowcell in which the transducer system is mounted.
US09711705B2
Systems methods and/or apparatus for the conversion of various types of energy into thermal energy that may be stored and/or then converted into electrical energy. The electrical energy may be available on demand and/or at a user's desired power requirements (e.g., power level and/or type). For example, the energy may be available at a particular voltage and either as direct current (DC) energy or alternating current (AC) energy. The electrical energy may be easily transported and therefore available at a user's desired location. For example, the systems, methods and/or devices may eliminate or reduce the need for electricity transmission, at least for certain applications. In exemplary embodiments, the system may include an organic phase change material for storing the thermal energy.
US09711700B2
A light emitting device includes a light emitting element and a package. The package includes a first lead frame, a second lead frame, and a resin. The first lead frame has a first surface on which the light emitting element is provided. The first lead frame has a first overlap portion. The second lead frame is spaced apart from the first lead frame and has a second overlap portion. The first overlap portion and the second overlap portion overlap at an overlap position so that the first lead frame extends from the overlap position toward a first direction and a second direction opposite to the first direction and so that the second lead frame extend from the overlap position toward a third direction and a fourth direction opposite to the third direction as viewed along a line substantially perpendicular to the first surface.
US09711697B2
According to one aspect, the present invention concerns a terahertz modulator (1) intended to be used in a given frequency band of use. The modulator comprises a semi-conductor polar crystal (330) presenting a Reststrahlen band overlapping said frequency band of use and presenting at least one interface with a dielectric medium, coupling means (330) allowing the resanant coupling of an interface phonon polariton (IPhP) supported by said interface and of an incident radiation (2) of pre-determined frequency lying in said frequency band of use and means of control (22) apt to modify the intensity of the coupling between said interface phonon polariton and said incident radiation (2) by modification of the dielectric function of the polar crystal in the Reststrahlen band of the polar crystal (10).
US09711688B2
A light emission device comprising a light emitting element, a wavelength conversion (e.g. phosphor) element, and a filter that reduces Color over Angle (CoA) effects by at least partially reflecting light from the light emitting element that strike the filter at near-normal angles of incidence. In some embodiments, a combined phosphor and filter layer is formed over the LED die. The filter may comprise a dispersion of self-aligning moieties, such as dielectric platelets in a film that is vacuum laminated to the LED structure. Xirallic® Galaxy Blue pigment, comprising an aluminum oxide core coated on both sides with thin films of SnO2, and TiO2, and Ronastar® Blue, comprising Calcium Aluminum Borosilicate and TiO2 may provide the dielectric platelets.
US09711687B2
In embodiments of the invention, a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown on a substrate. The substrate is a non-III-nitride material. The substrate has an in-plane lattice constant asubstrate. At least one III-nitride layer in the semiconductor structure has a bulk lattice constant alayer and [(|asubstrate−alayer|)/asubstrate]*100% is no more than 1%. A surface of the substrate opposite the surface on which the semiconductor structure is grown is textured.
US09711684B2
There is provided a Group III nitride semiconductor light-emitting device in which electrons and holes are suppressed to be captured by threading dislocation, and a production method therefor. The light-emitting device comprises an n-type semiconductor layer, a light-emitting layer on the n-type semiconductor layer, a p-type semiconductor layer on the light-emitting layer. The light-emitting device has a plurality of pits extending from the n-type semiconductor layer to the p-type semiconductor layer. The n-type semiconductor layer includes an n-side electrostatic breakdown preventing layer. The n-side electrostatic breakdown preventing layer comprises an n-type GaN layer containing starting point of the pits, and an ud-GaN layer disposed adjacent to the n-type GaN layer and containing a part of the pits. At least one of the n-type GaN layer and the ud-GaN layer has an In-doped layer. The In composition ratio of the In-doped layer is more than 0 and not more than 0.0035.
US09711674B2
The present invention concerns methods for producing photovoltaic material and a device able to exploit high energy photons. The photovoltaic material is obtained from a conventional photovoltaic material having a top surface intended to be exposed to photonic radiation, having a built-in P-N junction delimiting an emitter part and a base part and comprising at least one area or region specifically designed, treated or adapted to absorb high energy or energetic photons, located adjacent or near at least one hetero-interface. According to the invention, this material is subjected to treatments resulting in the formation of at least one semiconductor based metamaterial field or region being created, as a transitional region of the or a hetero-interface, in an area located continuous or proximate to the or an absorption area or region for the energetic photons of the photonic radiation impacting said photovoltaic material.
US09711671B2
System and method of providing a photovoltaic (PV) cell with a complex via structure in the substrate that has a primary via for containing a conductive material and an overflow capture region for capturing an overflow of the conductive material from the primary via. The conductive filling in the primary via may serve as an electrical contact between the PV cell and another PV cell. The overflow capture region includes one or more recesses formed on the substrate back surface. When the conductive material overflows from the primary via, the one or more recesses can capture and confine the overflow within the boundary of the complex via structure. A recess may be a rectangular or circular trench proximate to or overlaying the primary via. The recesses may also be depressions formed by roughening the substrate back surface.
US09711665B2
A color converter comprising at least one layer comprising at least one organic fluorescent colorant and at least one barrier layer having a low permeability to oxygen.
US09711656B2
To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.
US09711648B1
A semiconductor structure is provided that includes a channel material portion composed of a III-V compound semiconductor located on a mesa portion of a substrate. A dielectric spacer structure is located on each sidewall surface of the channel material portion and each sidewall surface of the mesa portion of the substrate. The dielectric spacer structure has a height that is greater than a height of the channel material portion. An isolation structure is located on each dielectric spacer structure, wherein a sidewall edge of the isolation structure is located between an innermost sidewall surface and an outermost sidewall surface of the dielectric spacer structure.
US09711646B2
A semiconductor structure and a manufacturing method for the same are disclosed. The semiconductor structure includes a first gate structure, a second gate structure and a second dielectric spacer. Each of the first gate structure and the second gate structure adjacent to each other includes a first dielectric spacer. The second dielectric spacer is on one of opposing sidewalls of the first gate structure and without being disposed on the dielectric spacer of the second gate structure.
US09711644B2
One illustrative method disclosed herein includes, among other things, forming a liner semiconductor material within a trench, the liner material defining a transistor cavity, and forming spaced-apart source/drain placeholder structures that are at least partially positioned within the transistor cavity, the spaced-apart source/drain placeholder structures defining a gate cavity therebetween where a portion of the liner semiconductor material is exposed within the gate cavity. The method further includes forming a gate structure within the gate cavity and, after forming the gate structure, removing at least a portion of the source/drain placeholder structures to define a plurality of source/drain cavities within the transistor cavity on opposite sides of the gate structure, and forming a source/drain structure in each of the source drain cavities.
US09711639B2
A semiconductor device contains a vertical MOS transistor having a trench gate in trenches extending through a vertical drift region to a drain region. The trenches have field plates under the gate; the field plates are adjacent to the drift region and have a plurality of segments. A dielectric liner in the trenches separating the field plates from the drift region has a thickness great than a gate dielectric layer between the gate and the body. The dielectric liner is thicker on a lower segment of the field plate, at a bottom of the trenches, than an upper segment, immediately under the gate. The trench gate may be electrically isolated from the field plates, or may be connected to the upper segment. The segments of the field plates may be electrically isolated from each other or may be connected to each other in the trenches.
US09711636B2
A super-junction semiconductor device is provided. The super-junction semiconductor device includes a substrate, a drift layer, a field insulator, a floating electrode layer, an isolation layer, and at least one transistor structure. The drift layer includes a plurality of n-type and p-type pillars alternately arranged in parallel to form a super-junction structure. An active region, a termination region and a transition region located therebetween are defined in the drift layer. The field insulator disposed on a surface of the drift layer covers the termination region and a portion of the transition region. The floating electrode layer disposed on the field insulator partially overlaps with the termination region. The transistor structure includes a source conductive layer extending from the active region to the transition region and superimposed on a portion of the floating electrode layer. The source conductive layer is isolated from the floating electrode layer by the isolation layer.
US09711635B1
A semiconductor device includes: a first semiconductor layer formed at a surface of a semiconductor substrate; an insulating layer formed on the surface of the semiconductor substrate; a first electrode that is electrically connected to the first semiconductor layer; a second semiconductor layer formed to a surface of a region, which is adjacent to the first semiconductor layer; a second electrode formed above a part of the second semiconductor layer; a third semiconductor layer adjacent to the second semiconductor layer in the one direction; a fourth semiconductor layer formed to a surface of a region, which is adjacent to the third semiconductor layer in the one direction; a third electrode that is electrically connected to the fourth semiconductor layer; and a conductor that is separated from the second electrode in the one direction and is kept at the same potential as the first electrode.
US09711633B2
Methods of forming a semiconductor device include forming a dielectric layer on a Group III-nitride semiconductor layer, selectively removing portions of the dielectric layer over spaced apart source and drain regions of the semiconductor layer, implanting ions having a first conductivity type directly into the source and drain regions of the semiconductor layer, annealing the semiconductor layer and the dielectric layer to activate the implanted ions, and forming metal contacts on the source and drain regions of the semiconductor layer.
US09711632B2
The present disclosure relates to an intra-band tunnel FET, which has a symmetric FET that is able to provide for a high drive current. In some embodiments, the disclosed intra-band tunnel FET has a source region having a first doping type and a drain region having the first doping type. The source region and the drain region are separated by a channel region. A gate region may generate an electric field that varies the position of a valence band and/or a conduction band in the channel region. By controlling the position of the valence band and/or the conduction band of the channel region, quantum mechanical tunneling of charge carries between the conduction band in the source region and in the drain region or between the valence band in the source region and in the drain region can be controlled.
US09711628B2
A semiconductor device has a reduced an on-voltage and uses a gate resistance to improve the trade-off relationship between turn-on loss Eon and dV/dt, and turn-on dV/dt controllability. A floating p+-type region is provided in an n−-type drift layer so as to be spaced from a p-type base region configuring a MOS gate structure. An emitter electrode and the floating p+-type region are electrically connected by an n+-type region provided in the surface layer of a substrate front surface. The n+-type region is covered with a second insulating film which film is covered with an emitter electrode. By an electric field being generated in the n+-type region by the emitter electrode provided on the top of the n+-type region via the second interlayer insulating film, the n+-type region forms a current path which causes holes accumulated in the floating p+-type region to flow to the emitter electrode when turning on.
US09711625B2
A method for manufacturing a thin-film transistor includes: forming a first metal layer of a pattern including a gate on a substrate through pattern formation operations; forming a gate insulation layer on the substrate and the first metal layer and forming an oxide semiconductor layer, of which an orthogonal projection is cast on the gate, on the gate insulation layer within a thin-film transistor area and an etch stop layer on the oxide semiconductor layer, in which two etching operations are applied to the patternized oxide semiconductor layer and etch stop layer; forming a patternized second metal layer on the thin-film transistor area and an exposed portion of the gate insulation layer, forming a patternized insulation protection layer on the substrate and the patternized second metal layer, and forming a patternized pixel electrode on the insulation protection layer.
US09711621B2
A trench transistor having a semiconductor body includes a source region, a body region, a drain region electrically connected to a drain contact, and a gate trench including a gate electrode which is isolated from the semiconductor body. The gate electrode is configured to control current flow between the source region and the drain region along at least a first side wall of the gate trench. The trench transistor further includes a doped semiconductor region having dopants introduced into the semiconductor body through an unmasked part of the walls of a trench.
US09711620B2
A fin field effect transistor (FinFET) comprises a substrate; a fin over the substrate, the fin having a channel region; a gate structure engaging the fin adjacent to the channel region; and a spacer on sidewalls of the gate structure. The FinFET further includes first and second heavily doped source/drain (HDD) features at least partially in the fin, on opposing sides of the gate structure, and adjacent to the spacer. The FinFET further includes first and second lightly doped source/drain (LDD) regions in the fin between the first and second HDD features, respectively, and the channel region. A sidewall of the first HDD feature and a sidewall of the first LDD region have substantially a same shape.
US09711612B2
A semiconductor device structure and a method for fabricating the same. A method for fabricating semiconductor device structure includes forming gate lines on a semiconductor substrate; forming gate sidewall spacers surrounding the gate lines; forming respective source/drain regions in the semiconductor substrate and on either side of the respective gate lines; forming conductive sidewall spacers surrounding the gate sidewall spacers; and cutting off the gate lines, the gate sidewall spacers and the conductive sidewall spacers at predetermined positions, in which the cut gate lines are electrically isolated gates, and the cut conductive sidewall spacers are electrically isolated lower contacts. The method is applicable to the manufacture of contacts in integrated circuits.
US09711607B1
A method and structure for providing a GAA device. In some embodiments, a substrate including an insulating layer disposed thereon is provided. By way of example, a first metal portion is formed within the insulating layer. In various embodiments, a first lateral surface of the first metal portion is exposed. After exposure of the first lateral surface of the first metal portion, a first graphene layer is formed on the exposed first lateral surface. In some embodiments, the first graphene layer defines a first vertical plane parallel to the exposed first lateral surface. Thereafter, in some embodiments, a first nanobar is formed on the first graphene layer, where the first nanobar extends in a first direction normal to the first vertical plane defined by the first graphene layer.
US09711604B1
First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The first, second, and third trenches are partially filled with a first conductive material. A first anti-reflective material is coated over the first, second, and third trenches. The first anti-reflective material has a first surface topography variation. A first etch-back process is performed to partially remove the first anti-reflective material. Thereafter, a second anti-reflective material is coated over the first anti-reflective material. The second anti-reflective material has a second surface topography variation that is smaller than the first surface topography variation. A second etch-back process is performed to at least partially remove the second anti-reflective material in the first and second trenches. Thereafter, the first conductive material is partially removed in the first and second trenches.
US09711600B2
In a semiconductor device having a silicon carbide device, a technique capable of suppressing variation in a breakdown voltage and achieving reduction in an area of a termination structure is provided. In order to solve the above-described problem, in the present invention, in a semiconductor device having a silicon carbide device, a p-type first region and a p-type second region provided to be closer to an outer peripheral side than the first region are provided in a junction termination portion, a first concentration gradient is provided in the first region, and a second concentration gradient larger than the first concentration gradient is provided in the second region.
US09711599B2
A switching device, such as a barrier junction Schottky diode, has a body of silicon carbide of a first conductivity type housing switching regions of a second conductivity type. The switching regions extend from a top surface of the body and delimit body surface portions between them. A contact metal layer having homogeneous chemical-physical characteristics extends on and in direct contact with the top surface of the body and forms Schottky contact metal portions with the surface portions of the body and ohmic contact metal portions with the switching regions. The contact metal layer is formed by depositing a nickel or cobalt layer on the body and carrying out a thermal treatment so that the metal reacts with the semiconductor material of the body and forms a silicide.
US09711596B2
A semiconductor device includes a substrate, a first source/drain (S/D) region, a second S/D region, and a semiconductor sheet. The first S/D region is disposed on the substrate. The second S/D region is disposed above the first S/D region. The semiconductor sheet interconnects the first and second S/D regions and includes a plurality of turns. A method for fabricating the semiconductor device is also disclosed.
US09711590B2
There is provided a semiconductor device including corundum crystal films of good quality. There is provided a semiconductor device including a base substrate, a semiconductor layer, and an insulating film each having a corundum crystal structure. Materials having a corundum crystal structure include many types of oxide films capable of functioning as an insulating film. Since all the base substrate, the semiconductor layer, and the insulating film have a corundum crystal structure, it is possible to achieve a semiconductor layer and an insulating film of good quality on the base substrate.
US09711588B2
Disclosed is an organic light emitting display device that may include first and second pads on a pad area of a substrate, wherein the first pad includes a first bonding region and a first link region, and the second pad includes a second bonding region, a contact region, and a second link region. A first bonding electrode in the first bonding region is electrically connected to one or more signal lines in the active area of the device through contact holes in the first bonding region. A second bonding electrode is electrically connected to one or more signal lines of the device through contact holes in the contact region. The contact region is closer to the active area than the first bonding region.
US09711586B2
An organic light-emitting display apparatus includes a substrate, thin film transistors (TFTs), and organic light-emitting diode elements (OLEDs). First wirings have a first width and a first height and second wirings have a second width and a second height, in which the first wirings and the second wirings are formed in at least a portion of areas between the OLEDs. Third wirings connect the first wirings and the second wirings and have a third width smaller than the first width of the first wirings and the second width of the second wirings or have a third height smaller than the first height of the first wirings and the second height of the second wirings. An insulating layer covers at least a portion of the first and second wiring portions and exposes at least a portion of the third wirings.
US09711585B2
An organic light emitting diode display according to an example embodiment of the present invention includes: a substrate; a scan line and a data line that are insulated from one another and crossing each other on the substrate; a first transistor on the substrate and connected to the scan line and the data line; a second transistor connected to the first transistor; a first electrode connected to the second transistor and having a cutout; an organic emission layer on the first electrode; and a second electrode on the organic emission layer, wherein the cutout is at a position corresponding to the data line.
US09711565B2
Memory cells are disclosed. Magnetic regions within the memory cells include an alternating structure of magnetic sub-regions and coupler sub-regions. The coupler material of the coupler sub-regions antiferromagnetically couples neighboring magnetic sub-regions and effects or encourages a vertical magnetic orientation exhibited by the neighboring magnetic sub-regions. Neighboring magnetic sub-regions, spaced from one another by a coupler sub-region, exhibit oppositely directed magnetic orientations. The magnetic and coupler sub-regions may each be of a thickness tailored to form the magnetic region in a compact structure. Interference between magnetic dipole fields emitted from the magnetic region on switching of a free region in the memory cell may be reduced or eliminated. Also disclosed are semiconductor device structures, spin torque transfer magnetic random access memory (STT-MRAM) systems, and methods of fabrication.
US09711558B2
An imaging device including a unit pixel cell comprising: a semiconductor substrate including a first conductivity type region of a first conductivity type, a first and second impurity regions of a second conductivity type provided in the first conductivity type region; a photoelectric converter located above the semiconductor substrate; and a first transistor including a gate electrode and at least a part of the second impurity region as a source or a drain. The first impurity region is at least partially located in a surface of the semiconductor substrate and electrically connected to the photoelectric converter. The second impurity region is electrically connected to the photoelectric converter via the first impurity region and has an impurity concentration lower than that of the first impurity region. The second impurity region at least partially overlaps the gate electrode in a plan view.
US09711556B2
An image sensor structure includes a region of semiconductor material having a first major surface and a second major surface. A pixel structure is within the region of semiconductor material and includes a plurality of doped regions and a plurality of conductive structures. A metal-filled trench structure extends from the first major surface to the second major surface. A first contact structure is electrically connected to a first surface of the conductive trench structure, and a second contact structure electrically connected to a second surface of the conductive trench structure. In one embodiment, the second major surface is configured to receive incident light.
US09711552B2
Optoelectronic modules include a silicon substrate in which or on which there is an optoelectronic device. An optics assembly is disposed over the optoelectronic device, and a spacer separates the silicon substrate from the optics assembly. Methods of fabricating such modules also are described.
US09711548B2
Methods of forming semiconductor devices are disclosed. In some embodiments, a first trench and a second trench are formed in a substrate, and dopants of a first conductivity type are implanted along sidewalls and a bottom of the first trench and the second trench. The first and second trenches are filled with an insulating material, and a gate dielectric and a gate electrode over the substrate, the gate dielectric and the gate electrode extending over the first trench and the second trench. Source/drain regions are formed in the substrate on opposing sides of the gate dielectric and the gate electrode.
US09711537B2
A display device with low manufacturing cost, a display device with low power consumption, a display device capable of being formed over a large substrate, a display device with a high aperture ratio of a pixel, and a display device with high reliability are provided. The display device includes a transistor electrically connected to a light-transmitting pixel electrode and a capacitor. The transistor includes a gate electrode, a gate insulating film, and a first multilayer film including an oxide semiconductor layer. The capacitor includes the pixel electrode and a second multilayer film overlapping with the pixel electrode, positioned at a predetermined distance from the pixel electrode, and having the same layer structure as the first multilayer film. A channel formation region of the transistor is at least one layer, which is not in contact with the gate insulating film, of the first multilayer film.
US09711533B2
A semiconductor device includes a first FinFET device and a second FinFET device. The first FinFET device includes a first gate, a first source, and a first drain. The first FinFET device has a first source/drain proximity. The second FinFET device includes a second gate, a second source, and a second drain. The second FinFET device has a second source/drain proximity that is smaller than the first source/drain proximity. In some embodiments, \the first FinFET device is an Input/Output (I/O) device, and the second FinFET device is a non-I/O device such as a core device. In some embodiments, the greater source/drain proximity of the first FinFET device is due to an extra spacer of the first FinFET device that does not exist for the second FinFET device.
US09711526B2
According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, and a columnar part. The stacked body is provided on the substrate. The stacked body includes a plurality of first insulating films and a plurality of electrode films alternately stacked one layer by one layer. The columnar part includes a semiconductor pillar provided in the stacked body and extending in a stacking direction of the stacked body, and a memory film provided between the semiconductor pillar and the stacked body. The electrode films include a first portion provided on a side part of the columnar part, a second part contacting the first portion and provided further outside the columnar part, and a first conductive layer covering an upper surface and a lower surface of the first portion.
US09711506B2
A method of fabricating a semiconductor device includes preparing a substrate including a first region and a second region, sequentially forming a first semiconductor layer and a second semiconductor layer on the first and second regions, patterning the first and second semiconductor layers to form a lower semiconductor pattern and an upper semiconductor pattern on each of the first and second regions, selectively removing the lower semiconductor pattern on the second region to form a gap region, and forming gate electrodes at the first and second regions, respectively.
US09711500B1
A package may include a plurality of stacked semiconductor devices (chips) is disclosed. Each chip may include through vias (through silicon vias—TSV) that can provide an electrical connection between chips and between chips and external connections, such as solder connections or solder balls. Electro static discharge (ESD) protection circuitry may be placed on a bottom chip in the stack even when through vias connect circuitry on a top chip in the stack exclusive of the bottom chip. In this way, ESD protection circuitry may be placed in close proximity to the ESD event occurring at an external connection. In particular, every chip in the stack of semiconductor chips may have circuitry electrically connected to the external connection and by placing ESD protection circuitry on the bottom chip closest to the electrical connection, instead of on all chips ESD protection may be more area efficient. Furthermore, by only placing ESD protection circuitry on a bottom chip in a stack of semiconductor chips, ESD protection circuitry may not be included on other chips, so that total area may be reduced and more chips may be produced on a single silicon wafer.
US09711499B2
A semiconductor device includes first and second semiconductor regions, and a third semiconductor region between the first and second semiconductor regions, wherein the dopant concentration of the third semiconductor region is greater than the dopant concentration of the second semiconductor region. The semiconductor device further includes a fourth semiconductor region selectively provided on an upper surface of the second semiconductor region, wherein a portion of the second semiconductor region is interposed between the third semiconductor region and the fourth semiconductor region, an insulating layer disposed on the second semiconductor region and the fourth semiconductor region and having an opening that exposes a portion of a top surface of the fourth semiconductor region, wherein the ratio of an area of opening to an area of the top surface is from 10% to 90%, and a wiring layer on the insulating layer and connected to the fourth semiconductor region via the opening.
US09711497B2
A semiconductor unit includes: a transistor configured to provide electrical conduction between a first terminal and a second terminal, based on a trigger signal; and a trigger device formed in a transistor region where the transistor is formed, and configured to generate the trigger signal, based on a voltage applied to the first terminal.
US09711494B2
Methods of fabricating multi-die assemblies including a base semiconductor die bearing a peripherally encapsulated stack of semiconductor dice of lesser lateral dimensions, the dice vertically connected by conductive elements between the dice, resulting assemblies, and semiconductor devices comprising such assemblies.
US09711488B2
The invention provides a semiconductor package assembly. The semiconductor package assembly includes a semiconductor die. A first molding compound covers a back surface of the semiconductor die. A redistribution layer (RDL) structure is disposed on a front surface of the semiconductor die. The semiconductor die is coupled to the RDL structure. A second molding compound is disposed on the front surface of the semiconductor die and embedded in the RDL structure. A passive device is disposed on the second molding compound and coupled to the semiconductor die.
US09711486B2
A stacked semiconductor device includes: a plurality of stacked integrated-circuit chips that are to be mounted onto a substrate and including at least one power-supply target chip; a decoupling through-electrode transmission line including a decoupling power-supply-side through-electrode wiring line coupled to a power-supply terminal of the at least one power-supply target chip and a decoupling ground-side through-electrode wiring line coupled to a ground terminal of the at least one power-supply target chip; a resistor and a capacitor provided one of the a plurality of integrated-circuit chips that is located at a termination of the decoupling through-electrode transmission line, the resistor having an impedance substantially equal to a characteristic impedance of the decoupling through-electrode transmission line, wherein the resistor and the capacitor are coupled in series.
US09711483B2
A bonding apparatus bonds a plurality of device chips on a plurality of electrode pads that are provided to a surface of a substrate. The bonding apparatus includes a stage, a head unit, a head lifting mechanism, a head vibrator, a heater, and a bonding region observation component. The substrate is placed and supported on the stage. The head unit holds the device chips. The head lifting mechanism raises and lowers the head unit in an up and down direction relative to the stage. The head vibrator vibrate the head unit in the up and down direction. The heater heats a bonding paste that bonds the device chips and the electrode pads. The bonding region observation component observes a region that includes at least a peripheral part of the electrode pads.
US09711467B2
In accordance with an embodiment, a semiconductor component, includes a common mode filter monolithically integrated with a protection device. The common mode filter includes a plurality of coils and the protection device has a terminal coupled to a first coil and another terminal coupled to a second coil.
US09711465B2
An integrated fan-out package having a top-side redistribution wiring structure, a back-side redistribution wiring layer, a ground plane provided in the back-side redistribution wiring layer, and a molding compound layer having a thickness and provided between the back-side redistribution wiring layer and the top-side redistribution wiring structure is disclosed. The package has an RF IC die embedded within the molding compound layer and one or more integrated patch antenna structure provided in the top-side redistribution wiring structure. The one or more integrated patch antenna structure is coupled to the RF IC die and an antenna cavity is provided within the molding compound layer under each of the one or more integrated patch antenna.
US09711464B2
A structure and a method. The structure includes a semiconductor substrate; a stack of wiring levels from a first wiring level to a last wiring level, the first wiring level closest to the semiconductor substrate and the last wiring level furthest from the semiconductor substrate, the stack of wiring levels including an intermediate wiring level between the first wiring level and the last wiring level; active devices contained in the semiconductor substrate and the first wiring level, each wiring level of the stack of wiring levels comprising a dielectric layer containing electrically conductive wire; a trench extending from the intermediate wiring level, through the first wiring level into the semiconductor substrate; and a chemical agent filling the trench, portions of at least one wiring level of the stack of wiring levels not chemically inert to the chemical agent or a reaction product of the chemical agent.
US09711460B2
A semiconductor device includes: a semiconductor chip including an electronic part; and a package sealing the semiconductor chip, wherein the package includes a transparent section which is opaque to visible light and transparent to near-infrared light or near-ultraviolet light, and the transparent section is disposed in such a way that the electronic part is observed from outside under the near-infrared light or the near-ultraviolet light.
US09711459B2
The present disclosure relates to a multi-layer substrate structure with an embedded die to miniaturize designs and improve performance. The multi-layer substrate structure includes a core layer having a cavity and a die mounted within the cavity. The die has a die body, a die conductive element on a top surface of the die body, and a dielectric layer over the die conductive element. The multi-layer substrate structure also includes a substrate conductive element formed over a portion of a top surface of the core layer and extending over at least a portion of the die conductive element. Overlapping portions of the die conductive element and the substrate conductive element are separated by the dielectric layer and form an electronic component.
US09711457B2
Semiconductor devices and methods of manufacturing semiconductor devices. One example of a method of fabricating a semiconductor device comprises forming a conductive feature extending through a semiconductor substrate such that the conductive feature has a first end and a second end opposite the first end, and wherein the second end projects outwardly from a surface of the substrate. The method can further include forming a dielectric layer over the surface of the substrate and the second end of the conductive feature such that the dielectric layer has an original thickness. The method can also include removing a portion of the dielectric layer to an intermediate depth less than the original thickness such that at least a portion of the second end of the conductive feature is exposed.
US09711456B2
A semiconductor device includes a metal-containing structure such as a copper-containing wire or plug and a composite capping layer formed over the metal-containing structure. The composite capping layer includes a manganese-containing layer disposed over the metal-containing structure, a silicon-containing low-k dielectric layer disposed over the manganese-containing layer, and an intermediate layer between the manganese-containing layer and the silicon-containing low-k dielectric layer. The intermediate layer is the reaction product of the manganese-containing layer and the silicon-containing low-k dielectric layer.
US09711451B2
Characteristics of a semiconductor device are improved. A semiconductor device includes a coil CL1 and a wiring M2 formed on an interlayer insulator IL2, a wiring M3 formed on an interlayer insulator IL3, and a coil CL2 and a wiring M4 formed on the interlayer insulator IL4. Moreover, a distance DM4 between the coil CL2 and the wiring M4 is longer than a distance DM3 between the coil CL2 and the wiring M3 (DM4>DM3). Furthermore, the distance DM3 between the coil CL2 and the wiring M3 is set to be longer than a sum of a film thickness of the interlayer insulator IL3 and a film thickness of the interlayer insulator IL4, which are positioned between the coil CL1 and the coil CL2. In this manner, it is possible to improve an insulation withstand voltage between the coil CL2 and the wiring M4 or the like, where a high voltage difference tend to occur. Moreover, a transformer formation region 1A and a seal ring formation region 1C surrounding a peripheral circuit formation region 1B are formed so as to improve the moisture resistance.
US09711450B1
Interconnect structures are provided that include an intermetallic compound as either a cap or liner material. The intermetallic compound is a thermal reaction product of a metal or metal alloy of an interconnect metallic region with a metal of either a metal cap or a metal layer. In some embodiments, the metal cap may include a metal nitride and thus a nitride-containing intermetallic compound can be formed. The formation of the intermetallic compound can improve the electromigration resistance of the interconnect structures and widen the process window for fabricating interconnect structures.
US09711448B2
A finger metal oxide metal capacitor including an outer conducting structure and an inner conducting structure. The outer conducting structure is defined in a plurality of metal layers and a plurality of via layers of an integrated circuit and includes first and second side portions. An inner conducting structure is defined in the plurality of metal layers and the plurality of via layers of the integrated circuit. Each of the outer conducting structure and the inner conducting structure includes respective finger sections extending in the plurality of metal layers. Oxide is arranged between the outer conducting structure and the inner conducting structure.
US09711447B1
Methods of lithographic patterning and structures formed by lithographic patterning. A hardmask layer is formed on a dielectric layer, a feature is formed on the hardmask layer, and a mandrel is formed that extends in a first direction across the first feature. The mandrel and the hardmask layer beneath the mandrel are removed to pattern the hardmask layer with the feature masking a section of the hardmask layer. After the hardmask layer is patterned, the dielectric layer is etched to form a first trench and a second trench that are separated by a section of the dielectric layer masked by the section of the hardmask layer. The first trench and the second trench are filled with a conductor layer to respectively form a first wire and a second wire that is separated from the first wire by the section of the dielectric layer.
US09711443B2
Incorporating at least one magnetic alignment structure on a microelectronic device and incorporating at least one alignment coil within a microelectronic substrate, wherein the alignment coil may be powered to form a magnetic field to attract the magnetic alignment structure, thereby aligning the microelectronic device to the microelectronic substrate. After alignment, the microelectronic device may be electrically attached to the substrate. Embodiments may include additionally incorporating an alignment detection coil within the microelectronic substrate, wherein the alignment detection coil may be powered to form a magnetic field to detect variations in the magnetic field generated by the alignment coil in order verify the alignment of the microelectronic device to the microelectronic substrate.
US09711440B2
A wiring board includes a core substrate including an insulating layer and a conductor layer formed on the insulating layer, and a build-up layer laminated on the substrate and including an inter-layer insulating layer and a conductor layer laminated on the inter-layer. The substrate has opening penetrating through the insulating layer such that surface of the conductor layer in the substrate is forming bottom of the opening, the substrate has a via conductor formed in the opening and including plating filling the opening, the conductor layer in the substrate includes a metal foil, the conductor layer in the build-up layer includes a metal foil, and the metal foil in the substrate has surface in contact with the surface of the insulating layer such that the surface of the metal foil in the substrate has surface roughness smaller than surface roughness of surface of the metal foil in the build-up layer.
US09711439B2
A printed wiring board includes an insulating layer including insulating material, and a conductor layer formed on a surface of the insulating layer and including conductor pads and conductor patterns such that the conductor pads are positioned to connect one or more electronic components and that the conductor patterns are formed between the conductor pads. The conductor patterns are formed such that each conductor pattern has a pattern width of 3 μm or less and that the conductor patterns have a pattern interval of 3 μm or less between adjacent conductor patterns, and the insulating layer has recess portions formed on the surface between the conductor patterns at least along the conductor patterns such that the recess portions have a depth in a range of 0.1 μm to 2.0 μm relative to a contact interface at which the conductor patterns and the insulating layer are in contact with each other.
US09711437B2
According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. The semiconductor package also includes a driver circuit configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature. The temperature sensor can be on a common IC with the driver circuit. Furthermore, the semiconductor package can include an over-temperature protection circuit configured to provide over-temperature protection to the multi-phase power inverter using the sensed temperature.
US09711427B2
A package includes a die, which includes a semiconductor substrate, a plurality of through-vias penetrating through the semiconductor substrate, a seal ring overlapping and connected to the plurality of through-vias, and a plurality of electrical connectors underlying the semiconductor substrate and connected to the seal ring. An interposer is underlying and bonded to the die. The interposer includes a substrate, and a plurality of metal lines over the substrate. The plurality of metal lines is electrically coupled to the plurality of electrical connectors. Each of the plurality metal lines has a first portion overlapped by the first die, and a second portion misaligned with the die. A thermal conductive block encircles the die, and is mounted on the plurality of metal lines of the interposer.
US09711425B2
A sensing module is provided. The sensing module includes a sensing device. The sensing device includes a first substrate having a first surface and a second surface opposite thereto. The sensing device also includes a sensing region adjacent to the first surface and a conducting pad on the first surface. The sensing device further includes a redistribution layer on the second surface and electrically connected to the conducting pad. The sensing module also includes a second substrate and a cover plate bonded to the sensing device so that the sensing device is between the second substrate and the cover plate. The conducting pad is electrically connected to the second substrate through the redistribution layer. The sensing module further includes an encapsulating layer filled between the second substrate and the cover plate to surround the sensing device.
US09711423B2
A via hole is accurately formed in an interlayer insulating film over a metal wiring. Of emission spectra of plasma to be used for dry etching of the interlayer insulating film, the emission intensities of at least CO, CN, and AlF are monitored such that an end point of the dry etching of the interlayer insulating film is detected based on the emission intensities thereof.
US09711422B2
Methods and structures provide an electrostatic discharge (ESD) indicator including an electric field sensitive material configured to undergo a specific color change in response to an electric field. An exposure of the structure to an ESD can be visually determined via the specific color change of the ESD indicator.
US09711418B2
Provided is a composite substrate which has a high-performance semiconductor layer. A composite substrate of the present invention comprises: a supporting substrate which is formed of an insulating material; a semiconductor layer which is formed of a single crystal semiconductor that is superposed on and joined to the supporting substrate; and interfacial inclusions which are present in the interface between the supporting substrate and the semiconductor layer at a density of 1012 atoms/cm2 or less, and which are formed of a metal element that is different from the constituent elements of the supporting substrate and the semiconductor layer.
US09711405B2
A substrate dividing method which can thin and divide a substrate while preventing chipping and cracking from occurring. This substrate dividing method comprises the steps of irradiating a semiconductor substrate 1 having a front face 3 formed with functional devices 19 with laser light while positioning a light-converging point within the substrate, so as to form a modified region including a molten processed region due to multiphoton absorption within the semiconductor substrate 1, and causing the modified region including the molten processed region to form a starting point region for cutting; and grinding a rear face 21 of the semiconductor substrate 1 after the step of forming the starting point region for cutting such that the semiconductor substrate 1 attains a predetermined thickness.
US09711402B1
A method of fabricating a semiconductor device is disclosed. The method includes forming a source/drain feature over a substrate, forming a dielectric layer over the source/drain feature, forming a contact trench through the dielectric layer to expose the source/drain feature, depositing a titanium nitride (TiN) layer by a first atomic layer deposition (ALD) process in the contact trench and depositing a cobalt layer over the TiN layer in the contact trench.
US09711391B1
In a method for manufacturing a semiconductor device, a first dielectric layer is formed over a substrate. A first set of recesses is formed in the first dielectric layer. A metal layer is formed in the first set of recesses. A set of metal wirings is formed from the metal layer in the first set of recesses. A second set of recesses is formed in the first dielectric layer. A second dielectric layer is formed over the set of metal wirings and in the second set of recesses. A third set of recesses is formed in the first dielectric layer and the second dielectric layer. A third dielectric layer is formed over the metal wirings and in the third set of recesses.
US09711387B2
A compliant bipolar micro device transfer head array and method of forming a compliant bipolar micro device transfer array from an SOI substrate are described. In an embodiment, a compliant bipolar micro device transfer head array includes a base substrate and a patterned silicon layer over the base substrate. The patterned silicon layer may include first and second silicon interconnects, and first and second arrays of silicon electrodes electrically connected with the first and second silicon interconnects and deflectable into one or more cavities between the base substrate and the silicon electrodes.
US09711386B2
Embodiments of the present invention provide a substrate support assembly including an electrostatic chuck with enhanced heat resistance. In one embodiment, an electrostatic chuck includes a support base, an electrode assembly having interleaved electrode fingers formed therein, and an encapsulating member disposed on the electrode assembly, wherein the encapsulating member is fabricated from one of a ceramic material or glass.
US09711383B2
In aspects of the invention, a holding stage of a pick up system can include a first stage on which a semiconductor chip is mounted with an adhesive sheet put in between, a second stage supporting the first stage, and an evacuation pipe. The first stage can be provided with a plurality of grooves, projections each being formed with side walls of adjacent grooves, and air holes connected to the grooves. The semiconductor chip can be mounted on the first stage so that the whole end portion of the semiconductor chip does not position on one groove. Then, a closed space surrounded by the adhesive sheet and the first and second stages and can be evacuated to make the semiconductor chip held on the projections. Thereafter, the semiconductor chip can be picked up by a collet.
US09711360B2
Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-containing amorphous carbon films on a substrate with reduced particle contamination. In one implementation, the method comprises flowing a hydrocarbon-containing gas mixture into a processing volume having a substrate positioned therein, flowing a boron-containing gas mixture into the processing volume, stabilizing the pressure in the processing volume for a predefined RF-on delay time period, generating an RF plasma in the processing volume after the predefined RF-on delay time period expires to deposit a boron-containing amorphous film on the substrate, exposing the processing volume of the process chamber to a dry cleaning process and depositing an amorphous boron season layer over at least one surface in the processing volume of the process chamber.
US09711347B2
Methods and compositions for depositing rare earth metal-containing layers are described herein. In general, the disclosed methods deposit the precursor compounds comprising rare earth-containing compounds using deposition methods such as chemical vapor deposition or atomic layer deposition. The disclosed precursor compounds include a cyclopentadienyl ligand having at least one aliphatic group as a substituent and an amidine ligand.
US09711332B2
Systems and methods for tuning an impedance matching network in a step-wise fashion for each state are described. By tuning the impedance matching network in a step-wise fashion for each state instead of directly achieving optimum values of a radio frequency (RF) for each state and directly achieving an optimal value of a combined variable capacitance for each state, processing of a wafer using the tuned optimal values becomes feasible.
US09711331B2
This disclosure describes systems, methods, and apparatus for pulsed RF power delivery to a plasma load for plasma processing of a substrate. In order to maximize power delivery, a calibration phase using a dummy substrate or no substrate in the chamber, is used to ascertain a preferred fixed initial RF frequency for each pulse. This fixed initial RF frequency is then used at the start of each pulse during a processing phase, where a real substrate is used and processed in the chamber.
US09711329B2
A method for improving the productivity of a hybrid scan implanter by determining an optimum scan width is provided. A method of tuning a scanned ion beam is provided, where a desired beam current is determined to implant a workpiece with desired properties. The scanned beam is tuned utilizing a setup Faraday cup. A scan width is adjusted to obtain an optimal scan width using setup Faraday time signals. Optics are tuned for a desired flux value corresponding to a desired dosage. Uniformity of a flux distribution is controlled when the desired flux value is obtained. An angular distribution of the ion beam is further measured.
US09711320B2
An emitter device having an emission surface includes a plurality of ligaments configured to emit electrons in response to an applied electric field resulting from an applied electrical voltage. Further, the emitter device includes a plurality of slots configured to provide physical separation between two or more adjacently disposed ligaments of the plurality of ligaments, where one or more slots of the plurality of slots define an electrical path. Moreover, the emitter device includes a low work function layer disposed on at least a portion of a ligament of the plurality of ligaments.
US09711319B2
The present invention discloses a system and method for generating a beam of fast ions. The system comprising: a target substrate having a patterned surface, a pattern comprising nanoscale pattern features oriented substantially uniformly along a common axis; and; a beam unit adapted for receiving a high power coherent electromagnetic radiation beam and providing an electromagnetic radiation beam having a main pulse and a pre-pulse and focusing it onto said patterned surface of the target substrate to cause interaction between said radiation beam and said substrate enabling creation of fast ions.
US09711308B2
Systems (100) and methods (600) for controlling operations of a Handheld Scanning and Deactivation (“HSD”) device. The methods comprise: determining whether a human is located within a defined distance range of the HSD device; preventing first operations from being performed by the HSD device which cause a magnetic field to be generated, if it is determined that said human is located within the defined distance range of said HSD device; and initiating the first operations if it is determined that the human is not located within the defined distance range of the HSD device. The first operations comprise (1) interrogation operations for detecting a presence of an electronic article surveillance security tag and/or (2) deactivation operations for deactivating an electronic article surveillance security tag.
US09711303B2
A dome-shaped element disposable in a keyboard of an electronic device is provided. The dome-shaped element includes a concave surface originating at a center and terminating at a periphery. The concave surface includes an annular array of elastic elements extending from the center to the periphery. At least one of the elastic elements includes a first portion with a first slope proximate to the center and a second portion with a second slope proximate to the periphery. The concave surface is deflectable between an un-deflected position and a deflected position and is configured to affect an operation of the electronic device in the deflected position.
US09711302B2
An operating member including an actuating part movably mounted between a rest position and a switching position, a circuit board with an open contacting portion, a switching mat made of an elastic material disposed adjacent to the circuit board, and at least one contact pill formed on a side of the switching mat facing towards the circuit board, which cooperate in such a way that, in the switching position of the actuating part at the latest, the open contacting portion of the circuit board is closed by the contact pill, and where the switching mat moreover forms at least one tactile-feel dome which is associated with the contact pill, is elastically compressible by actuation of the actuating part in the direction of the switching position and which, in its initial position, defines a unilaterally open hollow volume in the switching mat, in order to cause a tactile feedback on the actuating part, where the contact pill is disposed outside the hollow volume defined by the tactile-feel dome.
US09711294B2
There are provided a tantalum capacitor having groove parts extended from a lower surface of a positive electrode terminal to an inner part of a wire connection part; and a method of manufacturing a tantalum capacitor, the method including: forming a wire connection part of a positive electrode terminal by applying pressure to a portion of a conductive metal plate upwardly from a bottom surface thereof.
US09711286B2
Prismatic polymer monolithic capacitor structure operating at temperatures exceeding 140° C. and including multiple interleaving radiation-cured polymer dielectric layers and metal layers. Method for fabrication of same. The geometry of structure is judiciously chosen to increase sheet resistance of metal electrodes while reducing the capacitor's equivalent series resistance. Metal electrode layers are provided with a thickened peripheral portion to increase strength of terminating connections and are passivated to increase corrosion resistance. Materials for polymer dielectric layers are devised to ensure that the capacitor's dissipation factor remains substantially unchanged across the whole range of operating temperatures, to procure glass transition temperature that is no less than the desired operating temperature, and to optimize the absorption of ambient moisture by the polymeric layers.
US09711279B2
A DC-DC converter assembly includes a board having a first side and a second side opposite the first side, a power stage die of a DC-DC converter attached to the first side of the board, and an output inductor electrically connected to an output of the power stage die and disposed over the power stage die on the first side of the board. The output inductor includes a magnetic core and an electrical conductor having first and second terminals attached to the first side of the board. The output inductor accommodates the power stage die under the magnetic core so that the power stage die is interposed between the magnetic core and the board. A corresponding method of manufacturing the DC-DC converter assembly and method of manufacturing the output inductor are also disclosed.
US09711275B2
A fuse box mounted on a liquid-filled transformer is disclosed. The fuse box may include one or more fuse link assemblies securing one or more fuses within a base fuse box, a fuse holder coupling the one or more fuse link assemblies within the base fuse box, wherein the one or more fuse link assemblies are pulled-up from the fuse holder by hand to remove the one or more fuse link assemblies from the base fuse box. The fuse box may include a retaining ring to fasten the fuse holder to the one or more fuse link assemblies. The fuse box may include a method for servicing a fuse box on a liquid-filled transformer.
US09711274B2
The invention provides a stationary induction apparatus excellent in core vibration damping, being capable of realizing reduction in core excitation-noise. The stationary induction apparatus according to the invention includes a core made up of plural of core-legs formed by lamination of electromagnetic steel sheets, and a core-yoke formed by lamination of electromagnetic steel sheets to join the plural core-legs together; a core-tightening clasp for tightening a joint between the core-yoke and the core-legs, in the direction of the lamination of the electromagnetic steel sheets, to be secured, a winding, a tank, and an insulating sheet disposed between the core-tightening clasp and the core-yoke. Further, a concave hollowed-out part or a notched part is provided on the insulating sheet, positioned at a joint between the core-yoke and the core-leg, and a vibration insulator is disposed in the concave hollowed-out part or the notched part.
US09711273B2
In an inductor component, fallen-off-filler marks that are formed as a result of a filler falling off from an outer surface of a component body are present in a dotted manner in portions of the outer surface that are in contact with outer electrodes. As a result of the filler falling off, a joining area at interfaces between the component body and the outer electrodes increases, and stress generated at the interfaces between the component body and the outer electrodes is reduced.
US09711272B2
Printed circuit includes a substrate body having a plurality of substrate layers stacked along a Z-axis. Each substrate layer is substantially planar and extends along an XY plane. The X-, Y-, and Z-axes are mutually perpendicular. The printed circuit also includes a Z-field coil that is coupled to the substrate body and has a conductive trace that is parallel to the XY plane. The printed circuit also includes an X-field coil having conductive trace segments that are coupled to the substrate body and parallel to the XY plane. The X-field coil includes conductive paths that extend substantially parallel to the Z-axis. The conductive paths interconnect the trace segments. The Z-field coil and the X-field coil are configured to generate respective vector components of a magnetic field or have a voltage induced therein by a magnetic field.
US09711269B2
A torque motor actuator includes a first magnetic pole piece, a second magnetic pole piece, an armature, and an armature stop. The second magnetic pole piece is spaced apart from the first magnetic pole piece to define an armature gap. The armature is disposed in the armature gap and is spaced apart from the first and second magnetic pole pieces. The armature includes a magnetically permeable material and has a central portion, a first arm, and a second arm. The armature is rotationally mounted at the central portion, and the first and second arms extend, in opposite directions, from the central portion. The armature stop extends from the first arm, and comprises a non-magnetic material. The armature stop is configured, upon rotation of the armature, to selectively engage one of the first or second magnetic pole pieces to thereby limit armature rotation.
US09711263B2
A method comprising: providing a transparent electrically conductive film comprising: a transparent substrate (14); a composite layer (18) comprising: an electrically conductive layer disposed on at least a portion of a major surface of the transparent substrate (14) and comprising a plurality of interconnecting metallic nanowires (12); and a polymeric overcoat layer disposed on a portion of the electrically conductive layer, to provide a coated area of the electrically conductive layer; and patternwise exposing the coated area of the electrically conductive layer to a corona discharge to provide a patternwise exposed electrically conductive film comprising (1) an un exposed region (122) of the coated region having a first electrical resistivity, and (2) an exposed region (121) having a second electrical resistivity; wherein the exposed region is less electrically conductive than the unexposed region, and wherein there is a ratio of the second electrical resistivity over the first electrical resistivity of at least 1000:1.
US09711262B2
A compound superconducting wire 10 includes a reinforcement portion 12 and a compound superconductor 11. In the reinforcement portion 12, an assembly of plural reinforcement elements 4 are disposed. The reinforcement elements 4 each include plural reinforcement filaments 1 disposed in a stabilizer 2, and a stabilizing layer 3 at the outer periphery thereof. The reinforcement filaments 1 each mainly contain one or more metals selected from the group consisting of Nb, Ta, V, W, Mo, Fe, and Hf, an alloy consisting of two or more metals selected from the aforementioned group, or an alloy consisting of copper and one or more metals selected from the aforementioned group.
US09711252B1
A coherent beam treatment system produces a first and second energy beam that are coherent at a treatment location. An energy beam includes a neutron beam, a proton beam, an electron beam, acoustic waves, a laser and x-ray. An energy beam may be defined by a wave, such as a sinusoidal wave having a frequency and amplitude. A control system may produce a first and second beam that have coherence at a treatment location. Coherence is a location where two beams have matching wave profiles. A beam may be defined by a simple sinusoidal equation wherein the frequency and amplitude are constant as a function of time. A beam may be defined by a complex wave equation, wherein the frequency or amplitude change as a function of time. A control system may modulate one or more of the beam equations to change a location of coherence.
US09711241B2
Embodiments contained in the disclosure provide a method for memory built-in self-testing (MBIST). The method begins when a testing program is loaded, which may be from an MBIST controller. Once the testing program is loaded MBIST testing begins. During testing, memory failures are determined and written to a failure indicator register. The writing to the failure indicator register occurs in parallel with the ongoing MBIST testing. An apparatus is also provided. The apparatus includes a memory data read/write block, a memory register, a memory addressor, and a memory read/write controller. The apparatus communicates with the memories under test through a memory address and data bus.
US09711239B2
A single-ended receiver includes an internal voltage generation circuit to set a first internal reference voltage (Vref). A model voltage generation circuit is configurable to receive an external reference voltage to be calibrated during an initial calibration. The model voltage generation circuit is configurable to track an offset value for voltage-temperature (VT) drift and the offset value is applied to the internal voltage generation circuit to calibrate the internal Vref during a periodic calibration of the single-ended receiver.
US09711235B2
A nonvolatile memory device includes a voltage generating circuit configured to generate voltages applied to word lines corresponding to a selected memory block among memory blocks. The voltage generating circuit includes voltage source lines having linear voltages, a first voltage generating unit configured to generate a first voltage and apply the generated first voltage to a first voltage source line among the voltage source lines, a second voltage generating unit configured to generate a second voltage and apply the generated second voltage to a second voltage source line among the voltage source lines, and a linear voltage generator having a resistor string connected between the first voltage source line and the second voltage source line. At least one of the voltage source lines has a voltage distributed between the first voltage and the second voltage.
US09711229B1
Systems and methods for performing a partial block erase operation on a portion of a memory array are described. The memory array may include a plurality of vertical NAND strings in which a first set of the plurality of vertical NAND strings are connected to a first drain-side select line, a second set of the plurality of vertical NAND strings are connected to a second drain-side select line, and both the first set and the second set of vertical NAND strings are connected to one or more shared word lines. In cases where a first vertical NAND string of the first set and a second vertical NAND string of the second set are both connected to selected bit lines and the same shared word line, selectivity of memory cells may be provided by applying different voltages to the first drain-side select line and the second drain-side select line.
US09711225B2
A non-volatile memory system utilizes multiple programming cycles to write units of data, such as a logical page of data, to a non-volatile memory array. User data is evaluated before writing to determine whether programming can be skipped for bay addresses. The system determines whether programming can be skipped for an initial set of bay groups. If a bay group cannot be skipped, the system determines whether the bay group includes individual bays that may be skipped. Bays are regrouped into new bay groups to reduce the number of BAD cycles during programming. Independent column addressing for multiple bays within a bay group is provided. During a column address cycle, a separate column address is provided to the bays to select different columns for programming within each bay. By simultaneously programming multiple column addresses during a single column address cycle, the system may skip programming for some column address cycles.
US09711222B2
A content addressable memory cell is provided that includes plurality of transistors having a minimum feature size F, and a plurality of memory elements coupled to the plurality of transistors. The content addressable memory cell occupies an area of between 18F2 and 36F2.
US09711221B1
A computer memory provides for range-matching capabilities using a hybrid combination of transistors and multiple resistive memory devices serving in a dual capacity as storage and logic. The result is an extremely compact, nonvolatile range-matching, content addressable memory.
US09711220B2
Disclosed is a content addressable memory (CAM). The content addressable memory array includes a memory array and a data match module. The memory array includes multiple memory rows. Each memory row is configured to store a first data word and a second data word. The data match module includes a first match circuitry configured to compare a first match word to the first data word of a memory row, and to generate a first match output based on the comparison between the first match word and the first data word of the memory row. The data match module further includes a second match circuitry configured to compare a second match word to the second data word of the memory row, and to generate a second match output based on the comparison between the second match word and the second data word of the memory row.
US09711217B1
A memory device and an operating method for a resistive memory cell are provided. The memory device includes the resistive memory cell. The resistive memory cell includes a first electrode, a second electrode and a memory film between the first electrode and the second electrode. The first electrode includes a bottom electrode portion and a sidewall electrode portion extending upwardly from the bottom electrode portion and between the memory film and the bottom electrode portion. A width of the sidewall electrode portion and a width of the memory film are smaller than a width of the bottom electrode portion.
US09711207B2
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array an array of memory cells via a sense line. The sensing circuitry is configured to sense, as a voltage associated with a second operand of a logical function, a voltage on the sense line corresponding to a first logical data value resulting in part from reading a first memory cell of the array of memory cells associated with a first operand of the logical function.
US09711206B2
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array of memory cells. The sensing circuitry includes a primary latch and a secondary latch. The primary latch is coupled to a pair of complementary sense lines and selectively coupled to a pair of adjacent complementary sense lines. The secondary latch is selectively coupled to the primary latch. The primary latch and secondary latch are configured to shift a data value between the pair of adjacent complementary sense lines and the primary latch. The primary latch and secondary latch are configured to shift the data value from the pair of adjacent complementary sense lines without activating a row line.
US09711205B2
A use time managing method of a semiconductor device may include (1) measuring an amount of accumulated operation time of the semiconductor device and when the amount is reached to a predetermined value, generating a unit storage activation signal; (2) repeating step (1) to generate one or more additional unit storage activation signals, thereby generating a plurality of unit storage activation signals, wherein the predetermined values are different for each repeating step; (3) storing data indicating each occurrence of generating the unit storage activation signals; and (4) detecting use time of the semiconductor device based on the cumulatively stored data.
US09711202B2
This technology provides an electronic device. An electronic device in accordance with an implementation of this document may include a semiconductor memory, and the semiconductor memory may include: an under layer including a plurality of material layers having a different crystal structures; a first magnetic layer formed over the under layer and having a variable magnetization direction; a tunnel barrier layer formed over the first magnetic layer; and a second magnetic layer formed over the tunnel barrier layer and having a pinned magnetization direction.
US09711178B2
Local timeline editing for online content editing is disclosed. Various systems and methods described herein provide for online content editing, wherein user-created content is created or modified at an online content editor server in accordance with a timeline (associated with the user-created content) that is modified at a remote content editor client and subsequently received by the online content editor server. In a specific implementation, the creation and modification operations performed on the user-created content are performed at the online content editor server in accordance with the timeline received from the remote content editor client. The timeline can comprise information defining content within the user-created content, and define a temporal property of the content within the user-created content. The remote content editor client can be a thin client instance utilizing limited resources during operation and requiring very limited network bandwidth when transferred to the client.
US09711162B2
A method of environmental noise compensation a speech audio signal is provided that includes estimating a fast audio energy level and a slow audio energy level in an audio environment, wherein the speech audio signal is not part of the audio environment, and applying a gain to the speech audio signal to generate an environment compensated speech audio signal, wherein the gain is updated based on the estimated slow audio energy level when the estimated fast audio energy level is not indicative of an audio event in the audio environment and the estimated gain is not updated when the estimated fast audio energy level is indicative an audio event in the audio environment.
US09711159B2
An apparatus and a method for integrally encoding and decoding a speech signal and a audio signal. The encoding apparatus may include: an input signal analyzer to analyze a characteristic of an input signal; a first conversion encoder to convert the input signal to a frequency domain signal, and to encode the input signal when the input signal is a audio characteristic signal; a Linear Predictive Coding (LPC) encoder to perform LPC encoding of the input signal when the input signal is a speech characteristic signal; a frequency band expander with the spectral band replication (SBR) standard for expanding the frequency band of the input signal whose output is transmitted to either the first conversion encoder or the LPC encoder based on the input characteristic; and a bitstream generator to generate a bitstream using an output signal of the first conversion encoder and an output signal of the LPC encoder.
US09711157B2
An encoder for providing an audio stream on the basis of a transform-domain representation of an input audio signal includes a quantization error calculator configured to determine a multi-band quantization error over a plurality of frequency bands of the input audio signal for which separate band gain information is available. The encoder also includes an audio stream provider for providing the audio stream such that the audio stream includes information describing an audio content of the frequency bands and information describing the multi-band quantization error.A decoder for providing a decoded representation of an audio signal on the basis of an encoded audio stream representing spectral components of frequency bands of the audio signal includes a noise filler for introducing noise into spectral components of a plurality of frequency bands to which separate frequency band gain information is associated on the basis of a common multi-band noise intensity value.
US09711146B1
A user may speak an audio input into a microphone of a recorder device (e.g., a sport helmet). The user device then transmits the audio input to a receiver. The receiver, upon receiving the audio input, routes the audio to a processor that processes the audio input to detect a spoken activation code. The processor then parses a subset of the audio input (e.g., the subset including one or more words) following the activation code and generates textual data based the parsed audio subset. The textual data may optionally be edited to replace one or more pre-identified catchphrases (e.g., swearwords or product names) with replacement phrases (e.g., swear censors) or hyperlinks (e.g., leading to product websites). The textual data is then transmitted to reader devices via transmitters, which may optionally transmit the textual data to a selective group of reader devices (e.g., stadium attendees).
US09711144B2
At a microphone, voice activity is detected in a data stream while simultaneously buffering audio data from the data stream to create buffered data. A signal is sent to a host indicating the positive detection of voice activity in the data stream. When an external clock signal is received from the host, the internal operation of the microphone is synchronized with the external clock signal. Buffered data stream is selectively sent through a first path, the first path including a buffer having a buffer delay time representing the time the first data stream takes to move through the buffer. The data stream is continuously sent through a second path as a real-time data stream, the second path not including the buffer, the real-time data stream beginning with the extended buffer data at a given instant in time. The buffered data stream and the real-time data stream are multiplexed onto a single data line and transmitting the multiplexed data stream to the host.
US09711132B1
The present disclosure relates to an acoustic lens using a Fresnel zone plate, a design method and a manufacturing method of the acoustic lens, a focusing ultrasonic transducer to which the acoustic lens is applied, and a manufacturing method of the focusing ultrasonic transducer. More specifically, an acoustic lens using a Fresnel zone plate which is applied to a focusing ultrasonic transducer. The acoustic lens includes a plurality of concentric regions which is concentrically disposed with respect to a center point. In the concentric region, a sound insulation region which blocks an entering sound wave and a transmission region which transmits the sound wave are alternately formed in a radial direction from the center point, and the entering sound wave is focused near a focal point.
US09711130B2
A personal audio device, such as a wireless telephone, includes an adaptive noise canceling (ANC) circuit that adaptively generates an anti-noise signal from a reference microphone signal that measures the ambient audio and an error microphone signal that measures the output of an output transducer plus any ambient audio at that location and injects the anti-noise signal at the transducer output to cause cancellation of ambient audio sounds. A processing circuit uses the reference and error microphone to generate the anti-noise signal, which can be generated by an adaptive filter operating at a multiple of the ANC coefficient update rate. Downlink audio can be combined with the high data rate anti-noise signal by interpolation. High-pass filters in the control paths reduce DC offset in the ANC circuits, and ANC coefficient adaptation can be halted when downlink audio is not detected.
US09711117B2
Disclosed are music symbol recognition apparatuses and methods that recognise music symbols from handwritten music notations. Various implementations may process handwritten music notations by segmenting the handwritten music notations into a plurality of elementary ink segments and then grouping the segments into graphical objects based on spatial relationships between the segments. One or more candidate music symbols may be determined for each graphical object, along with a symbol cost for each symbol, which represents a likelihood that the graphical object belongs to a predetermined class of symbols. The music symbol candidates may be parsed to form graphs based on grammar rules, and the graph most likely to represent the handwritten music notations may be selected for display or other use. The selection may be based on the symbol costs associated with each candidate and on spatial costs associated with the grammar rules that are applied to the candidates.
US09711115B2
The present invention is directed to a capo for use with a stringed musical instrument and which is engaged from the bottom portion of the neck of the musical instrument. The capo has a generally L-shaped frame connected to a lever and a pincher configured so that pressure applied to the lever causes the pincher to move toward the lever, allowing the space between the pincher and free end portion of the frame to receive the neck of the musical instrument. The exterior of the frame is configured to received interchangeable inlays, and the free end portion of the frame is configured to receive changeable neck pads.
US09711110B2
A dark portion in an image seen by a viewer is expressed more precisely, whereby the image given a greater sense of depth is displayed. A display device in which pixels each include a light-emitting module capable of emitting light having a spectral line half-width of less than or equal to 60 nm in a response time of less than or equal to 100 μs and are provided at a resolution of higher than or equal to 80 ppi; the NTSC ratio is higher than or equal to 80%; and the contrast ratio is higher than or equal to 500, is provided with a circuit converting an image signal having a given grayscale into an image signal capable of representing an image on the low luminance side by high-level grayscale.
US09711109B2
A data processing apparatus includes a compressor and an output interface. The compressor generates a compressed display data by compressing a display data according to a compression algorithm. The output interface appends first indication information in a first output bitstream, appends second indication information in a second output bitstream, and outputs the first output bitstream and the second output bitstream via a display interface. The first output bitstream is derived from the compressed display data. The first indication information is set in response to the compression algorithm employed by the compressor. The first indication information is different from the second indication information. The display interface is arranged for coupling to a driver circuit.
US09711106B1
The present invention provides a display method and a display system, which belong to the field of display technology and solve a problem of large power consumption in the case of light-load images in existing display methods. The display method includes steps of: detecting, when a frame of image is displayed, a variation degree of data voltages on respective data lines; determining, according to the detection result, a load size of the displayed image; and adjusting, according to the determination result, an operating frequency of a charge pump, and outputting, by the charge pump, a voltage corresponding to the operating frequency to a gate driving unit, so that a gate driving voltage is provided to a gate line by the gate driving unit. The overall power consumption of a display system can be reduced and the performance thereof can be improved by the display method according to the present invention.
US09711104B2
A display device is provided which is capable of preventing a malfunction and carrying out a common reverse drive without increasing electric power consumption. The display driver (a) supplies a voltage of a common electrode, whose a polarity is determined in accordance with (i) an oscillation circuit output signal (OCOUT) which is transmitted via a first wire different from a second wire used during a serial transmission and (ii) a SCS signal and (b) controls a reverse timing of the polarity of the voltage of the common electrode in accordance with the oscillation circuit output signal (OCOUT) and the SCS signal.
US09711103B2
Disclosed is a display apparatus including: a display panel including pixels connected with a plurality of gate lines and a plurality of data lines; a gate driver supplying gate signals to the gate lines; and a data driver supplying data voltages to the data lines. The data driver includes a temperature measurer generating a temperature signal of the data driver.
US09711100B2
A common voltage distortion detecting circuit includes a current sensor, a voltage difference voltage detecting circuit and a comparator. The current sensor is disposed between a circuit configured to apply a common voltage to a liquid crystal display panel and an input power terminal providing a power voltage. The voltage difference detecting circuit is configured to detect a difference voltage between two terminals of the current sensor. The comparator is configured to compare the difference voltage and a reference voltage to output an over current signal to convert an inversion method of the liquid crystal display panel when the difference voltage is greater than the reference voltage.
US09711091B2
The present disclosure discloses a 3D display method and a display device, relates to the field of display technologies, and can improve the 3D display effects of a Vertical Alignment (VA) liquid crystal display. The 3D display method comprises the steps of: acquiring effective grayscale of an image to be displayed; acquiring compensation data for brightness of the image to be displayed based on the effective grayscale thereof; and driving, during display of the image, a backlight source based on the compensation data for brightness, so as to compensate for brightness of the image to be displayed. The 3D display method is especially suitable for a VA display device. The present disclosure can be used in a display device, such as a liquid crystal television, a liquid crystal display, a mobile phone, a tablet personal computer, etc.
US09711089B2
A scan driving circuit, including a multi-stage shift register unit that outputs scan signals by stage under control of a clock signal (CKR, CKBR), the shift register unit includes an output terminal for outputting the scan signals, the scan driving circuit further includes a multi-stage signal generating unit, with an n-th stage signal generating unit is connected respectively to an output terminal of an n-th stage shift register unit and an output terminal of an (n+j)-th stage shift register unit, the n-th stage signal generating unit is configured to convert an outputted first level into a second level under triggering of a scan signal outputted by the n-th stage shift register unit, and convert an outputted second level into a first level under triggering of a scan signal outputted by the (n+j)-th stage shift register unit; the n and j both are positive integers.
US09711086B2
A display device having at least a plurality of pixel circuits, connected to signal lines to which data signals in accordance with luminance information are supplied, arranged in a matrix, wherein pixel circuits of odd number columns and even number columns adjacent sandwiching an axis in a column direction parallel to an arrangement direction of the signal lines have a mirror type circuit arrangement symmetric about the axis of the column direction, and there are lines different from the signal lines between signal lines of adjacent pixel circuits.
US09711085B2
Disclosed are a pixel circuit, an organic light emitting display panel and a display apparatus. The pixel circuit comprises a light emitting device (01), a charging module (02), a driving module (03), and a testing module (04) having a control terminal connected to a test signal terminal (TEST) for providing a test signal switching between a displaying period of time and a testing period of time, a second input terminal (a2) connected to an output terminal of the light emitting device (01), and a third output terminal (b3) connected to a second reference signal terminal (Ref2). Through the pixel circuit, a current signal for driving the light emitting device (01) to emit light can reach the uniformity standard so that display luminance of pixels is uniform and quality of a display picture is ensured.
US09711083B2
A display apparatus includes a plurality of sub-pixel groups. At least one of the sub-pixel groups includes a plurality of first sub-pixels to emit a first color of light, a plurality of second sub-pixels to emit a second color of light, and a dummy pixel between the first sub-pixels and the second sub-pixels. A first dummy driving transistor is connectable to one of the first sub-pixels and a second dummy driving transistor is connectable to one of the second sub-pixels.
US09711082B2
A display apparatus includes: a pixel array including pixel circuits arranged in a matrix form, in which each pixel circuit has a light-emitting device, a drive transistor applying a current corresponding to a gate-source voltage to the light-emitting device, a sampling transistor inputting a voltage supplied from a signal line to a gate of the drive transistor, and a storage capacitor connected between the gate and source of the drive transistor so as to store a threshold voltage of the drive transistor and an input video signal voltage; a signal selector that supplies a reference voltage and the video signal voltage to signal lines arranged in columns on the pixel array in horizontal periods corresponding to the number of horizontal lines in one unit when the horizontal lines of the respective pixel circuits of the pixel array are grouped as one unit; and a scanner that applies a pulse to control lines arranged in rows on the pixel array so as to control the sampling transistor of the pixel circuit.
US09711079B2
A shift register includes a first voltage stabilizing unit, a second voltage stabilizing unit, a main pull-down unit and a main pull-up unit. The first voltage stabilizing unit is used to pull a first driving control signal to a low voltage terminal when a first stabilizing control signal is high. The second voltage stabilizing unit is used to pull the first driving control signal to the low voltage terminal when a second stabilizing control signal is high. The main pull-down unit includes a first sub-pull-down unit controlled by a second gate-terminal signal for pulling down the first driving control signal to the low voltage terminal during a first display mode, and a second sub-pull-down unit controlled by a third gate-terminal signal for pulling down the first driving control signal to the low voltage terminal during a second display mode. The main pull-up unit is used for pulling up a first gate-terminal signal.
US09711076B2
A display device can include a display panel having first and second panel blocks, a switching element that selectively connects a first data line formed in the first panel block and a second data line formed in the second panel block, a gate driver that feeds a gate pulse to gate lines formed in the first and second panel blocks, a first data driver that feeds a data voltage to the first data line, a second data driver that feeds a data voltage to the second data line, and a dimming-proof part that controls the operation timing of the switching element.
US09711067B2
This invention is directed to a modular staged simulator and a process of simulating medical trauma and maladies for the purpose of training or certifying individuals including medical professionals. More specifically, this disclosure relates to ex vivo training exercises as opposed to traditional forms of training using intact cadavers, in vivo surgery on animal subjects; and supervised apprenticeship performing surgery on human subjects with trauma or maladies under the watch of a skilled medical practitioner.
US09711064B2
Disclosed are systems, methods, and products for language learning that automatically extracts keywords from resources using various natural-language processing product features, which can be combined with custom-designed learning activities to offer a needs-based, adaptive learning methodology. The system may receive resources having text and then determine a text difficulty score that predicts how difficult the resource is for language learners based on any number of factors, including any number of semantic and syntactic features of the text. Training resources labeled with metadata may be used to train a statistical model for determining difficulty scores of newly received text. Resources may be grouped based on difficulty score, and groups of resources may correspond to language learners' proficiency levels.
US09711063B2
The present invention is directed to methods and devices for teaching the proper configuration of the oral articulators, particularly the tongue, corresponding to particular speech sounds by providing intraoral tactile feedback. Intraoral tactile feedback is achieved by placing nodes in the oral cavity of the patient in locations corresponding to the proper lingual position required to produce a target sound. These nodes facilitate identification of the appropriate lingual position corresponding to a target speech sound by providing tactile differentiation when the target sound is properly produced.
US09711059B2
A motion platform device for flight simulation comprises: a base frame, a moving platform, which is spaced apart from said base frame and which has a user position surface opposing to the base frame, and a number of mounts connected to the base frame and connected with the moving platform, wherein the mounts are adapted to allow a relative movement of the user position surface, especially pivoting around a central point in three directions. The user is lying on the surface and actuates the flying movement through lateral inner wings and/or lateral outer wings.
US09711057B2
A question setting apparatus is disclosed, including a processor and a storage part. The storage stores problem information which maintains problem data including a problem and a correct answer of the problem included in a test sent to students, and student answer information which maintains answer data and a correct/incorrect answer determination result for each of the students. The processor processes test operations of referring to the problem information, sending the problem data to the student terminals, receiving the answer data from the student terminals in a given time for the test, and recording the answer data in the student answer information. The processor processes a progress display. A progress state is displayed in the given time and indicates an answer state of the problem data based on the correct/incorrect answer determination result. A display instruction is sent to the student terminals to stop the test.
US09711056B1
A personal emotion-based cognitive assistant system includes one or more components which may be worn by a user as a headset, one or more sensors that capture an emotional state of the user, a processor that identifies personal meaning of an environment of the user based on the captured emotional state, and a memory that stores the identified personalized meaning with data about the environment in different areas of the memory based on the identified personal meaning.
US09711051B2
A method for determining a positioning of a subject motor vehicle in a traffic lane of a highway is provided, including: acquiring a number of traffic lanes of the highway; acquiring an image of the highway showing at least a lateral part of the highway; acquiring a datum relating to a direction of travel of the subject motor vehicle on the highway; receiving by the subject motor vehicle one message from another motor vehicle, the message including a first information item relating to a positioning of the other motor vehicle, and a second information item relating to a direction of travel of the other motor vehicle; and deducting the positioning of the subject motor vehicle in one of the traffic lanes, as a function of the number of traffic lanes, the datum, the acquired image, the first and second information item.
US09711050B2
A smart vehicle can be operated by generating a 3D model of a sensor's field of view; receiving information from neighboring vehicles to compensate for blindspots in the sensor's field of view and in a driver's field of view; receiving traffic information, weather information; adjusting one or more characteristics of the plurality of 3D models based on the received traffic and weather information and blindspot information; aggregating the plurality of 3D models to generate a comprehensive 3D model; and combining the comprehensive 3D model with detailed map information; and using the combined comprehensive 3D model with detailed map information to maneuver the vehicle.
US09711048B1
A wireless transmission system includes a server to receive a unique identifier associated with a parking space from a first receiving device. The server then generate an instruction to query a type of the unique identifier and transmit the instruction to the database. The server in response to determining that a parking space is occupied by the first receiving device, generate an instruction to modify a record within the database associated with the parking space as occupied. The server receive a query from a second receiving device about the availability of parking spaces, and generate an instruction to receive one or more unoccupied parking spaces. The server generates a graphical user interface including a census data where the census data may include the occupied parking spaces, unoccupied parking spaces, and number of occupants within the automobile. The server transmit the graphical user interface to the second receiving device.
US09711043B2
An infrared signal generator with an interface for receiving an encoded infrared command; and protocol generation circuitry for generating a bitstream that comprises one or more data words that comprise data to be transmitted and one or more protocol words that describe symbols of an infrared protocol is presented. Optionally, the protocol generation circuitry comprises a first circuit for generating a data word and a second circuit for generating a protocol word. Optionally, the infrared signal generator comprises a carrier frequency generator which is selectively combined with the output of either the first circuit or the second circuit to provide a drive signal for an infrared transmitter.
US09711042B2
Disclosed are methods and devices for controlling pieces of equipment by sound pulses, which include operations and means for determining characteristics of a vector defined by two sound pulses received by at least two receivers. In various implementations, the characteristics may comprise at least the direction and possibly also the sense and the norm of the vector, and these sound pulses may be generated in a zone defined relative to the receivers. The methods and devices may also include operations and means for controlling a piece of equipment where the command applied to the equipment may be determined at least by the direction of the vector.
US09711038B1
A wireless sensor network including a number of wireless modules for monitoring sensors associated with stationary assets. A wireless module includes a wireless transceiver, a processor, a location acquisition unit, configured to acquire a location item identifying a location of the wireless module, and a memory.
US09711033B2
A mobile cart that holds a bag for receiving solid waste generated during a medical or surgical procedure. The cart includes a sensor that monitors whether or not an object containing metal is placed in the bag. A processor monitors the signal output by the sensor. If the sensor signal indicates that an object with a minimal amount of metal is placed in the bag, the processor momentarily asserts an audible alarm and continuously asserts a light alarm. The light alarm remains asserted until turned off. If, while the light alarm is on, the sensor signal indicates a second object with the minimal amount of waste is placed in the container, the processor again momentarily asserts the audible alarm. This provides notice that it may be necessary to investigate the contents of the bag to determine if not one but two or more objects were inadvertently discarded.
US09711032B1
An electrical device, processes for using and making the device, and products produced thereby. There can be an alarm device and an extension which includes a protrusion. The extension can have wiring, and the alarm device can detect for a change in electricity running through the wiring, such as a change that would occur when the electricity is interrupted when the wiring is cut. The protrusion is located adjacent to the extension, distant from the alarm device, and can include a key, switch, connector, or the like. The protrusion, in some cases, can be releasably connectable to a housing that is in turn connected to the extension, so as to form a loop in which an item can be secured for protection, e.g., from theft.
US09711029B2
A system comprises a patient bed having a reader to read wireless signals. In some embodiments a wound dressing has a transmitter that transmits wireless signals to the reader of the patient bed. In other embodiments, a garment has a transmitter that transmits wireless signals to the reader of the patient bed. In still further embodiments, other medical equipment has a transmitter that transmits wireless signals to the reader of the patient bed.
US09711027B2
Embodiments include method, systems and computer program products for suggesting adjustments to an adjustable helmet based on analysis of play. Aspects include monitoring a plurality of sensors in the adjustable helmet and performing an analysis of play for a user of the adjustable helmet based on data received from the plurality of sensors. Aspects also include determining if an adjustment to the adjustable helmet should be made based on the analysis of play and creating an alert indicating that an adjustment to the helmet is needed.
US09711023B2
Some embodiments are directed to a lockdown apparatus for facilitating initiation of lockdown procedures at a facility. The lockdown apparatus can include an actuator configured to transmit a lockdown initiation signal upon being actuated. The actuator can be configured to be recognizably distinguishable from a fire alarm actuator. The lockdown apparatus can also include a lockdown communicator configured to produce a lockdown communication for communicating initiation of lockdown procedures to the facility occupants and individuals not disposed proximate the facility upon transmission of the lockdown initiation signal, the lockdown communication being recognizably distinguishable from the fire alarm communication.
US09711022B2
Some embodiments are directed to a lockdown apparatus for facilitating initiation of lockdown procedures at a facility. The lockdown apparatus can include an actuator configured to transmit a lockdown initiation signal upon being actuated. The actuator can be configured to be recognizably distinguishable from a fire alarm actuator. The lockdown apparatus can also include a lockdown communicator configured to produce a lockdown communication for communicating initiation of lockdown procedures to the facility occupants and individuals not disposed proximate the facility upon transmission of the lockdown initiation signal, the lockdown communication being recognizably distinguishable from the fire alarm communication.
US09711011B2
Embodiments of the present invention are directed to the use of game modifiers that are triggered in a first game and are used in game stages in a subsequent second game. According to some embodiments, a gaming device is configured to play a multi-stage game of chance. After each stage is completed in a first game, it is determined whether any of the game stages have triggered modifications of one or more game modifiers that are used in one or more corresponding game stages in a subsequently played game. The altered game modifiers may modify prizes associated with an incremented one of the game stages in the subsequent game so that the altered modifiers move between game stages in multiple games.
US09711010B2
In various embodiments, a system and a method of implementing bad beat insurance are disclosed. After a stage of a portion of a game is played, it is determined that a player is favored to win the portion of the game. After the portion of the game is completed, it is determined that the player has suffered a bad beat. The player is compensated at least partially for a loss that the player incurred as a consequence of suffering the bad beat.
US09711008B2
A game system executes a game for a plurality of users to participate in. A role assigning unit assigns a role in a game to a user. An evaluation unit evaluates a game play of the user in the game, based on an evaluation criterion that is set based on a role assigned to the user by the assigning unit. A limiting unit limits a number of users, other than the user, who are able to participate in the game, based on an evaluation result by the evaluation unit on a game play of the user in a game in the past.
US09710992B2
An automatic product dispensing machine comprises: a frame (2) delimiting at least a housing chamber (3); a magazine (4) arranged internally of the housing chamber (3), for containing a series of products (5); at least a display (8) interposed between the housing chamber (3) and the external environment; a control unit (9) active on the display (8) and configured such as to enable visualizing images and/or information. The control unit (9) is further configured such as to switch the display (8) between at least two of the following three operative conditions: a visualizing condition, in which it reproduces at least a datum and/or image that is externally visible, a condition of transparency, in which at least a product (5) contained in the magazine (4) is viewable via the display (8) and a superposing condition, in which at least a product (5) is viewable via the display (8) and at least a datum and/or image and/or film relating to the product is reproduced on the display.
US09710973B2
A system that includes a head mounted display device and a processing unit connected to the head mounted display device is used to fuse virtual content into real content. In one embodiment, the processing unit is in communication with a hub computing device. The processing unit and hub may collaboratively determine a map of the mixed reality environment. Further, state data may be extrapolated to predict a field of view for a user in the future at a time when the mixed reality is to be displayed to the user. This extrapolation can remove latency from the system.
US09710963B2
A primitive fitting apparatus is provided. The primitive fitting apparatus may include a selecting unit to receive, from a user, a selection of points used to fit a primitive a user desires to fit from a point cloud, an identifying unit to receive a selection of the primitive from the user and to identify the selected primitive, and a fitting unit to fit the primitive to correspond to the points, using the points and primitive.
US09710959B2
Techniques are disclosed for providing compressed three-dimensional (3D) graphics rendering exploiting psychovisual properties of the human eye. In some embodiments, the techniques can be used to render one red-green-blue (RGB) channel per pixel location. In some example such cases, green pixels are rendered at one-half resolution, whereas red and blue pixels are rendered at one-quarter resolution. In some other embodiments, multiple RGB channels can be rendered at a given pixel location. In some example such cases, green pixels are rendered at full (e.g., actual) resolution, whereas red and blue pixels are rendered at one-quarter resolution. Missing RGB channel components can be interpolated using statistical and/or frequency domain properties of color spectra, in accordance with some embodiments. The techniques can be used, for example, to improve the power efficiency and/or rendered graphics quality of a graphics processing unit (GPU) or other rendering engine, in accordance with some embodiments.
US09710953B2
As a data analysis apparatus that can easily and intuitively identify fine particles and small fine particle populations to be analyzed in a distribution graph and that can obtain accurate statistical data regarding these, a 3D data analysis apparatus is provided that includes a data storage unit which saves measurement data regarding fine particles, an input unit which selects independent three types of variables from the measurement data, a data processing unit which calculates positions and figures in a coordinate space whose coordinate axes are the three types of variables and which creates a 3D stereoscopic image representing characteristic distribution of the fine particles, and a display unit which displays the 3D stereoscopic image and that displays, in the 3D stereoscopic image, the figures in each region of the coordinate space divided into a plurality of regions by a plane in a different color in each region.
US09710952B2
Systems, methods, and non-transitory computer-readable media can detect a trigger to initiate at least one of a pixelation animation or a depixelation animation for a media content item. A set of pixelated images can be generated based on a source image associated with the media content item. Variable durations for presenting the set of pixelated images can be determined. The set of pixelated images can be presented, based on the variable durations, to produce the at least one of the pixelation animation or the depixelation animation.
US09710933B2
Provided is a method of processing a texture. The method includes acquiring texture position information in a texture image corresponding to pixel position information of pixels constituting a frame, acquiring texture classification information (TCI) representing a similarity between respective texture factors of two or more classified regions in the texture image based on the texture position information, determining an amount of texture data requested from a memory according to the TCI, and reading texture data corresponding to the determined amount of texture data based on the texture position information.
US09710919B2
A method of image-tracking by using an image capturing device (12). The method comprises: performing an image-capture of a scene (54) by using an image capturing device; and tracking movement (62) of the image capturing device (12) by analyzing a set of images by using an image processing algorithm (64).
US09710918B2
A system and method for an image reconstruction user interface is provided. An imaging system may be used to scan a subject and provide reconstructed images of the subject. Reconstructed images may be output to a display, printer, network, and/or memory storage device. To view information and select options for image reconstruction, a visualization system and method is utilized.
US09710910B2
There is provided an image registration device and an image registration method. The device includes: a feature extractor configured to extract, from a first image, a first feature group and to extract, from a second image, a second feature group; a feature converter configured to convert, using a converted neural network in which a correlation between features is learned, the extracted second feature group to correspond to the extracted first feature group, to obtain a converted group; and a register configured to register the first image and the second image based on the converted group and the extracted first feature group.
US09710907B2
A diagnosis support system includes a diagnosis support computer that includes a model data acquisition unit configured to obtain a plurality of mandible model data, a contour model creation unit configured to create contour model data from the mandible model data, a contour database storage unit configured to construct a contour model database from the contour model data, a diagnosis image data receiving unit configured to receive an input of diagnosis image data of an examinee, an edge extraction unit configured to extract edge data from the diagnosis image data, a similar model searching unit configured to search contour model data based on the edge data, a position judgment unit and an image quality judgment unit configured to judge an imaging position and an image quality based on imaging information, respectively, and a diagnosis support information provision unit configured to provide diagnosis support information based on provider information.
US09710905B2
In a mask inspection apparatus, a defect detection unit includes a first memory region, a second memory region, an inspection condition reconfiguring unit, and a comparison unit. The inspection condition reconfiguring unit obtains a difference between gray scales of an optical image stored in the second memory region and a reference image stored in the first memory region. The existence of the defect is determined in the case where the difference is larger than a first threshold value. Further in the case where the number of defects is larger than a second threshold value, an inspection condition is re-estimated and configured and the reference image is regenerated. A comparison unit compares the stored reference image with the stored optical image in the case where the inspection condition is not reconfigured, and compares the regenerated reference image with the stored optical image in the case where the inspection condition is reconfigured.
US09710902B2
The present application concerns the visual identification of materials or documents for tracking or authentication purposes.It describes methods to automatically authenticate an object by comparing some object images with reference images, the object images being characterized by the fact that visual elements used for comparison are non-disturbing for the naked eye. In some described approaches it provides the operator with visible features to locate the area to be imaged. It also proposes ways for real-time implementation enabling user friendly detection using mobile devices like smart phones.
US09710892B2
An image enhancement method and an image processing apparatus thereof are provided. The image enhancement method is adapted to the image processing apparatus and includes the following steps. An input image is obtained, wherein the input image has a plurality of intensity components. The input image is corrected according to a gamma curve. The sharpness of the corrected input image is enhanced based on an edge detection operator and a weight value. An output image suitable for a display panel is obtained based on the enhanced input image.
US09710889B2
An example method for controlling the orientation of a display screen of a computing device is provided in accordance with an aspect of the present disclosure. The method includes identifying a request for a change of an orientation of a screen in a device from a first screen orientation to a second screen orientation. The request may be sent by a mobile application. The method further includes determining whether the device has an ability to rotate the screen to the second orientation, canceling the request for change of the orientation of the screen, and adjusting the resolution of the screen to emulate rotation of the screen to the second orientation while remaining in the first orientation.
US09710887B1
Disclosed is a display apparatus and a method of displaying, via the display apparatus. The display apparatus comprises at least one context display for rendering a context image, the at least one context display comprising at least one projection surface, and at least one focus image projector for rendering a focus image. An angular width of a projection of the rendered context image ranges from 40 degrees to 220 degrees. An angular width of a projection of the rendered focus image ranges from 5 degrees to 60 degrees. An arrangement is made to combine the projection of the rendered focus image with the projection of the rendered context image to create a visual scene.
US09710882B2
A data visualization technique rapidly loads images to decrease data transfer time and associated bandwidth cost for animation effects in displays of data, and includes initially loading raster imagery at a coarser zoom level than a current view on the display, and then manipulating the imagery using general-purpose image manipulation algorithms to interpolate data points as a user adjusts the zoom level. In this manner, the data visualization technique intentionally displays a coarser view than that selected, rather than transferring entirely new imagery or datasets, and manipulates the imagery as necessary to avoid loading more data from a remote server to the local client each time the user adjusts the view.
US09710881B2
In graphics processing data is received representing one or more vertices for a scene in a virtual space. Primitive assembly is performed on the vertices to compute projections of the vertices from virtual space onto a viewport of the scene in a screen space of a display device containing a plurality of pixels, the plurality of pixels being subdivided into a plurality of subsections. Scan conversion determines which pixels of the plurality of pixels are part of each primitive that has been converted to screen space coordinates. Coarse rasterization for each primitive determines which subsection or subsections the primitive overlaps. Metadata associated with the subsection a primitive overlaps determines a pixel resolution for the subsection. The metadata is used in processing pixels for the subsection to generate final pixel values for the viewport of the scene that is displayed on the display device in such a way that parts of the scene in two different subsections have different pixel resolution.
US09710880B2
A semi-automatic approach is used for user-guided bone segmentation in medical imaging. The user indicates a plurality of landmarks on an image of the bone. A processor morphs the same landmarks on a model of the bone to the user input landmarks on the image, resulting in a transform. This transform is then applied to the model to roughly segment the bone. The user may edit the resulting fit, and the processor then refines the edited fit, such as fitting the bone model to the scan data and avoiding any overlap with other bones. This user-guided segmentation may avoid the need for many samples to train a classifier for a fully automated approach while also avoiding the tedious outlining in a manual approach.
US09710875B2
An image transmission apparatus for providing a low voltage differential signaling (LVDS) data stream to a display panel is provided. The image transmission apparatus includes a transmitter and a graphic processing unit (GPU). The transmitter obtains an extended display identification data (EDID) according to an inter integrated circuit signal from the display panel. The GPU provides configuration data according to the EDID, and provides a display port (DP) data stream according to an image data. The transmitter obtains a transfer parameter according to the configuration data, and converts the DP data stream into the LVDS data stream according to the transfer parameter.
US09710874B2
One embodiment of the present invention sets forth a technique for mid-primitive execution preemption. When preemption is initiated no new instructions are issued, in-flight instructions progress to an execution unit boundary, and the execution state is unloaded from the processing pipeline. The execution units within the processing pipeline, including the coarse rasterization unit complete execution of in-flight instructions and become idle. However, rasterization of a triangle may be preempted at a coarse raster region boundary. The amount of context state to be stored is reduced because the execution units are idle. Preempting at the mid-primitive level during rasterization reduces the time from when preemption is initiated to when another process can execute because the entire triangle is not rasterized.
US09710863B2
A device and method are disclosed for optimizing self-power consumption. The device may sense one or more operating conditions of the device. The device may further select one or more operating parameters associated with at least one of the one or more operating conditions. The device may also estimate a power consumption associated with executing an algorithm to generate at least one updated value for at least one of the one or more operating parameters as well as estimate a power savings associated with operating using the updated value. The device may compare the estimated power consumption to the estimated power savings and determine whether to execute the algorithm based on the comparing.
US09710855B2
A trading screen may include a plurality of next trade quantity regions that comprise a plurality of locations, each location being associated a price on a price axis. The quantities can be entered into the various locations in the next trade quantity regions and the entered quantities can be used as a parameter of a future trade order at the associated price level. The trading screen may also include a plurality of quantity entry regions that are displayed with respect to the price axis. The quantity entry columns may each include plurality of sub-regions or locations corresponding to different price levels in the price axis. The quantity entry columns may be used to specify next traded quantities that may be used in placing orders for tradeable objects.
US09710853B2
A data processing system manages collateral risk associated with a trade of a financial instrument includes memory coupled to a processor, the memory containing a database configured to store a ruleset relating to determining eligibility of collateral to be considered for a desired trade. A collateral analysis module determines a collateral preference ranking of one or more security positions eligible for use as collateral for the trade by applying the ruleset via an algorithm executed by the processor so as to confirm an eligibility of security positions eligible for use as collateral for the trade by testing in accordance with the ruleset.
US09710849B2
A system and method for displaying items for bid at a silent auction including, a display device, having at least one display face, for exhibiting a panel having advertising indicia relating to an item offered for bid at the silent auction, and a code on the panel that corresponds to the item offered for bid, such that the code may be entered by a bidder at a remote location relative to the display device for bidding on the item. The system further including a support member for suspending the display device at a first distance from the support member, and at a second distance from a flooring surface of a venue at which the silent auction is being held; and means for removably and rotatably suspending the display device from the support member.
US09710838B2
Features to include within a predictive build of a computing system are selected. The predictive build is an anticipated final build of the computing system prior to receiving a firm customer order for the computing system in accordance with which an actual final build of the computing system is then built. A marginal cost of first building the predictive build and then modifying the predictive build to realize the actual final build, as compared to building the actual final build without first building the predictive build and then modifying predictive build to realize the actual final build, is estimated based on the features selected. Responsive to determining that the marginal cost is less than a predetermined acceptable marginal cost limit, the predictive build is built prior to receiving the firm customer order, and then is modified to realize the actual final build upon receiving the firm customer order.
US09710836B1
A system and method for tracking a weapon, wherein a server computing system tracks, analyzes, evaluates, and resources data, statistics, perceptions, and relationships for weapon transactions, storage, transporting, practice, training, holding, aiming, firing, cleaning, and/or the like.
US09710832B1
A method for facilitating a card-based bill payment service for a customer of a biller may include (1) receiving a request from the customer to initiate the card-based bill payment service; (2) collecting customer information, the customer information including at least customer account information with the biller and card account information; (3) providing the customer information to the biller over a communications network; and (4) using a computer processor, monitoring the customer's card account for biller activity. A method for facilitating a change from an existing card account to a new card account in a bill payment service for the customer of a biller may include (1) receiving a request to update card information for the bill payment service; (2) receiving the new card account information; (3) providing the existing card account information and new card account information to the biller over a communications network; and (4) using a computer processor, monitoring the customer's new card account for biller activity. A method for transferring funds from an issuer to a biller may include (1) issuing a card to a customer, the card associated with a card account; (2) receiving a invoice for a charge from the biller to the customer; (3) posting the invoice to the customer's card account; and (4) transferring funds related to the invoice to the biller by one of electronic funds transfer and check.
US09710830B1
A method and system for dynamic pricing of web services utilization. According to one embodiment, a method may include dynamically predicting utilization of a web services computing resource that is expected to occur during a given interval of time, and dependent upon the dynamically predicted utilization, setting a price associated with utilization of the web services computing resource occurring during the given interval of time. The method may further include providing the price to a customer.
US09710826B1
The present invention relates generally to a system and method of providing for the displaying of third-party multimedia advertising content and controlling the review of at least one multimedia content file using an interactive advertising application program configured for use on a mobile device. The application program is configured for scanning an encoded image framed by an interactive frame with at least one embedded hyperlink or icon within, which activates the at least one embedded hyperlink or icon, and upon activation, the at least one encoded image with an icon may be used for accessing and controlling the review of the at least one multimedia content file. However, prior to the displaying of the at least one multimedia content file, the third-party multimedia advertising content may be displayed, thereby allowing for a revenue generating for all third-party multimedia advertising content displayed.
US09710819B2
A computing system accepts audio from one or more sources, parses the audio into chunks, and transcribes the chunks in substantially real time. Some transcription is performed automatically, while other transcription is performed by humans who listen to the audio and enter the words spoken and/or the intent of the caller (such as directions given to the system). The system provides for participants a user interface that is updated in substantially real time with the transcribed text from the audio stream(s). A single audio line can be used for simple transcription, and multiple audio lines are used to provide a real-time transcript of a conference call, deposition, or the like. A pool of analysts creates, checks, and/or corrects transcription, and callers/observers can even assist in the correction process through their respective user interfaces. Ads derived from the transcript are displayed together with the text in substantially real time.
US09710812B2
A method for providing social network payments includes receiving a request to make a payment. The request is associated with a social network payer and a social network payee. It is determined that the social network payer is associated with a first payment provider identifier and an authorization token, and a second payment provider identifier for the social network payee is then retrieved using the authorization token. An instruction to make a payment from the social network payer to the social network payee is then transmitted to a payment service provider. The instruction includes a payment amount, the first payment provider identifier, and the second payment provider identifier. A payment alert is also adapted for a payee social network associated with the social network payee, and the payment alert is send to a social network provider device associated with the payee social network.
US09710811B2
A central transaction server in electronic commerce card authorization system enables the electronic commerce card association to manage and monitor the authentication system. The central transaction server acts as an intermediary for all communications between the access control server used for authentication. If any portion of the authentication system fails, the central transaction server compensates by providing appropriate responses to other portions of the system. The centralized transaction server translates all incoming traffic into a format compatible with the intended recipient, enabling portions of the system to be upgraded without breaking compatibility with the non-upgraded portions. The centralized transaction server also enables the integration of formally separate portions of the authentication system into a single unit. The directory and the authentication history servers can be integrated into the central transaction server, and the central transaction server can initiate charges to the electronic commerce card automatically, bypassing the card acquirer.
US09710808B2
Methods and systems are provided for the exchange of digital cash employing protocols for various entities to separately certify the validity of the parties, values and transactions while maintaining the anonymity of the buyer or user of the digital cash. Encrypted connections are established allowing various parties to enter into transactions to buy, sell, exchange and recover digital cash using a secure method that protects the personal information and identity of the user. The parties exchange tokens for other value in a transaction of financial settlement between themselves and wherein they are the only parties with knowledge of the amount and description of the transaction and in this way mimics a traditional cash transaction.
US09710805B2
A system including a memory storing user account information with a payment provider associated with specific merchants, and a method for use of the system are provided. The system includes one or more processors in communication with the memory and adapted to: receive login information from a user from a merchant website; access an account of the user with the payment provider; cause information for the account of the user to be displayed on the merchant website; and process a payment to the merchant from the account of the user.
US09710804B2
Provided is a method for issuing single-use and multiple-use virtual payment cards via a mobile and wearable device. The method may include receiving a card issuance request from a user, prompting the user to enter a user authentication information, accessing a user account maintained by a card issuer, generating the virtual payment card based on payment data of the user account, and providing the virtual payment card to the mobile and wearable device. The method may continue with receiving a transaction request from a merchant and matching merchant identification data provided by the user in the card issuance request and merchant identification data provide by the merchant. If the match of the merchant identification data is determined, the method may continue with authorizing a payment transaction by transferring a payment amount from the virtual payment card to a merchant account associated with the merchant.
US09710803B2
A mobile terminal is provided. The mobile terminal includes a short-range communicator, a security server and a payment method thereof, the mobile terminal including a short-range communicator which exchanges data by a predetermined short-range technology, a payment processor which performs a payment process corresponding to a preset standard in response to a user's request for payment, and a secure world which communicates with the payment processor, extracts secure information from data and stores the data therein and masks the secure information from the outside. Thus, the secure data may be masked at the time of communication with the outside.
US09710801B2
A system, method, and article of manufacture for splitting a shared financial obligation is disclosed. The method may comprise receiving, by a bill splitting computer-based system, a single record of charge (ROC) associated with a purchase by one or more members of a group, and splitting, by the bill splitting computer-based system, the ROC between the members of the group.
US09710794B2
A method assigns token requirements to service subscriptions in a service platform, such as a service platform containing entities or a database containing a plurality of said entities. The operator of the service platform establishes customization factors and maintains records reserving data services associated with token requirements for delivery to entities. In addition, customization factors are determined from values representing information associated with objects in a database. Token requirements associated with data services are calculated from one or more formulas utilizing customization factors. Sponsorships associated with the entities can be accepted by the service platform. The service platform can apply credit toward the fulfillment of token requirements. An entity can be provided a data service based on a relationship with a sponsorship such that an entity assigned a subscription having a token requirement fulfilled as a result of applying credit from a sponsorship will receive services related to the subscription.
US09710793B2
Arrangements described relate to associating a meeting room with a meeting. A meeting invitation being accessed by a first recipient can be identified, wherein the meeting invitation is sent to a plurality of recipients. A location associated with the first recipient of the meeting invitation can be identified, and whether the location associated with the first recipient is similar to a location associated with a sender of the meeting invitation can be determined. Responsive to determining that the location associated with the first recipient is not similar to the location associated with a sender of the meeting invitation, the first recipient can be prompted to reserve a meeting room at the location associated with the first recipient. Responsive to receiving from the first recipient an indication of the meeting room being reserved, an association between the meeting and the meeting room can be created.
US09710782B2
A server device includes a communication unit, a storage unit, and a control unit. The control unit is configured to perform determining whether or not the residual amount of recording material in a cartridge is equal to or less than a first threshold, and determining whether or not the estimated number of cartridges is equal to or less than a second threshold. In response to determining that the recording material is not more than the first threshold and the number of cartridges is not more than the second threshold, the control unit transmits to an external device via the communication unit an order instruction to deliver a cartridge to the user of the image forming apparatus.
US09710779B1
An order server operated by a restaurant service communicates with a restaurant server and a driver to retrieve incentive based food preparation and delivery time frames for an order. Using the time frames, the order server formulate a list of incentive based delivery plans, and provides the list to a diner device. From the diner device, the order server receives a selected incentive based delivery plan for the order from the list.
US09710777B1
Systems and methods are disclosed for processing information related to a terminal operating system. In one exemplary implantation, there is provided a method for providing information of terminal operating system management. The method may include processing information related to an input to manage the terminal operating system management. Other exemplary implementations may include processing to generate a result such that an output of a result of the managed terminal operating system management functionality is produced.
US09710772B1
Systems, methods, and computer-readable media are disclosed for determining a user's proximity to a reference location or a user's orientation in relation to an output device associated with the reference location and modifying one or more attributes of information presented to the user based on the detected proximity or orientation. The attributes that may be modified include, among other things, a size of visual information presented to the user, an intensity of audible or haptic information presented to the user, an orientation of the output device, and so forth. In addition, at least a portion of information initially presented to a user via a first output device may instead be presented to the user via a second output device based on the user's proximity to one or more reference locations, the user's orientation in relation to the first and second output devices, or attribute(s) of the user.
US09710763B2
A system for understanding and storing knowledge and plans in a speakable, formal class of languages, allowing querying and retrieving of that knowledge and plan (conversation), and of deciding and acting (volition) upon such plans is provided. The system further allows the users to input data, instructions, questions, queries, imperatives, and plans without structure or rules over and above the actual grammar of the class of languages. The system responds in words, phrases, complete sentences, or actions, as applicable, and its output is bound by the rules of logic, rather than correlation or likely meaning.
US09710759B2
In accordance with one aspect, methods and apparatus facilitate the filtering of unsolicited bulk electronic mail (email) sent from spammers. A plurality of recipient patterns for a plurality of emails from known spammers is logged. A plurality of recipient patterns for a plurality of emails from known non-spammers is also logged. A probabilistic model for predicting whether an unknown sender identity is a spammer is generated or modified based on the logged recipient patterns for the emails from known spammers and known non-spammers.
US09710758B2
In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.
US09710748B2
A circuit for performing neural network computations for a neural network comprising a plurality of neural network layers, the circuit comprising: a matrix computation unit configured to, for each of the plurality of neural network layers: receive a plurality of weight inputs and a plurality of activation inputs for the neural network layer, and generate a plurality of accumulated values based on the plurality of weight inputs and the plurality of activation inputs; and a vector computation unit communicatively coupled to the matrix computation unit and configured to, for each of the plurality of neural network layers: apply an activation function to each accumulated value generated by the matrix computation unit to generate a plurality of activated values for the neural network layer.
US09710742B2
A scannable code is used to facilitate copy and paste of content, wherein the content is serialized and encoded directly into the scannable code along with context information. When the scannable code is decoded, the content is pasted into a desired location in a manner that is consistent with the content information.
US09710736B2
A rendering apparatus of the present invention determines one of a plurality of estimation methods used for estimating a time required to render printing data, on a basis of features of a plurality of rendering objects included in the printing data, and estimates the time required to render the printing data by the determined method.
US09710733B2
Example embodiments presented herein are directed towards the implementation of a FPGA where a printing core may be dynamically reconfigured with respect to a currently used printing type. Example embodiments are also directed towards print handling, direct memory access printing, and the use of an internal FPGA timer.
US09710726B2
Disclosed is a computer implemented method for identifying a component tile within a target image. The method receives a plurality of distinct component tiles and overlays the plurality of component tiles to form an overlaid image. The overlaying is based on an embedded parameter value for each component tile. The method compares the target image with the overlayed image to determine a matching parameter value, and identifies a component tile within the target image by determining that the embedded parameter value of the component tile is the closest of the embedded parameter values to the matching parameter value.
US09710724B2
Apparatuses, methods and storage medium associated with multi-camera devices are disclosed herein. In embodiments, a multi-camera device may include 3 or more camera sensors disposed on a world facing side of the multi-camera device. Further, the multi-camera device may be configured to provide a soft shutter button at a location on an opposite side to the world facing side, coordinated with locations of the 3 or more camera sensors that reduces likelihood of blocking of one or more of the 3 or more camera sensors. Other embodiments may be disclosed or claimed.
US09710721B2
Methods are provided for automatically performing atmospheric compensation of a multi or hyper spectral image. One method comprises transforming at least two endmembers extracted from an image into at-ground reflectance. The transformation may be approximate and/or only in certain spectral bands in order to reduce processing time. A matching component is then located in a spectral library for each of the at least two extracted endmembers. Gain and offset values are then calculated using the at least two matched extracted endmember and spectral library component pairs. At least part of the image is then compensated using the calculated gain and offset values. Another method uses at least one endmember extracted from the image and a black level. Methods for atmospheric compensation using water vapor content of pixels are also provided. In addition, methods for shadow correction of hyper and multi spectral images are provided.
US09710717B1
Apparatuses, systems and methods are provided for generating data representative of vehicle operator distractions. More particularly, apparatuses, systems and methods are provided for generating data representative of vehicle operator distractions based on vehicle interior image data.
US09710703B1
A method for detecting texts included in a specific image is disclosed. The method includes steps of: (a) an apparatus detecting or allowing another device to detect one or more text candidates in the specific image by referring to feature values of pixels in the specific image; (b) the apparatus classifying or allowing another device to classify one or more weak texts in the specific image as strong texts by referring to information on at least one text classified as the strong text in another image related to the specific image if more than a certain percentage of the detected text candidates are classified as the weak texts as a result of comparison between at least one threshold value and at least one feature value of at least one pixel selected in a region where the detected text candidates are included or a value converted from the feature value.
US09710700B2
A system for activity monitoring includes a tracking component, an activity identification component, a procedural component, and a notification component. The tracking component tracks an individual and one or more objects in a work area using a three-dimensional tracking system. The activity identification component identifies an activity of the individual and any of the one or more objects that are affected by the activity. The procedural component determines whether the activity violates one or more procedural rules pertaining to one or more of the individual, the work area, and the one or more objects. The notification component provides a notification of a violation.
US09710698B2
The present invention provides a method for obtaining a human-face feature vector from a video image sequence, comprising: detecting a same human-face image in a plurality of image frames of the video sequence; dividing the detected human-face image into a plurality of local patches with a predetermined size, wherein each local patch is around or near a human-face feature point; determining a correspondence relationship between respective local patches of the same human-face image in the plurality of image frames of the video sequence; and using human-face local feature vector components extracted from respective local patches having a mutual correspondence relationship to form human-face local feature vectors representing facial points corresponding to the local patches. Besides, the present invention further provides an apparatus for obtaining a human-face feature vector from a video image sequence and a corresponding computer program product.
US09710692B2
An imaging device includes: an illumination portion which includes a light-transmitting transmission region and a light-shielding non-transmission region, has a plurality of simultaneous light-emitting elements that have a light-transmitting property, include a plurality of first light-emitting elements in which turning-on and turning-off are simultaneously controlled and a plurality of second light-emitting elements in which turning-on and turning-off are simultaneously controlled, and are provided in the transmission region, and has a plurality of individual light-emitting elements in which turning-on and turning-off are individually controlled and which are provided in the non-transmission region; an imaging portion which receives light that is reflected from a subject illuminated by the illumination portion and is transmitted through the transmission region; and a switching portion which selectively turns on the plurality of first light-emitting elements and the plurality of second light-emitting elements in a first period in which the plurality of individual light-emitting elements are turned off, and turns off the plurality of simultaneous light-emitting elements in a second period in which the plurality of individual light-emitting elements are turned on.
US09710684B2
An imaging system includes a camera having a field of view, a set of axially spaced moveable mirrors supported on a rotor to rotate the mirrors within the field of view of the camera, and a set of stationary mirrors supported to redirect the fields of view from the set of moveable mirrors to provide multiple fields of view at different angles.
US09710683B2
A control and processing system for use with an interrogator and an interrogation system employing the same. In one embodiment, the control and processing system includes a correlation subsystem having a correlator that correlates a reference code with a reply code from a radio frequency identification (RFID) tag and provides a correlation signal therefrom. The control and processing system also includes a decision subsystem that verifies a presence of the RFID tag as a function of the correlation signal.
US09710681B2
An object of the present invention is to provide a communication system, a relay communication device, a combination of the relay communication device and the electromagnetic induction communication device, an electromagnetic induction communication device, an information storage medium, and an information storage medium manufacturing method, in which a communication system communicating through electromagnetic induction can be implemented at low cost. A relay automatic ticket gate system provides the following. An IC card 40 includes an IC chip capable of communicating through electromagnetic induction, and a pair of conductive plates. A relay communication device includes a relay loop antenna, and a pair of conductive rails. An electromagnetic induction ticket gate communicates through electromagnetic induction between a ticket gate loop antenna communicating with a relay loop antenna through electromagnetic induction, and a relay communication device. A ticket gate control unit executes processing of communication with the IC chip.
US09710674B2
A method for executing applications on an untrusted device includes selecting one or more applications as sensitive applications. One or more instruction sequences of the said one or more sensitive applications are modified by an external dongle. The one or more sensitive applications are executed on the untrusted device according to the modified instruction sequences. Whether correct execution of the instructions of the said modified instruction sequences has occurred is checked by the external dongle.
US09710673B2
Some embodiments provide a program that synchronizes a keychain stored on a device with a set of other devices. The keychain includes a set of keychain items. The program receives (1) a list of keychain items for updating the keychain stored on the device and (2) data representing the keychain items specified in the list of keychain items. For each keychain item in the list of keychain items, the program updates the keychain stored on the device with the data that represents the keychain item.
US09710668B2
A computer-based method and system of distributing biological sample data acquired as a digital image of a subject biological sample. The acquired digital image and image capture data are processed according to at least one user. This results in processed image data and capture metadata. The processed image data represents biological sample data of the subject biological sample. A package processing combines the processed image data and capture metadata into a working Package. The method and system enables simultaneous electronic access to the working Package by multiple users, across multiple sectors, in addition to the one user.
US09710666B2
In computer-based user authentication, a user performs an image-based log-in comprising a set of actions on at least one verification image on a display screen. Users are authenticated by a computer comparing the set of actions against a key definition for the verification image. The set of actions may include selecting a target location on the image, selecting target locations in a selected order and/or with a selected pattern, superimposing a target location with a selected overlay, covering target locations with overlays in a selected superimposing order and/or pattern. The user may define the set of actions and verification image to establish the log-in. The user may also establish or enhance security for a component of a multi-component password, which may be an image-based password; one method is to encrypt the position of at least one target location and to modify the encryption as frequently as desired.
US09710662B2
An image processing apparatus may include a communication device, an image processing device, a reception device, at least one processor, and a memory. The communication device may be configured to communicate with a server. The reception device may be configured to receive first authentication data and a request for using the server. The memory may store computer executable instructions that, when executed by the at least one processor, cause the image processing apparatus to: allow a user to login when the first authentication data satisfies a prescribed authentication condition; automatically request, to the server, permission to use the server regardless of whether the reception device receives the request, once the user has logged in; and execute an image process using both the image processing device and the server.
US09710650B2
A method of detecting a cold-boot attack on an integrated circuit including the steps of: transferring, into a first volatile memory of the integrated circuit, a pattern stored in a non-volatile memory of the circuit; periodically causing a switching down and a switching up of the first volatile memory; and verifying that the number of bits having switched state is within a range of values.
US09710647B2
The present disclosure relates to allowing the utilization of a virus scanner and cleaner that operates primarily in the pre-boot phase of computer operation and, more particularly, to allowing the utilization of a virus scanner and cleaner that operates primarily during the loading of an operating system.
US09710644B2
This disclosure provides techniques for pooling and searching network security events reported by multiple sources. As information representing a security event is received from one source, it is searched against a central or distributed database representing events reported from multiple, diverse sources (e.g., different client networks). Either the search or correlated results can be filtered and/or routed according at least one characteristic associated with the networks, for example, to limit correlation to events reported by what are presumed to be similarly situated networks. The disclosed techniques facilitate faster identification of high-relevancy security event information, and thereby help facilitate faster threat identification and mitigation. Various techniques can be implemented as standalone software (e.g., for use by a private network) or for a central pooling and/or query service. This disclosure also provides different examples of actions that can be taken in response to search results.
US09710636B1
Embodiments of the present invention provide methods, program products and systems to reduce mistakes in production and management of digital identification cards. Embodiments of the present invention can create a digital card template design using graphical icons in a user interface display and publish the created digital card template design to a server. Embodiments of the present invention can access the server to test the published digital card template design using sample data and deploy the published digital card template design to an issuing service. Embodiments of the present invention can, responsive to receiving an acquisition URL from the issuing service, build an instance of a digital identification card from information included in the acquisition URL.
US09710635B2
A digital programmable smart card terminal device and token collectively known as the token device is disclosed. The token device comprises a field programmable token device which accepts a user's smart card. The combination of token device and smart card may then be used for a variety of applications that include user authentication, secure access, encryption. One specific application is that of an electronic wallet. In one embodiment, an electronic smart card terminal includes a smart card reader adapted to receive and communicate with a smart card having smart card data stored thereon; token personality logic programmed based on the smart card data as a token personality subsequent to insertion of the smart card in the smart card reader; and a communications mechanism for communicating authentication data derived from the token personality. Since the smart card terminal only gains its token personality when a smart card is inserted, manufacture and distribution of the terminal on a wide scale is possible.
US09710625B2
The present invention is generally directed toward a mobile device that can be used in a secure access system. More specifically, the mobile device can have credential data loaded thereon remotely updated, enabled, disabled, revoked, or otherwise altered with a message sent from, for example, a control panel and/or controller in the system.
US09710617B2
Systems and methods are described which utilize a recursive security protocol for the protection of digital data. These may include encrypting a bit stream with a first encryption algorithm and associating a first decryption algorithm with the encrypted bit stream. The resulting bit stream may then be encrypted with a second encryption algorithm to yield a second bit stream. This second bit stream is then associated with a second decryption algorithm. This second bit stream can then be decrypted by an intended recipient using associated keys.
US09710615B1
Mechanisms are disclosed herein for storing various records. Numerous keys and parties can access online repositories. These repositories contain a plurality of lockboxes, structured hierarchically and otherwise, providing public and private areas with varying levels of access. Some content of such lockboxes can be sharable. These lockboxes can be used not only to store diverse content, ranging from birth certificates to deeds and social security numbers, but they can also be accessed in a variety of ways. For example, keys to lockboxes can be made available by such events as the issuing of death certificates or birth certificates. Alternatively, keys can be issued according to various rules and heuristics stipulated by lockbox users. In either case, the plurality of lockboxes residing in repositories can be configured to provide centralized storage facilities that are secure and readily accessible from various computing devices.
US09710611B2
A method of managing insulin includes receiving blood glucose measurements on a computing device from a glucometer. The blood glucose measurements are separated by a time interval. The method includes determining, by the computing device, an insulin dose rate based on the blood glucose measurements and determining a blood glucose drop rate based on the blood glucose measurements and the time interval. The method also includes determining a blood glucose percentage drop based on the blood glucose measurements. The method includes decreasing the time interval between blood glucose measurements by the glucometer when the blood glucose drop rate is greater than a threshold drop rate, and decreasing the time interval between blood glucose measurements by the glucometer when the blood glucose percentage drop is greater than a threshold percentage drop.
US09710610B2
An enteral fluid delivery system includes a pump having a motor coupled to a rotor configured to accept a portion of a tubing of a feeding set. The motor drives the rotor, which compresses the tubing to deliver to a patient enteral fluid during a feeding cycle. The system includes a user interface that is operatively connected to a memory that stores a plurality of types of enteral fluids. The user interface enables a user to select at least one type of enteral fluid. The system also includes a processor that is operatively connected to the pump. The processor adjusts the flow rate of the pump to deliver the selected enteral fluid for delivery based on one or more characteristics of the feeding fluid such as the viscosity or the caloric content.
US09710609B2
A system of enhanced distribution of pharmaceuticals in long-term care facilities are provided. An embodiment of a system includes one or more pharmaceutical storage and electronic dispensing machines each positioned in a long-term care facility remote from a long-term care facility pharmacy group management server and in communication therewith, and long-term care facility pharmacy management computer programs associated with the long-term care facility pharmacy group management server to enhance use of the one or more of pharmaceutical storage and electronic dispensing machines. The long-term care facility management computer programs include a patient prescription receiver and a medication dispensing apparatus administrator and are configured and operable to transmit dispensing instructions to the one or more pharmaceutical storage and electronic dispensing machines when no drug conflicts exist to thereby initiate packaging and dispensing of one or more disposable patient dosing packages.
US09710606B2
A method for at least one of characterizing, diagnosing and treating a neurological health issue in at least a subject, the method comprising: receiving an aggregate set of biological samples from a population of subjects; generating at least one of a microbiome composition dataset and a microbiome functional diversity dataset for the population of subjects; generating a characterization of the neurological health issue based upon features extracted from at least one of the microbiome composition dataset and the microbiome functional diversity dataset; based upon the characterization, generating a therapy model configured to correct the neurological health issue; and at an output device associated with the subject, promoting a therapy to the subject based upon the characterization and the therapy model.
US09710600B1
Methods, systems, and apparatus, including computer programs encoded on non-transitory computer readable storage media, for integrating with an electronic health record system to permit healthcare providers, health insurance companies, and healthcare analytics providers to manage healthcare gaps in real-time.
US09710597B2
The present disclosure relates to systems and methods for facilitating trusted handling of genomic and/or other bioinformatic information. Certain embodiments may facilitate policy-based governance of access to and/or use of bioinformatic information, improved interaction with and/or use of distributed bioinformatic information, parallelization of various processes involving bioinformatic information, and/or reduced user involvement in bioinformatic workflow processes, and/or the like. Further embodiments may provide for memoization processes that may persistently store final and/or intermediate results of computations performed using genomic data for use in connection with future computations.
US09710592B2
A metal interconnect structure, a system and method of manufacture, wherein a design layout includes results in forming at least two trenches of different trench depths. The method uses a slightly modified BEOL processing stack to prevent metal interconnect structures from encroaching upon an underlying hard mask dielectric or metallic hard mask layer. Thus two trench depths are obtained by tuning parameters of the system and allowing areas exposed by two masks to have deeper trenches. Here, the BEOL Stack processing is modified to enable two trench depths by using a hardmask that defines the lowest etch depth. The design may be optimized by software which optimizes a design for electromigration (or setup timing violations) by utilizing secondary trench depths, checking space opportunity around wires, pushing wires out to generate space and converting a wire to deep trench wire.
US09710589B2
Systems, apparatuses, and methods for reducing the area of a semiconductor structure. A spacing violation may be detected for a gap width used to separate first and second regions of a layer of semiconductor material. In response to detecting the violation, the first and second regions are merged into a combined region, and then a cut mask layer is formed above the combined region. Next, an etch process is performed through the cut mask layer to remove an exposed third region within the combined region, wherein the exposed third region is interposed between first and second region portions of the combined region.
US09710588B2
A method of includes determining a first set of width bias values of an i-th set of layout patterns of an original layout according a first type width variation. The original layout has N sets of layout patterns corresponding to N masks, where the i-th set of layout patterns has an i-th mask assignment corresponding to an i-th mask of the N masks. The order index i is an integer from 1 to N, and N is an integer and greater than 1. A second set of width bias values of the i-th set of layout patterns of the original layout is determined according to a second type width variation. The modified layout is generated based on the first and second sets of width bias values of the i-th set of layout patterns.
US09710569B2
A system and method for managing data transfer operations includes at least one data server including data stored in a plurality of data fields, at least one transaction server operatively coupled to the at least one data server and configured to provide at least one customizable business rule and a customer relationship application, an information server operatively coupled to the at least one transaction server, and at least one workstation operatively coupled to the information server. The least one workstation includes local memory accessible to the customer relationship application and configured to provide web communication and presentation services to a user of the at least one workstation that are deployed on the information server. The at least one customizable business rule specifies a mapping between the plurality of data fields and the local memory, the mapping having been provided by the user interacting with the web communication and presentation services.
US09710568B2
A method, system, and computer program product for transforming RDF quads to relational views. The method commences by receiving a named graph, the named graph comprising at least one RDF quad, and analyzing the named graph to produce analysis metadata. The method uses the analysis metadata to generate relational views. The method further comprises publishing a relational view in the form of a SPARQL query. The quality of the results can be quantitatively measured and reported by calculating a goodness score based at least in part on aspects of the relational view definitions. Several variants for transformation include generating relational view definitions formed using a named-graph strict variant, or a named-graph relaxed variant, or a named-graph agnostic variant. The transformations can form outputs responsive to characteristics or properties such as a number of classes, a number of single-valued properties, a number of nullability properties, or a number of type-uniformed ranges.
US09710567B1
Automated publication recommendation includes: obtaining, from a social networking site, social networking activity information pertaining to a set of social networking activities performed by a plurality of contacts on the social networking site; determining, at the social media management platform, a recommended time for the user to publish content on the social networking site such that the content is viewable by the plurality of contacts associated with the user, the determination being based at least in part on the social networking activity information that is obtained, and the recommended time being a time during which the plurality of contacts are deemed to be active on the social networking site; presenting the recommended time to the user; receiving an indication from the user to publish the content at the recommended time; and sending the content to the social networking site to be published at the recommended time.
US09710565B2
In a method for utilizing multiple social computing services of a user, a processor accesses a first networking service of a user and a second networking service of the user, wherein the first networking service includes a first group of contacts connected with the user and the second networking service includes a second group of contacts connected with the user. A processor retrieves the first group from the first networking service and the second group from the second networking service. A processor creates a set of contacts, wherein the set of contacts includes each contact of the first group of contacts with a corresponding link to information about that contact, and each contact of the second group of contacts with a corresponding link to information about that contact, and wherein a contact of the set of contacts has an associated relationship, established externally from either networking service, with the user.
US09710559B2
Systems and methods are provided for optimizing displays in one or more user interfaces. An exemplary method may include retrieving web entries from a database and generating a plurality of candidates based on the retrieved web entries, where each web entry of the web entries is a clickable item that is displayed on the one or more user interfaces. Additionally, provide the plurality of candidates for display on the one or more user interfaces and determine click-through rates for each of the plurality of candidates. Thereafter, create a display pool of candidates to display from plurality of candidates based on the click-through rates and update the display pool of candidates responsive to retrieving additional web entries from the database.
US09710556B2
Techniques for content recommendation are described. Some embodiments provide a content recommendation system (“CRS”) configured to recommend content items that are related to a collection of entities. A content item may be considered related to a collection of entities based on various factors, including whether and how often the article references or otherwise covers the entities of the collection, the size of the article, other entities that are covered by the article but that are not in the collection, article recency, or article credibility. Recommending content items may also or instead include determining entities that are related to a collection. An entity can be considered related to a collection based on various factors, such as whether the entity is of the same or similar type to entities of the collection, or whether the entity appears in some article in a relationship with one or more entities of the collection.
US09710548B2
A semantic search engine is enhanced to employ user preferences to customize answer output by, for a first user, extracting user preferences and sentiment levels associated with a first question; receiving candidate answer results of a semantic search of the first question; weighting the candidate answer results according to the sentiment levels for each of the user preferences; and producing the selected candidate answers to the first user. Optionally, user preferences and sentiment levels may be accumulated over different questions for the same user, or over different users for similar questions. And, supplemental information may be retrieved relative to a user preference in order to further tune the weighting per the preferences and sentiment levels.