PROCESS APPARATUS.
    71.
    发明公开
    PROCESS APPARATUS. 失效
    BEARBEITUNGSGERÄT。

    公开(公告)号:EP0641150A4

    公开(公告)日:1995-05-10

    申请号:EP93910327

    申请日:1993-05-12

    申请人: OHMI TADAHIRO

    发明人: OHMI TADAHIRO

    摘要: A process apparatus whose chamber can be cleaned in a short time not exposed to air at all. At least two electrodes of first and second electrodes (107, 105) are provided in a vacuum vessel (108). A high-frequency power (112) having a first frequency is supplied to the first electrode (107), and a high-frequency power (101) having a second frequency different from the first frequency is supplied to the second electrode (105). A mechanism for supporting a wafer (106) is disposed on the second electrode (105), and a gas introduced into the vacuum vessel (108) is turned into a plasma by the powers. In this apparatus, a mechanism, by which the impedance between the second electrode (107) and a ground can be made enough larger than that between the first electrode and the ground, if necessary, is provided.

    摘要翻译: 一种工艺装置,其腔室可以在短时间内清洁而不会暴露在空气中。 第一和第二电极(107,105)的至少两个电极设置在真空容器(108)中。 具有第一频率的高频功率(112)被提供给第一电极(107),具有不同于第一频率的第二频率的高频功率(101)被提供给第二电极(105)。 在第二电极(105)上设置用于支撑晶片(106)的机构,通过这些电力将导入真空容器(108)的气体变成等离子体。 在该装置中,提供了一种机构,如果需要,可以使第二电极(107)和地之间的阻抗足够大于第一电极和地之间的阻抗。

    SILICON SEMICONDUCTOR SUBSTRATE AND ITS MANUFACTURING METHOD
    73.
    发明公开
    SILICON SEMICONDUCTOR SUBSTRATE AND ITS MANUFACTURING METHOD 审中-公开
    VERFAHREN ZU SEINER HERSTELLUNG的SILICIUMHALBLEITERSUBSTRAT

    公开(公告)号:EP1592045A4

    公开(公告)日:2010-09-08

    申请号:EP04706361

    申请日:2004-01-29

    摘要: The present invention has been made in order to manufacture a silicon semiconductor substrate used for a semiconductor integrated circuit device, higher in carrier mobility, especially in electron mobility, which is a carrier of an n-type FET, on a {100} plane as a main surface, and provides a silicon semiconductor substrate and a method for manufacturing the same, wherein the conventional RCA cleaning is employed without the use of special cleaning and the surface of the substrate is planarized at an atomic level to thereby decrease the surface roughness thereof without the use of the radical oxidation. The present invention provides a silicon semiconductor substrate comprising: a {110} plane or a plane inclined from a {110} plane as a main surface of the substrate; and steps arranged at an atomic level along a orientation on the main surface.

    摘要翻译: 本发明是为了制造用于半导体集成电路器件的硅半导体衬底,在{100}面作为载流子迁移率,尤其是作为n型FET的载流子的电子迁移率中,作为 并且提供一种硅半导体基板及其制造方法,其中采用常规的RCA清洗而不使用特殊的清洁,并且基板的表面在原子水平上被平坦化,从而降低其表面粗糙度 而不使用自由基氧化。 本发明提供了一种硅半导体衬底,包括:{110}面或从{110}面倾斜作为衬底的主表面的平面; 以及沿着主表面沿<110>方向布置在原子级的台阶。

    METHOD AND APPARATUS FOR CONVEYING THIN SHEET-LIKE SUBSTRATE
    78.
    发明公开
    METHOD AND APPARATUS FOR CONVEYING THIN SHEET-LIKE SUBSTRATE 失效
    方法和设备运送片状的T0

    公开(公告)号:EP0889515A4

    公开(公告)日:2004-10-20

    申请号:EP97912528

    申请日:1997-11-21

    摘要: When a thin sheet-like substrate S is conveyed between conveying chambers (2) equipped with a processing apparatus (1) and kept in an inert gas atmosphere by using a conveying robot (30) equipped with an accommodation chamber (3) capable of accommodating the thin sheet-like substrate (S) in an inert gas atmosphere, a connection chamber (4) is interposed between the accommodation chamber (3) and the conveying chamber (2) when the thin sheet-like substrate (S) is transferred between the accommodation chamber (3) of the conveying robot (30) and the conveying chamber (2) on the side of the processing apparatus (1), and is vacuumized, and then an inert gas is introduced. Thereafter, gate valves (GV1 and GV2) of the accommodation chamber (3) and the conveying chamber (2) are opened and the thin sheet-like substrate (S) is carried in and out.

    SEMICONDUCTOR INTEGRATED CIRCUIT.
    80.
    发明公开
    SEMICONDUCTOR INTEGRATED CIRCUIT. 失效
    INTEGRIERTE HALBLEITERSCHALTUNG。

    公开(公告)号:EP0657934A4

    公开(公告)日:1997-09-03

    申请号:EP93919578

    申请日:1993-08-26

    CPC分类号: H03K19/1736 H01L27/11803

    摘要: A semiconductor integrated circuit adaptable to any logic circuits using a common mask with the exception of a mask of metallic wirings so as to drastically improve performance of custom LSIs. The semiconductor integrated circuit comprises a logic circuit having a plurality of input terminals and at least one output terminal. The logic circuit includes a plurality of circuit blocks of the same circuit construction. Each of the circuit blocks has at least two stages of inverter formed by MOS semiconductor devices and at least one layer of a wiring pattern having a different pattern. The output signal of each block is defined by a predetermined function of an input signal.

    摘要翻译: 一种半导体集成电路,适用于使用除了金属布线掩模之外的共用掩模的任何逻辑电路,从而大大提高定制LSI的性能。 半导体集成电路包括具有多个输入端和至少一个输出端的逻辑电路。 逻辑电路包括具有相同电路结构的多个电路块。 每个电路块具有由MOS半导体器件形成的至少两级的反相器和至少一层具有不同图案的布线图案。 每个块的输出信号由输入信号的预定功能定义。