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13 条记录 (耗时 0.011 秒)

    Thin film resonators fabricated on membranes created by front side releasing
    4.
    发明公开
    Thin film resonators fabricated on membranes created by front side releasing 有权
    生产薄膜谐振器的通过底层膜的顶表面的自由蚀刻

    公开(公告)号：EP1180494A2

    公开(公告)日：2002-02-20

    申请号：EP01306284.9

    申请日：2001-07-20

    申请人： Agere Systems Guardian Corporation

    发明人： Chan, Edward ,  Kim, Jungsang ,  Huggins, Harold Alexis ,  Soh, Hyongsok

    IPC分类号： B81B3/00 ,  H03H9/17

    CPC分类号： H03H9/173 ,  B81B2201/0271 ,  B81C1/00142 ,  B81C2201/014 ,  H03H3/02 ,  H03H2003/021

    摘要： A new bulk resonator may be fabricated by a process that is readily incorporated in the traditional fabrication techniques used in the fabrication of monolithic integrated circuits on a wafer. The resonator is decoupled from the wafer by a cavity etched under the resonator using selective etching through front openings (vias) in a resonator membrane. In a typical structure the resonator is formed over a silicon wafer by first forming a first electrode, coating a piezoelectric layer over both the electrode and the wafer surface and forming a second electrode opposite the first on the surface of the piezoelectric layer. After this structure is complete, a number of vias are etched in the piezoelectric layer exposing the surface under the piezoelectric layer to a selective etching process that selectively attacks the surface below the piezoelectric layer creating a cavity under the resonator.

    Thin film resonators fabricated on membranes created by front side releasing
    5.
    发明公开
    Thin film resonators fabricated on membranes created by front side releasing 有权
    Herstellung vonDünnschichtresonatorendurchFreiätzungvon Oberseiten darunterliegender Membranen

    公开(公告)号：EP1180494A3

    公开(公告)日：2003-03-26

    申请号：EP01306284.9

    申请日：2001-07-20

    申请人： Agere Systems Guardian Corporation

    发明人： Chan, Edward ,  Kim, Jungsang ,  Huggins, Harold Alexis ,  Soh, Hyongsok

    IPC分类号： B81B3/00 ,  H03H9/17 ,  H03H3/02

    CPC分类号： H03H9/173 ,  B81B2201/0271 ,  B81C1/00142 ,  B81C2201/014 ,  H03H3/02 ,  H03H2003/021

    摘要： A new bulk resonator may be fabricated by a process that is readily incorporated in the traditional fabrication techniques used in the fabrication of monolithic integrated circuits on a wafer. The resonator is decoupled from the wafer by a cavity etched under the resonator using selective etching through front openings (vias) in a resonator membrane. In a typical structure the resonator is formed over a silicon wafer by first forming a first electrode, coating a piezoelectric layer over both the electrode and the wafer surface and forming a second electrode opposite the first on the surface of the piezoelectric layer. After this structure is complete, a number of vias are etched in the piezoelectric layer exposing the surface under the piezoelectric layer to a selective etching process that selectively attacks the surface below the piezoelectric layer creating a cavity under the resonator.

    摘要翻译： 新的体谐振器可以通过容易地结合在晶片上制造单片集成电路中的传统制造技术中的工艺来制造。 谐振器通过在共振器下蚀刻的腔体与晶片分离，使用通过谐振器膜中的前开口（通孔）的选择性蚀刻。 在典型的结构中，谐振器通过首先形成第一电极而在硅晶片上形成，在电极和晶片表面上涂覆压电层，并形成与压电层表面上的第一电极相对的第二电极。 在该结构完成之后，在将压电层下方的表面暴露的压电层中蚀刻多个通孔到选择性蚀刻工艺，该选择性蚀刻工艺选择性地攻击压电层下方的表面，在谐振器下面形成空腔。

    Non-volatile mems micro-relays using magnetic actuators
    7.
    发明公开
    Non-volatile mems micro-relays using magnetic actuators 有权
    非易失性MEMS微动继电器使用磁性致动器

    公开(公告)号：EP1093141A3

    公开(公告)日：2003-04-09

    申请号：EP00308867.1

    申请日：2000-10-09

    申请人： LUCENT TECHNOLOGIES INC.

    发明人： Bishop, David John ,  Jin, Sungho ,  Kim, Jungsang ,  Ramirez, Ainissa G.

    IPC分类号： H01H50/00

    CPC分类号： H01H50/005 ,  H01H2050/007 ,  H02K99/20 ,  Y10S310/06

    摘要： An actuation device employing square-loop latchable magnetic material (14, 16) having a magnetization direction (polarization) capable of being changed in response to exposure to an external magnetic field is disclosed. The magnetic field is created by a conductor assembly with non-solenoid configuration. Once the magnetization direction of the material is so changed, the external magnetic field is no longer required to maintain the new magnetization direction. The latchable magnetic material (14) is disposed on the mobile electrode (20) of a switching device, and another magnetic material (16) is disposed in spaced relation to the latchable magnetic material on a stationary electrode or surface (28). By applying an electrical current to a conductor assembly arranged proximate the latchable material, a magnetic field is created about the latchable magnetic material, to change the magnetization direction and thereby enable the attraction or repulsion of another magnetic material located on the stationary electrode. The resulting relative displacement of the mobile (20) and stationary (18) electrodes effects the selective connection or disconnection of electrical contacts carried on or associated with the respective electrodes of the actuation device without requiring additional power in order to maintain the switched state of the electrodes.

    Article comprising improved noble metal-based alloys and method for making the same
    8.
    发明公开
    Article comprising improved noble metal-based alloys and method for making the same 审中-公开
    制品具有改进的贵金属基合金和制造工艺

    公开(公告)号：EP1096523A3

    公开(公告)日：2003-06-18

    申请号：EP00309103.0

    申请日：2000-10-16

    申请人： LUCENT TECHNOLOGIES INC.

    发明人： Bishop, David John ,  Jin, Sungho ,  Kim, Jungsang ,  Ramirez, Ainissa C. ,  van Dover, Robert Bruce

    IPC分类号： H01H1/02

    CPC分类号： H01H1/023 ,  H01H1/0036 ,  H01H1/027 ,  H01H2300/036

    摘要： A device having electrical contacts formed from an alloy having improved wear resistance is provided, the alloy being particularly useful in microrelay devices formed by MEMS technology. In one embodiment, the alloys are chosen to allow sufficient precipitation hardening to improve wear resistance, but keep precipitation below a level that would unacceptably reduce electrical conductivity. This is achieved by using alloying materials that have very limited or no solid solubility in the noble metal matrix, e.g., less than 4 wt.% solid solubility. In a second embodiment, an alloy contains a noble metal matrix and insoluble, dispersoid particles having no solubility in the matrix, these dispersoid particles offering a similar strengthening mechanism.

    Hermatic firewall for mems packaging in flip-chip bonded geometry
    9.
    发明公开
    Hermatic firewall for mems packaging in flip-chip bonded geometry 审中-公开
    Hermetischer FeuerwallfürMEMS Verpackung in Flip-Chip-gebondeter Geometrie

    公开(公告)号：EP1093162A1

    公开(公告)日：2001-04-18

    申请号：EP00308893.7

    申请日：2000-10-09

    申请人： LUCENT TECHNOLOGIES INC.

    发明人： Bishop, David John ,  van Atta Gates II, John ,  Kim, Jungsang

    IPC分类号： H01L23/04 ,  H01L23/10

    CPC分类号： B81B7/0041 ,  B81C2203/019 ,  H01L23/04 ,  H01L23/057 ,  H01L23/10 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/00

    摘要： A package (10) for hermetically sealing a micro-electromechanical systems (MEMS) device (25) in a hybrid circuit comprise a firewall (30) formed on a substrate (40) for the MEMS device and which has a height defining a cavity of the package in which the MEMS device will be sealed. A second substrate (70) spaced from the first substrate hermetically seals the cavity when the second substrate is flip-chip bonded to the first substrate and soldered to the first substrate with a thin film metal material placed on at least a top portion of the firewall. The resulting firewall MEMS device package can be further packaged using conventional CMOS packaging techniques. By hermetically sealing the cavity, the enclosed MEMS device is protected from deleterious conditions found in the environment of conventional CMOS packaging techniques which is often detrimental to MEMS device function.

    摘要翻译： 用于气密地密封混合电路中的微机电系统（MEMS）装置（25）的封装（10）包括形成在用于MEMS器件的衬底（40）上的防火墙（30），其具有限定腔 其中MEMS器件将被密封的封装。 与第一基板间隔开的第二基板（70）在将第二基板倒装芯片接合到第一基板时密封空腔，并且将金属材料焊接到第一基板上，薄膜金属材料放置在防火墙的至少顶部 。 所得到的防火墙MEMS器件封装可以使用传统的CMOS封装技术进一步封装。 通过密封空腔，封装的MEMS器件得到保护，防止在常规CMOS封装技术的环境中发现有害条件，这常常对MEMS器件功能有害。

    Flip-chip bonded micro-relay on integrated circuit chip
    10.
    发明公开
    Flip-chip bonded micro-relay on integrated circuit chip 审中-公开
    Flip-chip montiertes Mikrorelais auf einer integrierten Schaltung

    公开(公告)号：EP1093143A1

    公开(公告)日：2001-04-18

    申请号：EP00308858.0

    申请日：2000-10-09

    申请人： LUCENT TECHNOLOGIES INC.

    发明人： Bishop, David John ,  Bolle, Christain A. ,  Kim, Jungsang ,  Pardo, Flavio

    IPC分类号： H01H59/00 ,  H01L25/065 ,  H01H50/00

    CPC分类号： B81C1/00238 ,  B81B2203/0118 ,  B81B2203/04 ,  H01H50/005 ,  H01H59/0009

    摘要： Hybrid integrated circuits comprise a micro-electro mechanical systems (MEMS) relay which is flip-chip bonded to a CMOS chip. By bonding the CMOS chip to the MEMS micro-relay, a robust electrical connection is made between the relayed chip for high integrity electrical transmission through the hybrid circuit. Moreover, the electrical signal propagation delays between the CMOS and MEMS chips are greatly reduced to thereby allow the hybrid integrated circuits to be used in high bandwidth applications.

    摘要翻译： 混合集成电路包括被倒装芯片连接到CMOS芯片的微机电系统（MEMS）继电器。 通过将CMOS芯片连接到MEMS微型继电器，在中继芯片之间进行了牢固的电连接，用于通过混合电路的高完整性电传输。 此外，CMOS和MEMS芯片之间的电信号传播延迟大大降低，从而允许混合集成电路在高带宽应用中使用。