公开(公告)号：EP3780097A1

公开(公告)日：2021-02-17

申请号：EP20199518.0

申请日：2016-10-11

申请人： Invensas Corporation

发明人： AWUJOOLA, Abiola ,  SUN, Zhuowen ,  ZOHNI, Wael ,  PRABHU, Ashok, S. ,  SUBIDO, Willmar

IPC分类号： H01L23/552 ,  H01L23/498 ,  H01L23/49 ,  H01L25/10 ,  H01L25/03 ,  H01L25/065

摘要： Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.

公开(公告)号：EP4235776A2

公开(公告)日：2023-08-30

申请号：EP23167163.7

申请日：2016-10-11

申请人： Invensas Corporation

发明人： AWUJOOLA, Abiola ,  SUN, Zhuowen ,  ZOHNI, Wael ,  PRABHU, Ashok, S. ,  SUBIDO, Willmar

IPC分类号： H01L23/552 ,  H01L23/498 ,  H01L23/49 ,  H01L25/10 ,  H01L25/03 ,  H01L25/065

摘要： Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.

公开(公告)号：EP3031077A2

公开(公告)日：2016-06-15

申请号：EP14755265.7

申请日：2014-08-06

申请人： Invensas Corporation

发明人： UZOH, Cyprian Emeka ,  SUN, Zhuowen

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L23/14 ,  H01L21/48

CPC分类号： H01L23/5226 ,  H01L21/486 ,  H01L21/76802 ,  H01L21/7682 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interconnection component includes a semiconductor material layer having a first surface and a second surface opposite the first surface and spaced apart in a first direction. At least two metalized vias extend through the semiconductor material layer. A first pair of the at least two metalized vias are spaced apart from each other in a second direction orthogonal to the first direction. A first insulating via in the semiconductor layer extends from the first surface toward the second surface. The insulating via is positioned such that a geometric center of the insulating via is between two planes that are orthogonal to the second direction and that pass through each of the first pair of the at least two metalized vias. A dielectric material at least partially fills the first insulating via or at least partially encloses a void in the insulating via.

摘要翻译： 互连部件包括具有第一表面和与第一表面相对并沿第一方向间隔开的第二表面的半导体材料层。 至少两个金属化通孔延伸穿过半导体材料层。 第一对至少两个金属化通孔在与第一方向正交的第二方向上彼此间隔开。 半导体层中的第一绝缘通孔从第一表面朝向第二表面延伸。 绝缘通孔被定位为使得绝缘通孔的几何中心位于与第二方向正交的两个平面之间并且穿过第一对至少两个金属化通孔中的每一个。 介电材料至少部分地填充第一绝缘通孔或者至少部分地封闭绝缘通孔中的空隙。

公开(公告)号：EP3031077B1

公开(公告)日：2018-12-05

申请号：EP14755265.7

申请日：2014-08-06

申请人： Invensas Corporation

发明人： UZOH, Cyprian Emeka ,  SUN, Zhuowen

IPC分类号： H01L23/48 ,  H01L23/498

CPC分类号： H01L23/5226 ,  H01L21/486 ,  H01L21/76802 ,  H01L21/7682 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interconnection component includes a semiconductor material layer having a first surface and a second surface opposite the first surface and spaced apart in a first direction. At least two metalized vias extend through the semiconductor material layer. A first pair of the at least two metalized vias are spaced apart from each other in a second direction orthogonal to the first direction. A first insulating via in the semiconductor layer extends from the first surface toward the second surface. The insulating via is positioned such that a geometric center of the insulating via is between two planes that are orthogonal to the second direction and that pass through each of the first pair of the at least two metalized vias. A dielectric material at least partially fills the first insulating via or at least partially encloses a void in the insulating via.

公开(公告)号：EP3374994A1

公开(公告)日：2018-09-19

申请号：EP16864817.8

申请日：2016-11-07

申请人： Invensas Corporation

发明人： SUN, Zhuowen ,  CHEN, Yong ,  BANG, Kyong-Mo

IPC分类号： G11C11/408 ,  G11C5/06 ,  G11C8/18 ,  G11C11/409 ,  H01L23/02 ,  H01L23/64 ,  H01L25/065 ,  H01L25/18

CPC分类号： G11C11/4087 ,  G11C5/063 ,  G11C8/18 ,  G11C11/409 ,  H01L23/02 ,  H01L23/3128 ,  H01L23/64 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

摘要： A microelectronic assembly can include an address bus comprising a plurality of signal conductors each passing sequentially through first, second, third, and fourth connection regions, and first and second microelectronic packages. The first microelectronic package can include first and second microelectronic elements, and the second microelectronic package can include third and fourth microelectronic elements. Each microelectronic element can be electrically coupled to the address bus via the respective connection region. An electrical characteristic between the first and second connection regions can be within a same tolerance of the electrical characteristic between the second and third connection regions.

公开(公告)号：EP4235776A3

公开(公告)日：2024-01-17

申请号：EP23167163.7

申请日：2016-10-11

申请人： Invensas Corporation

发明人： AWUJOOLA, Abiola ,  SUN, Zhuowen ,  ZOHNI, Wael ,  PRABHU, Ashok, S. ,  SUBIDO, Willmar

IPC分类号： H01L23/552 ,  H01L23/498 ,  H01L23/49 ,  H01L25/10 ,  H01L25/03 ,  H01L25/065

摘要： Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.

公开(公告)号：EP3284103A2

公开(公告)日：2018-02-21

申请号：EP16856029.0

申请日：2016-10-11

申请人： Invensas Corporation

发明人： AWUJOOLA, Abiola ,  SUN, Zhuowen ,  ZOHNI, Wael ,  PRABHU, Ashok, S. ,  SUBIDO, Willmar

IPC分类号： H01L23/00 ,  H01L23/495 ,  H01L21/48

CPC分类号： H01L23/552 ,  H01L23/49811 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/215 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/4942 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73227 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05599

摘要： Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.