公开(公告)号：EP3159831B1

公开(公告)日：2018-10-03

申请号：EP15190726.8

申请日：2015-10-21

申请人： NXP B.V.

发明人： Zenz, Christian

IPC分类号： G06K19/077 ,  H01L23/498 ,  H01L21/48 ,  H01L23/66 ,  H01L23/00

CPC分类号： G06K19/07754 ,  G06K19/07769 ,  H01L21/4853 ,  H01L23/49838 ,  H01L23/49855 ,  H01L23/66 ,  H01L24/48 ,  H01L2223/6611 ,  H01L2223/6677 ,  H01L2224/48227 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/45099

摘要： The disclosure relates to a dual-interface integrated circuit (IC) card. Embodiments disclosed include a dual-interface card (100) comprising: a card body (122) containing an antenna (120), the antenna having first and second antenna connections; and a dual-interface integrated circuit card module (150) comprising: a substrate (104) having first and second opposing surfaces; a contact area (102) on the first surface of the substrate (104), the contact area (102) comprising a plurality of contact pads (108) and first and second routing connections (106) each having a first end and a second end; an integrated circuit (110) on the second surface of the substrate (104); electrical connections through the substrate (104) connecting the integrated circuit (110) to the plurality of contact pads (108) and to the first end of each of the first and second routing connections (106); and first and second antenna connectors (118) disposed in respective first and second holes (103) in the substrate (104) and in electrical contact with the second end of the respective first and second routing connections, wherein the first and second antenna connectors (118) of the card module are electrically connected to the first and second antenna connections of the card body (122).

公开(公告)号：EP3284103A4

公开(公告)日：2018-08-01

申请号：EP16856029

申请日：2016-10-11

申请人： INVENSAS CORP

发明人： AWUJOOLA ABIOLA ,  SUN ZHUOWEN ,  ZOHNI WAEL ,  PRABHU ASHOK S ,  SUBIDO WILLMAR

IPC分类号： H01L23/552 ,  H01L23/49 ,  H01L23/498 ,  H01L25/03 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L23/552 ,  H01L23/49811 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/215 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/4942 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73227 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05599

摘要： Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.

公开(公告)号：EP1944802B1

公开(公告)日：2018-02-14

申请号：EP07025144.2

申请日：2007-12-27

申请人： MediaTek Inc.

发明人： Chen, Nan-Jang ,  Lin, Hong-Chin

IPC分类号： H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L23/50 ,  H01L23/66 ,  H01L23/00 ,  H01L25/10 ,  H01L25/16

CPC分类号： H01L23/49531 ,  H01L21/4832 ,  H01L23/49548 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/16 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2224/49173 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2224/85469 ,  H01L2224/85473 ,  H01L2224/85476 ,  H01L2224/85478 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19015 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A leadframe package includes a die pad with four unitary, outwardly extending slender bars; a plurality of leads arranged along periphery of the die pad; a separate pad segment separated from the die pad and isolated from the plurality of leads; a semiconductor die mounted on an upper side of the die pad, wherein the semiconductor die contains first bond pads wire-bonded to respective the plurality of leads and a second bond pad wire-bonded to the separate pad segment; and a molding compound encapsulating the semiconductor die, the upper side of the die pad, the first suspended pad segment and inner portions of the plurality of leads.

公开(公告)号：EP2159841B1

公开(公告)日：2017-11-08

申请号：EP09169228.5

申请日：2009-09-02

申请人： Linear Technology Corporation

发明人： Pruitt, David A.

IPC分类号： H01F19/08 ,  H01L23/64 ,  H01L25/07 ,  H01L25/065 ,  H01F27/28 ,  H01F38/14 ,  H01L23/495

CPC分类号： H01F19/08 ,  H01F38/14 ,  H01F2019/085 ,  H01F2027/2814 ,  H01L23/48 ,  H01L23/4952 ,  H01L23/642 ,  H01L23/645 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L2223/6611 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/4823 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48491 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/49052 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2224/49176 ,  H01L2224/4943 ,  H01L2224/85455 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/48824

公开(公告)号：EP2843697A2

公开(公告)日：2015-03-04

申请号：EP14179605.2

申请日：2014-08-01

申请人： Ubotic Company Limited

发明人： Fan, Chun Ho

IPC分类号： H01L23/047 ,  H01L23/10 ,  H01L21/50

CPC分类号： H01L23/49503 ,  H01L21/4825 ,  H01L21/50 ,  H01L21/565 ,  H01L21/78 ,  H01L23/047 ,  H01L23/10 ,  H01L23/3114 ,  H01L23/4952 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49582 ,  H01L23/49861 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/15747 ,  H01L2924/16251 ,  H01L2924/165 ,  H01L2924/1659 ,  H01L2924/167 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A cavity package is disclosed comprising a metal leadframe, a metal ring connected to the metal leadframe, a plastic body molded to the metal leadframe forming a substrate cavity including an exposed die attach pad of the leadframe for affixing a semiconductor device, exposed lead fingers of the leadframe for wire bonding to the semiconductor device and an external circuit, and an exposed top surface of the metal ring, and a metal cap for closing and encapsulating the substrate cavity. The metal ring is integrated into the pre-molded cavity leadframe for providing an electrical ground path from the metal cap to the die attach pad and permitting attachment of the metal cap to the pre-molded leadframe using solder reflow.

摘要翻译： 公开了一种空腔封装，其包括金属引线框架，连接到金属引线框架的金属环，模制到金属引线框架的塑料体，形成衬底腔体，该衬底腔体包括用于固定半导体器件的引线框架的暴露管芯附接焊盘，暴露的引线指 用于引线结合到半导体器件的引线框架和外部电路以及金属环的暴露的顶表面，以及用于封闭和封装衬底腔的金属帽。 金属环集成到预成型腔引线框架中，用于提供从金属盖到管芯附接垫的电接地路径，并允许使用回流焊将金属帽附接到预成型的引线框架上。

公开(公告)号：EP2779232A3

公开(公告)日：2014-12-03

申请号：EP14160005.6

申请日：2014-03-14

申请人： Renesas Electronics Corporation

发明人： Kajiwara, Ryoichi ,  Nakajo, Takuya ,  Arai, Katsuo ,  Yato, Yuichi ,  Oka, Hiroi ,  Hozoji, Hiroshi

IPC分类号： H01L23/488 ,  H01L23/49 ,  H01L21/60 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L23/49 ,  H01L21/50 ,  H01L23/293 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3192 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49562 ,  H01L23/49582 ,  H01L23/562 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L29/1608 ,  H01L29/2003 ,  H01L2224/0381 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29294 ,  H01L2224/29439 ,  H01L2224/2949 ,  H01L2224/3011 ,  H01L2224/3201 ,  H01L2224/32013 ,  H01L2224/32058 ,  H01L2224/32059 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45565 ,  H01L2224/45616 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/45664 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48755 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/48997 ,  H01L2224/4903 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/83055 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83439 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8392 ,  H01L2224/83951 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/8592 ,  H01L2224/85951 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00011 ,  H01L2924/10272 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/06 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/01013 ,  H01L2924/01051 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/83205

摘要： A semiconductor device (20, 24, 29, 32, 35, 38) includes a die pad (6), a wide gap semiconductor chip (SiC or GaN) (1) mounted on the die pad (6), a porous first sintered Ag layer (16) bonding the die pad (6) and the chip (1), and a reinforcing resin portion (17) covering a surface of the first sintered Ag layer (16) and a part of a side surface of the chip (1) and formed in a fillet shape. The semiconductor device (20, 24, 29, 32, 35, 38) further includes electrodes (1g, 1h, 2, 3, 4) on its main (1a) and back (1b) surfaces, the electrodes (1g, 1h, 2, 3, 4) being electrically connected to leads (7, 9, 11, 39), wherein the electrical connection at the front side is a wire (18, 19, 25, 26) connection and the electrical connection at the back side is the first sintered Ag layer (16). A porous second sintered Ag layer (36) or a second resin portion (30) reinforces the wire bonding portion on the electrode (1g, 2, 3). The semiconductor device (20, 24, 29, 32, 35, 38) further includes a sealing body (third resin) (14) which covers the chip (1), the first sintered Ag layer (16), and a part of the die pad (6).

摘要翻译： 一种半导体器件（20,24,29,32,35,38）包括管芯焊盘（6），安装在管芯焊盘（6）上的宽带隙半导体芯片（SiC或GaN）（1），多孔第一烧结体 （6）和芯片（1）接合的Ag层（16）;以及覆盖第一烧结Ag层（16）的表面和芯片侧面的一部分的加强树脂部分（17） 1）并形成圆角形状。 半导体器件（20,24,29,32,35,38）还包括在其主（1a）和背（1b）表面上的电极（1g，1h，2,3,4），电极（1g，1h， （2,3,4）电连接到引线（7,9,11,39），其中在正面的电连接是导线（18,19,25,26）连接并且背面的电连接 是第一个烧结Ag层（16）。 多孔的第二烧结Ag层（36）或第二树脂部分（30）加强电极（1g，2,3）上的引线键合部分。 半导体器件（20,24,29,32,35,38）还包括覆盖芯片（1），第一烧结Ag层（16）和第一烧结Ag层（16）的一部分的密封体（第三树脂） 芯片焊盘（6）。

公开(公告)号：EP2159841A2

公开(公告)日：2010-03-03

申请号：EP09169228.5

申请日：2009-09-02

申请人： Linear Technology Corporation

发明人： Pruitt, David A.

IPC分类号： H01L25/07 ,  H01L23/64

CPC分类号： H01F19/08 ,  H01F38/14 ,  H01F2019/085 ,  H01F2027/2814 ,  H01L23/48 ,  H01L23/4952 ,  H01L23/642 ,  H01L23/645 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L2223/6611 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/4823 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48491 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/49052 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2224/49176 ,  H01L2224/4943 ,  H01L2224/85455 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/48824

摘要： A semiconductor device is configured to provide current and voltage isolation inside an integrated circuit package. The semiconductor device includes first and second semiconductor dies, a first isolating block positioned on the first semiconductor die, and a second isolating block positioned on the second semiconductor die. The semiconductor device also includes a first interconnect coil having a plurality of wires connecting the first semiconductor die to the second isolating block, and a second interconnect coil having a plurality of wires connecting the second semiconductor die to the first isolating block.

摘要翻译： 半导体器件被配置为在集成电路封装内部提供电流和电压隔离。 半导体器件包括第一和第二半导体管芯，位于第一半导体管芯上的第一隔离块和位于第二半导体管芯上的第二隔离块。 半导体器件还包括具有连接第一半导体管芯与第二隔离块的多条引线的第一互连线圈和具有将第二半导体管芯连接到第一隔离块的多条引线的第二互连线圈。

公开(公告)号：EP1474266A1

公开(公告)日：2004-11-10

申请号：EP03706280.9

申请日：2003-02-05

申请人： Infineon Technologies AG

发明人： HOSSEINI, Khalil

IPC分类号： B23K20/00 ,  B23K20/10 ,  B23K26/20

CPC分类号： H01L24/85 ,  B23K20/004 ,  B23K20/10 ,  B23K26/20 ,  B23K2201/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/05655 ,  H01L2224/32245 ,  H01L2224/43826 ,  H01L2224/43827 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45686 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48655 ,  H01L2224/48755 ,  H01L2224/48855 ,  H01L2224/73265 ,  H01L2224/78313 ,  H01L2224/78318 ,  H01L2224/85099 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L2224/85455 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/45644 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2924/2075

摘要： The invention relates to a method for wire bonding and a method for the production of a bonding connection. A bonding point (2, 20) is heated by means of a laser beam (4) originating from a laser. The arrangement (1) comprises a wedge-wedge-ultrasound-bonding device with a bonding needle (5), a copper or aluminium bonding wire guide (7) and a copper or aluminium wire (8) for a wedge-wedge-ultrasound-bonding method and at least one of the bonding points (2, 20) displays a hard metal covering (6).

公开(公告)号：EP1160858A3

公开(公告)日：2004-04-28

申请号：EP01302530.9

申请日：2001-03-20

申请人： SANYO ELECTRIC CO., LTD.

发明人： Sakamoto, Noriaki ,  Kobayashi, Yoshiyuki ,  Sakamoto, Junji ,  Mashimo, Shigeaki ,  Okawa, Katsumi ,  Maehara, Eiju ,  Takahashi, Kouji

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L21/68

CPC分类号： H01L24/32 ,  H01L21/4832 ,  H01L21/561 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/05554 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48463 ,  H01L2224/48472 ,  H01L2224/48599 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48669 ,  H01L2224/48699 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48755 ,  H01L2224/48769 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85469 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/15183 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/00012

摘要： By forming a flat member 10 forming a conductive film 11 having substantially same pattern with a second bonding pad 17, a wiring 18, and an electrode 19 for taking out , or forming a flat member 30 half-etched through the conductive film 11, it is possible to manufacture a semiconductor device 23 of BGA structure using a back process of a semiconductor maker.

摘要翻译： 通过在形成的导电膜11具有与第二焊接垫块17，布线18，以及基本相同的图案的板状体10中取出，或形成平坦构件通过导电30的半蚀刻的膜11电极19，它 可以使用半导体制造商的背面工艺制造BGA结构的半导体器件23。

公开(公告)号：EP1284501A1

公开(公告)日：2003-02-19

申请号：EP02016354.9

申请日：1996-11-07

申请人： FUJITSU LIMITED

发明人： Yoneda, Yoshiyuki, Fujitsu Limited ,  Tsuji, Kazuto, Fujitsu Limited ,  Orimo, Seiichi, Fujitsu Limited ,  Sakoda, Hideharu, Fujitsu Limited ,  Nomoto, Ryuji, Fujitsu Limited ,  Onodera, Masanori, Fujitsu Limited ,  Kasai, Junichi, Fujitsu Limited

IPC分类号： H01L23/31 ,  H01L21/68

CPC分类号： H01L21/4832 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/67138 ,  H01L21/6833 ,  H01L23/3107 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L24/97 ,  H01L25/105 ,  H01L29/0657 ,  H01L2224/05554 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/4848 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/7865 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85664 ,  H01L2224/85986 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/3011 ,  H05K1/181 ,  H05K3/303 ,  H05K3/305 ,  H05K3/3436 ,  H05K3/3442 ,  H05K2201/09045 ,  H05K2201/10727 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A device includes a chip (111), and a resin package (112, 151, 314) sealing the chip, the resin package having resin projections (117, 154, 318) located on a mount-side surface of the resin package. Metallic films (113, 155, 315) are respectively provided to the resin projections. Connecting parts (118, 101, 163, 245, 313, 341, 342) electrically connect electrode pads of the chip and the metallic films.

摘要翻译： 一种器件包括芯片（111）和密封芯片的树脂封装（112,151,314），树脂封装具有位于树脂封装的安装侧表面上的树脂突起（117,154,318）。 金属膜（113,155,315）分别设置在树脂突起上。 连接部件（118,101,163,245,313,341,342）电连接芯片的电极焊盘和金属膜。