公开(公告)号：US08193559B2

公开(公告)日：2012-06-05

申请号：US13081642

申请日：2011-04-07

申请人： Oliver Haeberlen ,  Walter Rieger ,  Martin Vielemeyer ,  Lutz Goergens ,  Martin Poelzl ,  Milko Paolucci ,  Johannes Schoiswohl ,  Joachim Krumrey ,  Sonja Krumrey, legal representative

发明人： Oliver Haeberlen ,  Walter Rieger ,  Martin Vielemeyer ,  Lutz Goergens ,  Martin Poelzl ,  Milko Paolucci ,  Johannes Schoiswohl ,  Joachim Krumrey

IPC分类号： H01L29/66

CPC分类号： H01L23/495 ,  H01L21/823418 ,  H01L21/823475 ,  H01L21/823487 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/823885 ,  H01L23/492 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L27/088 ,  H01L27/092 ,  H01L27/0922 ,  H01L28/40 ,  H01L29/04 ,  H01L29/0653 ,  H01L29/0856 ,  H01L29/407 ,  H01L29/41 ,  H01L29/41741 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/66734 ,  H01L29/7803 ,  H01L29/7806 ,  H01L29/7809 ,  H01L29/781 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7835 ,  H01L2224/40247 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/37099

摘要： One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side of the semiconductor die, respectively. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side of the semiconductor die opposite to the first side, respectively. The contact areas of the drain of the first n-type channel FET, of the gate of the first n-type channel FET, of the source of the second n-type channel FET and of the gate of the second n-type channel FET are electrically separated from each other, respectively.

摘要翻译： 一个方面是单片半导体开关和制造方法。 一个实施例提供具有第一n型沟道FET和第二n型沟道FET的半导体管芯。 第一n型沟道FET的源极和第二n型沟道FET的漏极分别电耦合到半导体管芯的第一侧的至少一个接触区域。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极电耦合到接触区域 半导体管芯的与第一侧相对的第二侧。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极的接触面积 分别电分离。

公开(公告)号：US08907340B2

公开(公告)日：2014-12-09

申请号：US13241627

申请日：2011-09-23

申请人： Franz Hirler ,  Walter Rieger ,  Lutz Goergens ,  Helmut Angerer ,  Gianmauro Pozzovivo ,  Markus Zundel

发明人： Franz Hirler ,  Walter Rieger ,  Lutz Goergens ,  Helmut Angerer ,  Gianmauro Pozzovivo ,  Markus Zundel

IPC分类号： H01L23/58 ,  H01L27/06 ,  B82Y10/00 ,  H01L27/22 ,  H01L43/06 ,  H01L29/778

CPC分类号： B82Y10/00 ,  H01L27/0617 ,  H01L27/22 ,  H01L29/7787 ,  H01L43/065

摘要： A semiconductor arrangement includes a semiconductor body and a semiconductor device, the semiconductor device including first and second load terminals arranged distant to each other in a first direction of the semiconductor body and a load path arranged in the semiconductor body between the first and second load terminals. The semiconductor arrangement further includes at least one Hall sensor arranged in the semiconductor body distant to the semiconductor device in a second direction perpendicular to the first direction. The Hall sensor includes two current supply terminals and two measurement terminals.

摘要翻译： 半导体装置包括半导体本体和半导体器件，所述半导体器件包括在所述半导体本体的第一方向上彼此远离布置的第一和第二负载端子以及布置在所述半导体本体中的所述第一和第二负载端子之间的负载路径 。 半导体装置还包括至少一个霍尔传感器，该霍尔传感器在垂直于第一方向的第二方向上布置在远离半导体器件的半导体本体中。 霍尔传感器包括两个电源端子和两个测量端子。

公开(公告)号：US20090086512A1

公开(公告)日：2009-04-02

申请号：US11864024

申请日：2007-09-28

申请人： Marc Fahlenkamp ,  Harald Zoellinger ,  Gerald Deboy ,  Lutz Goergens

发明人： Marc Fahlenkamp ,  Harald Zoellinger ,  Gerald Deboy ,  Lutz Goergens

IPC分类号： H02M3/335

CPC分类号： H02M3/33592 ,  Y02B70/1475

摘要： An apparatus, comprising a transformer comprising a first winding and a second winding; a first switch coupled to the first winding and configured to alternate between an off state and an on state in response to a pulsed first signal; a rectifier coupled to the second winding and configured to alternate between an off state and an on state in response to a pulsed second signal; and a drive circuit configured to generate the first and second signals such that the first switch and the rectifier are switched to the on state in a temporally offset relation with each other.

摘要翻译： 一种装置，包括：变压器，包括第一绕组和第二绕组; 第一开关，其耦合到所述第一绕组并且被配置为响应于脉冲的第一信号而在断开状态和导通状态之间交替; 耦合到所述第二绕组并被配置为响应于脉冲的第二信号而在断开状态和导通状态之间交替的整流器; 以及驱动电路，被配置为产生第一和第二信号，使得第一开关和整流器彼此以时间上偏移的关系切换到导通状态。

公开(公告)号：US08031498B2

公开(公告)日：2011-10-04

申请号：US11773710

申请日：2007-07-05

申请人： Gerald Deboy ,  Lutz Goergens

发明人： Gerald Deboy ,  Lutz Goergens

IPC分类号： H02M7/217

CPC分类号： H03K17/06 ,  H03K17/6877 ,  H03K17/74

摘要： An active diode is disclosed. One embodiment provides a method for operating a device. The electronic device includes a transistor connected between a first and a second connection of the electronic device; a control device coupled to a control connection of the transistor; and an energy storage device coupled to the control device.

摘要翻译： 公开了一种有源二极管。 一个实施例提供了一种用于操作设备的方法。 电子设备包括连接在电子设备的第一和第二连接之间的晶体管; 耦合到所述晶体管的控制连接的控制装置; 以及耦合到所述控制装置的能量存储装置。

公开(公告)号：US08946767B2

公开(公告)日：2015-02-03

申请号：US13487999

申请日：2012-06-04

申请人： Oliver Haeberlen ,  Walter Rieger ,  Martin Vielemeyer ,  Lutz Goergens ,  Martin Poelzl ,  Milko Paolucci ,  Johannes Schoiswohl ,  Sonja Krumrey

发明人： Oliver Haeberlen ,  Walter Rieger ,  Martin Vielemeyer ,  Lutz Goergens ,  Martin Poelzl ,  Milko Paolucci ,  Johannes Schoiswohl ,  Joachim Krumrey

IPC分类号： H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/8238 ,  H01L49/02 ,  H01L23/492 ,  H01L23/00 ,  H01L23/495 ,  H01L27/092 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/41 ,  H01L29/06 ,  H01L29/04 ,  H01L29/40

CPC分类号： H01L23/495 ,  H01L21/823418 ,  H01L21/823475 ,  H01L21/823487 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/823885 ,  H01L23/492 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L27/088 ,  H01L27/092 ,  H01L27/0922 ,  H01L28/40 ,  H01L29/04 ,  H01L29/0653 ,  H01L29/0856 ,  H01L29/407 ,  H01L29/41 ,  H01L29/41741 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/66734 ,  H01L29/7803 ,  H01L29/7806 ,  H01L29/7809 ,  H01L29/781 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7835 ,  H01L2224/40247 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/37099

摘要： A semiconductor device and method are disclosed. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side. Contact areas of the first n-type channel FET and the second n-type channel FET are electrically separated from each other.

摘要翻译： 公开了半导体器件和方法。 一个实施例提供具有第一n型沟道FET和第二n型沟道FET的半导体管芯。 第一n型沟道FET的源极和第二n型沟道FET的漏极电耦合到第一侧的至少一个接触区域。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极电耦合到接触区域 第二面。 第一n型沟道FET和第二n型沟道FET的接触区域彼此电分离。

公开(公告)号：US08853776B2

公开(公告)日：2014-10-07

申请号：US13238576

申请日：2011-09-21

申请人： Franz Hirler ,  Lutz Goergens ,  Martin Feldtkeller

发明人： Franz Hirler ,  Lutz Goergens ,  Martin Feldtkeller

IPC分类号： H01L29/772 ,  H01L29/739 ,  H01L29/78 ,  H01L29/06 ,  H01L29/40 ,  H01L29/417

CPC分类号： H01L29/0623 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/7817 ,  H01L29/782 ,  H01L29/7828 ,  H01L29/7831 ,  H01L29/7832 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electronic circuit includes a transistor device that can be operated in a reverse operation mode and a control circuit. The transistor device includes a source region, a drain region, a body region and a drift region, a source electrode electrically connected to the source region, a pn junction formed between the body region and the drift region, a gate electrode adjacent the body region and dielectrically insulated from the body region, and a depletion control structure adjacent the drift region. The depletion control structure has a control terminal and is configured to generate a depletion region in the drift region dependent on a drive signal received at the control terminal. The control circuit is coupled to the control terminal of the depletion control structure and configured to drive the depletion control structure to generate the depletion region when the transistor device is operated in the reverse operation mode.

摘要翻译： 电子电路包括可以以反向操作模式操作的晶体管器件和控制电路。 晶体管器件包括源极区域，漏极区域，体区域和漂移区域，与源极区域电连接的源极电极，在体区域和漂移区域之间形成的pn结，邻近体区域的栅电极 并且与身体区域介电绝缘，以及与漂移区域相邻的耗尽控制结构。 耗尽控制结构具有控制端子，并且被配置成取决于在控制端子处接收到的驱动信号而在漂移区域中产生耗尽区域。 控制电路耦合到耗尽控制结构的控制端，并且被配置为当晶体管器件以反向操作模式工作时驱动耗尽控制结构以产生耗尽区。

公开(公告)号：US20130069710A1

公开(公告)日：2013-03-21

申请号：US13238576

申请日：2011-09-21

申请人： Franz Hirler ,  Lutz Goergens ,  Martin Feldtkeller

发明人： Franz Hirler ,  Lutz Goergens ,  Martin Feldtkeller

IPC分类号： H03K3/313

CPC分类号： H01L29/0623 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/7803 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/7817 ,  H01L29/782 ,  H01L29/7828 ,  H01L29/7831 ,  H01L29/7832 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electronic circuit includes a transistor device that can be operated in a reverse operation mode and a control circuit. The transistor device includes a source region, a drain region, a body region and a drift region, a source electrode electrically connected to the source region, a pn junction formed between the body region and the drift region, a gate electrode adjacent the body region and dielectrically insulated from the body region, and a depletion control structure adjacent the drift region. The depletion control structure has a control terminal and is configured to generate a depletion region in the drift region dependent on a drive signal received at the control terminal. The control circuit is coupled to the control terminal of the depletion control structure and configured to drive the depletion control structure to generate the depletion region when the transistor device is operated in the reverse operation mode.

摘要翻译： 电子电路包括可以以反向操作模式操作的晶体管器件和控制电路。 晶体管器件包括源极区域，漏极区域，体区域和漂移区域，与源极区域电连接的源极电极，在体区域和漂移区域之间形成的pn结，邻近体区域的栅电极 并且与身体区域介电绝缘，以及与漂移区域相邻的耗尽控制结构。 耗尽控制结构具有控制端子，并且被配置成取决于在控制端子处接收到的驱动信号而在漂移区域中产生耗尽区域。 控制电路耦合到耗尽控制结构的控制端，并且被配置为当晶体管器件以反向操作模式工作时驱动耗尽控制结构以产生耗尽区。

公开(公告)号：US07943955B2

公开(公告)日：2011-05-17

申请号：US12360263

申请日：2009-01-27

申请人： Oliver Haeberlen ,  Walter Rieger ,  Lutz Goergens ,  Martin Poelzl ,  Johannes Schoiswohl ,  Joachim Krumrey

发明人： Oliver Haeberlen ,  Walter Rieger ,  Lutz Goergens ,  Martin Poelzl ,  Johannes Schoiswohl ,  Joachim Krumrey

IPC分类号： H01L29/66

CPC分类号： H01L29/7813 ,  H01L21/823418 ,  H01L21/823475 ,  H01L21/823487 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/823885 ,  H01L23/492 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L27/088 ,  H01L27/092 ,  H01L27/0922 ,  H01L29/04 ,  H01L29/0856 ,  H01L29/407 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/781 ,  H01L29/7827 ,  H01L29/7835 ,  H01L2224/40245 ,  H01L2224/451 ,  H01L2224/48247 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

摘要： One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides one semiconductor die with a first and a second FET. One of source/drain of the first FET and one of source/drain of the second FET are electrically coupled to at least one contact area at a first side of one semiconductor die, respectively. The other one of source/drain of the first FET, a gate of the first FET, the other one of source/drain of the second FET and the gate of the second FET are electrically coupled to contact areas at a second side of the one semiconductor die opposite to the first side, respectively. The contact areas of the other one of source/drain of the first FET, of the gate of the first FET, of the other one of source/drain of the second FET and of the gate of the second FET are electrically separated from each other, respectively.

摘要翻译： 一个方面是单片半导体开关和制造方法。 一个实施例提供具有第一和第二FET的一个半导体管芯。 第一FET的源极/漏极之一和第二FET的源极/漏极之一分别电耦合到一个半导体晶粒的第一侧上的至少一个接触区域。 第一FET的源极/漏极中的另一个，第一FET的栅极，第二FET的源极/漏极和第二FET的栅极中的另一个电耦合到第一FET的第二侧的接触区域 半导体管芯分别与第一侧相对。 第一FET的源极/漏极，第一FET的栅极，第二FET的源极/漏极和第二FET的栅极之间的另一个的接触区域彼此电分离 ， 分别。

公开(公告)号：US20100187605A1

公开(公告)日：2010-07-29

申请号：US12360263

申请日：2009-01-27

申请人： Oliver Haeberlen ,  Walter Rieger ,  Lutz Goergens ,  Martin Poelzl ,  Johannes Schoiswohl ,  Joachim Krumrey

发明人： Oliver Haeberlen ,  Walter Rieger ,  Lutz Goergens ,  Martin Poelzl ,  Johannes Schoiswohl ,  Joachim Krumrey

IPC分类号： H01L27/06 ,  H01L23/495 ,  H01L21/8234 ,  H01L21/50

CPC分类号： H01L29/7813 ,  H01L21/823418 ,  H01L21/823475 ,  H01L21/823487 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/823885 ,  H01L23/492 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L27/088 ,  H01L27/092 ,  H01L27/0922 ,  H01L29/04 ,  H01L29/0856 ,  H01L29/407 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/781 ,  H01L29/7827 ,  H01L29/7835 ,  H01L2224/40245 ,  H01L2224/451 ,  H01L2224/48247 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

摘要： One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides one semiconductor die with a first and a second FET. One of source/drain of the first FET and one of source/drain of the second FET are electrically coupled to at least one contact area at a first side of one semiconductor die, respectively. The other one of source/drain of the first FET, a gate of the first FET, the other one of source/drain of the second FET and the gate of the second FET are electrically coupled to contact areas at a second side of the one semiconductor die opposite to the first side, respectively. The contact areas of the other one of source/drain of the first FET, of the gate of the first FET, of the other one of source/drain of the second FET and of the gate of the second FET are electrically separated from each other, respectively.

摘要翻译： 一个方面是单片半导体开关和制造方法。 一个实施例提供具有第一和第二FET的一个半导体管芯。 第一FET的源极/漏极之一和第二FET的源极/漏极之一分别电耦合到一个半导体晶粒的第一侧上的至少一个接触区域。 第一FET的源极/漏极中的另一个，第一FET的栅极，第二FET的源极/漏极和第二FET的栅极中的另一个电耦合到第一FET的第二侧的接触区域 半导体管芯分别与第一侧相对。 第一FET的源极/漏极，第一FET的栅极，第二FET的源极/漏极和第二FET的栅极之间的另一个的接触区域彼此电分离 ， 分别。

公开(公告)号：US20130140673A1

公开(公告)日：2013-06-06

申请号：US13487999

申请日：2012-06-04

申请人： Oliver Haeberlen ,  Walter Rieger ,  Martin Vielemeyer ,  Lutz Goergens ,  Martin Poelzl ,  Milko Paolucci ,  Johannes Schoiswohl ,  Joachim Krumrey

发明人： Oliver Haeberlen ,  Walter Rieger ,  Martin Vielemeyer ,  Lutz Goergens ,  Martin Poelzl ,  Milko Paolucci ,  Johannes Schoiswohl ,  Joachim Krumrey

IPC分类号： H01L23/495

CPC分类号： H01L23/495 ,  H01L21/823418 ,  H01L21/823475 ,  H01L21/823487 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/823885 ,  H01L23/492 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L27/088 ,  H01L27/092 ,  H01L27/0922 ,  H01L28/40 ,  H01L29/04 ,  H01L29/0653 ,  H01L29/0856 ,  H01L29/407 ,  H01L29/41 ,  H01L29/41741 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/66734 ,  H01L29/7803 ,  H01L29/7806 ,  H01L29/7809 ,  H01L29/781 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7835 ,  H01L2224/40247 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/37099

摘要： A semiconductor device and method are disclosed. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side. Contact areas of the first n-type channel FET and the second n-type channel FET are electrically separated from each other.

摘要翻译： 公开了半导体器件和方法。 一个实施例提供具有第一n型沟道FET和第二n型沟道FET的半导体管芯。 第一n型沟道FET的源极和第二n型沟道FET的漏极电耦合到第一侧的至少一个接触区域。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极电耦合到接触区域 第二面。 第一n型沟道FET和第二n型沟道FET的接触区域彼此电分离。