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公开(公告)号：US08193559B2
公开(公告)日：2012-06-05
申请号：US13081642
申请日：2011-04-07
申请人： Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Joachim Krumrey , Sonja Krumrey, legal representative
发明人： Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Joachim Krumrey
IPC分类号： H01L29/66
CPC分类号： H01L23/495 , H01L21/823418 , H01L21/823475 , H01L21/823487 , H01L21/823814 , H01L21/823871 , H01L21/823885 , H01L23/492 , H01L23/49524 , H01L23/49562 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/73 , H01L27/088 , H01L27/092 , H01L27/0922 , H01L28/40 , H01L29/04 , H01L29/0653 , H01L29/0856 , H01L29/407 , H01L29/41 , H01L29/41741 , H01L29/4175 , H01L29/41766 , H01L29/66734 , H01L29/7803 , H01L29/7806 , H01L29/7809 , H01L29/781 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/7835 , H01L2224/40247 , H01L2224/48091 , H01L2224/48247 , H01L2224/73219 , H01L2224/73221 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13064 , H01L2924/13091 , H01L2924/19041 , H01L2924/19043 , H01L2924/19104 , H01L2924/30105 , H01L2924/30107 , H01L2224/45099 , H01L2924/00 , H01L2224/37099
摘要： One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side of the semiconductor die, respectively. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side of the semiconductor die opposite to the first side, respectively. The contact areas of the drain of the first n-type channel FET, of the gate of the first n-type channel FET, of the source of the second n-type channel FET and of the gate of the second n-type channel FET are electrically separated from each other, respectively.
摘要翻译： 一个方面是单片半导体开关和制造方法。 一个实施例提供具有第一n型沟道FET和第二n型沟道FET的半导体管芯。 第一n型沟道FET的源极和第二n型沟道FET的漏极分别电耦合到半导体管芯的第一侧的至少一个接触区域。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极电耦合到接触区域 半导体管芯的与第一侧相对的第二侧。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极的接触面积 分别电分离。
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公开(公告)号：US08946767B2
公开(公告)日：2015-02-03
申请号：US13487999
申请日：2012-06-04
申请人： Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Sonja Krumrey
发明人： Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Joachim Krumrey
IPC分类号： H01L29/66 , H01L29/417 , H01L29/78 , H01L21/8238 , H01L49/02 , H01L23/492 , H01L23/00 , H01L23/495 , H01L27/092 , H01L27/088 , H01L21/8234 , H01L29/08 , H01L29/41 , H01L29/06 , H01L29/04 , H01L29/40
CPC分类号： H01L23/495 , H01L21/823418 , H01L21/823475 , H01L21/823487 , H01L21/823814 , H01L21/823871 , H01L21/823885 , H01L23/492 , H01L23/49524 , H01L23/49562 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/73 , H01L27/088 , H01L27/092 , H01L27/0922 , H01L28/40 , H01L29/04 , H01L29/0653 , H01L29/0856 , H01L29/407 , H01L29/41 , H01L29/41741 , H01L29/4175 , H01L29/41766 , H01L29/66734 , H01L29/7803 , H01L29/7806 , H01L29/7809 , H01L29/781 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/7835 , H01L2224/40247 , H01L2224/48091 , H01L2224/48247 , H01L2224/73219 , H01L2224/73221 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13064 , H01L2924/13091 , H01L2924/19041 , H01L2924/19043 , H01L2924/19104 , H01L2924/30105 , H01L2924/30107 , H01L2224/45099 , H01L2924/00 , H01L2224/37099
摘要： A semiconductor device and method are disclosed. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side. Contact areas of the first n-type channel FET and the second n-type channel FET are electrically separated from each other.
摘要翻译： 公开了半导体器件和方法。 一个实施例提供具有第一n型沟道FET和第二n型沟道FET的半导体管芯。 第一n型沟道FET的源极和第二n型沟道FET的漏极电耦合到第一侧的至少一个接触区域。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极电耦合到接触区域 第二面。 第一n型沟道FET和第二n型沟道FET的接触区域彼此电分离。
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公开(公告)号：US20110241170A1
公开(公告)日：2011-10-06
申请号：US13081642
申请日：2011-04-07
申请人： Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Joachim Krumrey , Sonja Krumrey
发明人： Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Joachim Krumrey , Sonja Krumrey
CPC分类号： H01L23/495 , H01L21/823418 , H01L21/823475 , H01L21/823487 , H01L21/823814 , H01L21/823871 , H01L21/823885 , H01L23/492 , H01L23/49524 , H01L23/49562 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/73 , H01L27/088 , H01L27/092 , H01L27/0922 , H01L28/40 , H01L29/04 , H01L29/0653 , H01L29/0856 , H01L29/407 , H01L29/41 , H01L29/41741 , H01L29/4175 , H01L29/41766 , H01L29/66734 , H01L29/7803 , H01L29/7806 , H01L29/7809 , H01L29/781 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/7835 , H01L2224/40247 , H01L2224/48091 , H01L2224/48247 , H01L2224/73219 , H01L2224/73221 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13064 , H01L2924/13091 , H01L2924/19041 , H01L2924/19043 , H01L2924/19104 , H01L2924/30105 , H01L2924/30107 , H01L2224/45099 , H01L2924/00 , H01L2224/37099
摘要： One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side of the semiconductor die, respectively. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side of the semiconductor die opposite to the first side, respectively. The contact areas of the drain of the first n-type channel FET, of the gate of the first n-type channel FET, of the source of the second n-type channel FET and of the gate of the second n-type channel FET are electrically separated from each other, respectively.
摘要翻译： 一个方面是单片半导体开关和制造方法。 一个实施例提供具有第一n型沟道FET和第二n型沟道FET的半导体管芯。 第一n型沟道FET的源极和第二n型沟道FET的漏极分别电耦合到半导体管芯的第一侧的至少一个接触区域。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极电耦合到接触区域 半导体管芯的与第一侧相对的第二侧。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极的接触面积 分别电分离。
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公开(公告)号：US20130140673A1
公开(公告)日：2013-06-06
申请号：US13487999
申请日：2012-06-04
申请人： Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Joachim Krumrey
发明人： Oliver Haeberlen , Walter Rieger , Martin Vielemeyer , Lutz Goergens , Martin Poelzl , Milko Paolucci , Johannes Schoiswohl , Joachim Krumrey
IPC分类号： H01L23/495
CPC分类号： H01L23/495 , H01L21/823418 , H01L21/823475 , H01L21/823487 , H01L21/823814 , H01L21/823871 , H01L21/823885 , H01L23/492 , H01L23/49524 , H01L23/49562 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/73 , H01L27/088 , H01L27/092 , H01L27/0922 , H01L28/40 , H01L29/04 , H01L29/0653 , H01L29/0856 , H01L29/407 , H01L29/41 , H01L29/41741 , H01L29/4175 , H01L29/41766 , H01L29/66734 , H01L29/7803 , H01L29/7806 , H01L29/7809 , H01L29/781 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/7835 , H01L2224/40247 , H01L2224/48091 , H01L2224/48247 , H01L2224/73219 , H01L2224/73221 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13064 , H01L2924/13091 , H01L2924/19041 , H01L2924/19043 , H01L2924/19104 , H01L2924/30105 , H01L2924/30107 , H01L2224/45099 , H01L2924/00 , H01L2224/37099
摘要： A semiconductor device and method are disclosed. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side. Contact areas of the first n-type channel FET and the second n-type channel FET are electrically separated from each other.
摘要翻译： 公开了半导体器件和方法。 一个实施例提供具有第一n型沟道FET和第二n型沟道FET的半导体管芯。 第一n型沟道FET的源极和第二n型沟道FET的漏极电耦合到第一侧的至少一个接触区域。 第一n型沟道FET的漏极，第一n型沟道FET的栅极，第二n型沟道FET的源极和第二n型沟道FET的栅极电耦合到接触区域 第二面。 第一n型沟道FET和第二n型沟道FET的接触区域彼此电分离。
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公开(公告)号：US07943955B2
公开(公告)日：2011-05-17
申请号：US12360263
申请日：2009-01-27
申请人： Oliver Haeberlen , Walter Rieger , Lutz Goergens , Martin Poelzl , Johannes Schoiswohl , Joachim Krumrey
发明人： Oliver Haeberlen , Walter Rieger , Lutz Goergens , Martin Poelzl , Johannes Schoiswohl , Joachim Krumrey
IPC分类号： H01L29/66
CPC分类号： H01L29/7813 , H01L21/823418 , H01L21/823475 , H01L21/823487 , H01L21/823814 , H01L21/823871 , H01L21/823885 , H01L23/492 , H01L23/49524 , H01L23/49562 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/73 , H01L27/088 , H01L27/092 , H01L27/0922 , H01L29/04 , H01L29/0856 , H01L29/407 , H01L29/4175 , H01L29/41766 , H01L29/66734 , H01L29/7806 , H01L29/781 , H01L29/7827 , H01L29/7835 , H01L2224/40245 , H01L2224/451 , H01L2224/48247 , H01L2224/73219 , H01L2224/73221 , H01L2224/84801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12032 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13064 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19104 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/37099
摘要： One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides one semiconductor die with a first and a second FET. One of source/drain of the first FET and one of source/drain of the second FET are electrically coupled to at least one contact area at a first side of one semiconductor die, respectively. The other one of source/drain of the first FET, a gate of the first FET, the other one of source/drain of the second FET and the gate of the second FET are electrically coupled to contact areas at a second side of the one semiconductor die opposite to the first side, respectively. The contact areas of the other one of source/drain of the first FET, of the gate of the first FET, of the other one of source/drain of the second FET and of the gate of the second FET are electrically separated from each other, respectively.
摘要翻译： 一个方面是单片半导体开关和制造方法。 一个实施例提供具有第一和第二FET的一个半导体管芯。 第一FET的源极/漏极之一和第二FET的源极/漏极之一分别电耦合到一个半导体晶粒的第一侧上的至少一个接触区域。 第一FET的源极/漏极中的另一个，第一FET的栅极，第二FET的源极/漏极和第二FET的栅极中的另一个电耦合到第一FET的第二侧的接触区域 半导体管芯分别与第一侧相对。 第一FET的源极/漏极，第一FET的栅极，第二FET的源极/漏极和第二FET的栅极之间的另一个的接触区域彼此电分离 ， 分别。
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公开(公告)号：US20100187605A1
公开(公告)日：2010-07-29
申请号：US12360263
申请日：2009-01-27
申请人： Oliver Haeberlen , Walter Rieger , Lutz Goergens , Martin Poelzl , Johannes Schoiswohl , Joachim Krumrey
发明人： Oliver Haeberlen , Walter Rieger , Lutz Goergens , Martin Poelzl , Johannes Schoiswohl , Joachim Krumrey
IPC分类号： H01L27/06 , H01L23/495 , H01L21/8234 , H01L21/50
CPC分类号： H01L29/7813 , H01L21/823418 , H01L21/823475 , H01L21/823487 , H01L21/823814 , H01L21/823871 , H01L21/823885 , H01L23/492 , H01L23/49524 , H01L23/49562 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/73 , H01L27/088 , H01L27/092 , H01L27/0922 , H01L29/04 , H01L29/0856 , H01L29/407 , H01L29/4175 , H01L29/41766 , H01L29/66734 , H01L29/7806 , H01L29/781 , H01L29/7827 , H01L29/7835 , H01L2224/40245 , H01L2224/451 , H01L2224/48247 , H01L2224/73219 , H01L2224/73221 , H01L2224/84801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12032 , H01L2924/1305 , H01L2924/1306 , H01L2924/13062 , H01L2924/13064 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19104 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/37099
摘要： One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides one semiconductor die with a first and a second FET. One of source/drain of the first FET and one of source/drain of the second FET are electrically coupled to at least one contact area at a first side of one semiconductor die, respectively. The other one of source/drain of the first FET, a gate of the first FET, the other one of source/drain of the second FET and the gate of the second FET are electrically coupled to contact areas at a second side of the one semiconductor die opposite to the first side, respectively. The contact areas of the other one of source/drain of the first FET, of the gate of the first FET, of the other one of source/drain of the second FET and of the gate of the second FET are electrically separated from each other, respectively.
摘要翻译： 一个方面是单片半导体开关和制造方法。 一个实施例提供具有第一和第二FET的一个半导体管芯。 第一FET的源极/漏极之一和第二FET的源极/漏极之一分别电耦合到一个半导体晶粒的第一侧上的至少一个接触区域。 第一FET的源极/漏极中的另一个，第一FET的栅极，第二FET的源极/漏极和第二FET的栅极中的另一个电耦合到第一FET的第二侧的接触区域 半导体管芯分别与第一侧相对。 第一FET的源极/漏极，第一FET的栅极，第二FET的源极/漏极和第二FET的栅极之间的另一个的接触区域彼此电分离 ， 分别。
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公开(公告)号：US20130062706A1
公开(公告)日：2013-03-14
申请号：US13232803
申请日：2011-09-14
IPC分类号： H01L29/772 , H01L29/02
CPC分类号： H01L25/50 , H01L23/32 , H01L23/64 , H01L25/16 , H01L2924/0002 , H01L2924/19103 , H01L2924/00
摘要： An electronic module includes a first semiconductor chip and a passive component, wherein the first semiconductor chip is arranged on a surface of the passive component.
摘要翻译： 电子模块包括第一半导体芯片和无源部件，其中第一半导体芯片布置在无源部件的表面上。
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公开(公告)号：US09070642B2
公开(公告)日：2015-06-30
申请号：US13232803
申请日：2011-09-14
CPC分类号： H01L25/50 , H01L23/32 , H01L23/64 , H01L25/16 , H01L2924/0002 , H01L2924/19103 , H01L2924/00
摘要： An electronic module includes a first semiconductor chip and a passive component, wherein the first semiconductor chip is arranged on a surface of the passive component.
摘要翻译： 电子模块包括第一半导体芯片和无源部件，其中第一半导体芯片布置在无源部件的表面上。
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