公开(公告)号：US20080052507A1

公开(公告)日：2008-02-28

申请号：US11838192

申请日：2007-08-13

申请人： David Chow ,  Charles Lee ,  Frank Yu ,  Tzu-Yih Chu ,  Ming-Shiang Shen

发明人： David Chow ,  Charles Lee ,  Frank Yu ,  Tzu-Yih Chu ,  Ming-Shiang Shen

IPC分类号： G06F13/38 ,  G06F1/24 ,  G06F21/00 ,  G06F9/06

CPC分类号： G06F21/568 ,  G06F21/575 ,  G06F2221/2105 ,  G06F2221/2153

摘要： A multi-partition Universal Serial Bus (USB) device has a flash memory with multiple partitions of storage. Some partitions are for different operating systems and store OS images. Another partition has a control program while a user partition stores user data and user configuration information. The control program can test the multi-partition USB device and instruct the host computer BIOS to mount a partition from its flash memory as a drive of the host computer. The host computer can then be rebooted. The OS image from the flash memory is loaded into main memory during rebooting, and the host computer executes a new operating system using the new OS image. The user can press buttons on the multi-partition USB device to select which OS to load, and to begin rebooting. Virus removal programs in the alternate OS can help recover from a virus in the primary OS.

摘要翻译： 多分区通用串行总线（USB）设备具有具有多个存储分区的闪存。 一些分区用于不同的操作系统并存储操作系统映像。 另一个分区具有控制程序，而用户分区则存储用户数据和用户配置信息。 控制程序可以测试多分区USB设备，并指示主机BIOS将其闪存中的分区作为主机的驱动器安装。 然后可以重新启动主机。 重新启动时，闪存中的OS映像将加载到主内存中，主机使用新的操作系统映像执行新的操作系统。 用户可以按多分区USB设备上的按钮选择要加载的操作系统，并开始重新启动。 备用操作系统中的病毒清除程序可以帮助从主操作系统中的病毒恢复。

公开(公告)号：USRE40115E1

公开(公告)日：2008-02-26

申请号：US11106735

申请日：2005-04-13

申请人： Edward W. Lee ,  Ren-Kang Chiou ,  Tzu-Yih Chu

发明人： Edward W. Lee ,  Ren-Kang Chiou ,  Tzu-Yih Chu

IPC分类号： H01R12/00

CPC分类号： G06K19/07732 ,  G06K19/07733 ,  H01R24/62 ,  H01R27/02

摘要： A slim male Universal-Serial-Bus (USB) connector fits on only one side of the connector substrate in a standard female USB connector. Wobble or vertical play is reduced by locking depressions in the slim male USB connector that engage metal springs on a metal case that surrounds the female USB connector, locking the two connectors together. Between metal contacts on the slim USM connector are dividers that help fill in gaps when the two connectors are connected together, further reducing play. End rails on the slim USB connector fill in gaps on the sides. The connector substrate of the slim male USB connector can be separate or can be integrated with a circuit board that holds a flash memory chip and a USB controller chip. The connector is wider than the standard width for a better fit. A slim female USB connector for assembly use with the slim male USB connector is also disclosed.

摘要翻译： 通用串行总线（USB）连接器适合于通用串行总线（USB）连接器，适用于<？insert-start id =“INS-S-00001”date =“20080226”？> male <？insert-end id =“INS-S-00001”？ 仅在标准母USB连接器中的连接器基板的一侧。 摆动或垂直播放通过在细长状态下锁定凹陷来减少<？insert-start id =“INS-S-00002”date =“20080226”？> male <？insert-end id =“INS-S-00002”？> USB连接器，将金属弹簧接合在围绕母USB连接器的金属外壳上，将两个连接器锁定在一起。 在超薄USM连接器上的金属触点之间的分隔线有助于在两个连接器连接在一起时填补间隙，进一步减少播放。 超薄USB连接器上的端部导轨填充两侧的间隙。 USB连接器的连接器基板可以是单独的或者是可以分开的，这个连接器基板的尺寸<？insert-start id =“INS-S-00003”date =“20080226”？> male <？insert-end id =“INS-S-00003” 可以与保存闪存芯片和USB控制器芯片的电路板集成。 连接器比标准宽度更宽，更好的适合。 一个细长的母USB连接器，用于组装<？insert-start id =“INS-S-00004”date =“20080226”？>使用细长的公头USB？<？insert-end id =“INS-S-00004”？ 连接器也被公开。

公开(公告)号：US07243185B2

公开(公告)日：2007-07-10

申请号：US10818653

申请日：2004-04-05

申请人： Sun-Teck See ,  Tzu-Yih Chu ,  Horng-Yee Chou ,  Charles C. Lee

发明人： Sun-Teck See ,  Tzu-Yih Chu ,  Horng-Yee Chou ,  Charles C. Lee

IPC分类号： G06F12/00

CPC分类号： G06F13/161 ,  G06F12/0804 ,  G06F2212/2022 ,  G11C7/1015 ,  G11C2211/5641

摘要： A multi media card (MMC) is disclosed. The MMC includes a flash controller and at least one flash memory device. The flash controller increases the throughput of the at least one flash memory device to match the speed of a host bus coupled to the MMC. The flash controller increases the throughput by performing one or more of performing a read-ahead memory read operation, performing a write-ahead memory write operation, increasing the size of a page register of the at least one flash memory device, increasing the width of a memory data bus, performing a dual-channel concurrent memory read operation, performing a dual-channel concurrent memory write operation, performing a write-cache memory write operation, and any combination thereof.

摘要翻译： 公开了一种多媒体卡（MMC）。 MMC包括闪存控制器和至少一个闪存设备。 闪存控制器增加至少一个闪存设备的吞吐量以匹配耦合到MMC的主机总线的速度。 闪存控制器通过执行执行预读存储器读取操作，执行写入预先存储器写入操作，增加至少一个闪速存储器件的页面寄存器的大小中的一个或多个来增加吞吐量， 存储器数据总线，执行双通道并行存储器读取操作，执行双通道并行存储器写入操作，执行写入 - 高速缓冲存储器写入操作及其任何组合。

公开(公告)号：US20050223158A1

公开(公告)日：2005-10-06

申请号：US10818653

申请日：2004-04-05

申请人： Sun-Teck See ,  Tzu-Yih Chu ,  Horng-Yee Chou ,  Charles Lee

发明人： Sun-Teck See ,  Tzu-Yih Chu ,  Horng-Yee Chou ,  Charles Lee

IPC分类号： G06F12/00 ,  G06F13/16 ,  G11C7/10

CPC分类号： G06F13/161 ,  G06F12/0804 ,  G06F2212/2022 ,  G11C7/1015 ,  G11C2211/5641

摘要： A multi media card (MMC) is disclosed. The MMC includes a flash controller and at least one flash memory device. The flash controller increases the throughput of the at least one flash memory device to match the speed of a host bus coupled to the MMC. The flash controller increases the throughput by performing one or more of performing a read-ahead memory read operation, performing a write-ahead memory write operation, increasing the size of a page register of the at least one flash memory device, increasing the width of a memory data bus, performing a dual-channel concurrent memory read operation, performing a dual-channel concurrent memory write operation, performing a write-cache memory write operation, and any combination thereof.

摘要翻译： 公开了一种多媒体卡（MMC）。 MMC包括闪存控制器和至少一个闪存设备。 闪存控制器增加至少一个闪存设备的吞吐量以匹配耦合到MMC的主机总线的速度。 闪存控制器通过执行执行预读存储器读取操作，执行写入预先存储器写入操作，增加至少一个闪速存储器件的页面寄存器的大小中的一个或多个来增加吞吐量， 存储器数据总线，执行双通道并行存储器读取操作，执行双通道并行存储器写入操作，执行写入 - 高速缓冲存储器写入操作及其任何组合。

公开(公告)号：US20050142694A1

公开(公告)日：2005-06-30

申请号：US10707624

申请日：2003-12-24

申请人： Ren-Kang Chiou ,  Tzu-Yih Chu

发明人： Ren-Kang Chiou ,  Tzu-Yih Chu

IPC分类号： H01L21/30 ,  H01L21/301 ,  H01L21/44 ,  H01L21/46 ,  H01L21/48 ,  H01L21/50 ,  H01L21/76 ,  H01L21/78 ,  H01L25/10 ,  H05K1/18

CPC分类号： H01L25/105 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/181 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10689 ,  H05K2201/10924 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Memory chips are assembled into a stack with an insertion-pin frame between pins of two stacked memory chips. The insertion-pin frame is not bent or formed into 3-dimensional shapes but is flat, improving use in standard surface-mount processes such as solder printing onto the insertion-pin frame. Flat insertion pins held to the flat insertion-pin frame by necks are soldered to top shoulders of pins on a lower chip. Then bottom feet of pins of an upper chip are soldered to the insertion pins. The necks are punched away or broken to release the insertion-pin frame from the insertion pins that are soldered to the assembled stacked chips. An insulated wire jumper can be placed under the pins to jumper chip-select connections, or a bridge between insertion pins can be formed from the insertion-pin frame. Holding tabs to the bridge are removed with the insertion pins or by punching.

摘要翻译： 存储器芯片组装成具有在两个堆叠的存储器芯片的引脚之间的插入引脚框架的堆叠。 插入销框架不弯曲或形成三维形状，但是平坦，改善了在标准表面贴装工艺（例如焊接印刷到插针框架上）的使用。 通过颈部将扁平插入销固定到扁平插入架框架上焊接到下部芯片上的针脚顶部。 然后将上部芯片的引脚的底脚焊接到插入引脚。 颈部被冲掉或破裂，以将插入销框架从焊接到组装的堆叠芯片上的插入销释放。 绝缘跳线可以放置在引脚下方跳线芯片选择连接，也可以从插针框架形成插入插脚之间的桥。 通过插销或冲孔将保持接头连接到桥上。

公开(公告)号：US06874044B1

公开(公告)日：2005-03-29

申请号：US10605140

申请日：2003-09-10

申请人： Horng-Yee Chou ,  Sun-Teck See ,  Tzu-Yih Chu

发明人： Horng-Yee Chou ,  Sun-Teck See ,  Tzu-Yih Chu

IPC分类号： G06F3/00 ,  G06F3/06 ,  G06F13/00 ,  G06F13/12 ,  G06F13/38 ,  G11C16/10

CPC分类号： G06F13/387 ,  G11C16/102

摘要： A flash-drive or flash-card reader connects to a personal computer (PC) through a serial link such as a Universal-Serial-Bus (USB), IEEE 1394, SATA, or IDE. A local CPU acts as the bus master of a CPU bus that connects to slave ports on a flash-memory controller, a serial engine, and a RAM buffer. A second bus in parallel to the CPU bus connects a second slave port on the RAM buffer to a master port on the flash-memory controller and to a master port on the serial engine. The flash-memory controller or the serial engine can use their master ports to transfer data to and from the RAM buffer using the second bus, allowing the CPU to retain control of the CPU bus. The second bus is a flash-serial buffer bus that improves data transfer rates. The flash-memory controller can prefetch into the RAM buffer.

摘要翻译： 闪存驱动器或闪存卡读卡器通过串行链路（例如通用串行总线（USB），IEEE 1394，SATA或IDE）连接到个人计算机（PC）。 本地CPU作为连接闪存控制器，串行引擎和RAM缓冲区的从站端口的CPU总线的总线主机。 与CPU总线并行的第二个总线将RAM缓冲器上的第二个从站端口连接到闪存控制器上的主站和串行引擎上的主站。 闪存控制器或串行引擎可以使用其主端口使用第二个总线将数据传输到RAM缓冲区，并允许CPU保留对CPU总线的控制。 第二个总线是提供数据传输速率的闪存串行缓冲区总线。 闪存控制器可以预取入RAM缓冲区。

公开(公告)号：US20050055481A1

公开(公告)日：2005-03-10

申请号：US10605140

申请日：2003-09-10

申请人： Horng-Yee Chou ,  Sun-Teck See ,  Tzu-Yih Chu

发明人： Horng-Yee Chou ,  Sun-Teck See ,  Tzu-Yih Chu

IPC分类号： G06F3/00 ,  G06F3/06 ,  G06F13/00 ,  G06F13/12 ,  G06F13/38 ,  G11C16/10

CPC分类号： G06F13/387 ,  G11C16/102

摘要： A flash-drive or flash-card reader connects to a personal computer (PC) through a serial link such as a Universal-Serial-Bus (USB), IEEE 1394, SATA, or IDE. A local CPU acts as the bus master of a CPU bus that connects to slave ports on a flash-memory controller, a serial engine, and a RAM buffer. A second bus in parallel to the CPU bus connects a second slave port on the RAM buffer to a master port on the flash-memory controller and to a master port on the serial engine. The flash-memory controller or the serial engine can use their master ports to transfer data to and from the RAM buffer using the second bus, allowing the CPU to retain control of the CPU bus. The second bus is a flash-serial buffer bus that improves data transfer rates. The flash-memory controller can prefetch into the RAM buffer.

摘要翻译： 闪存驱动器或闪存卡读卡器通过串行链路（例如通用串行总线（USB），IEEE 1394，SATA或IDE）连接到个人计算机（PC）。 本地CPU作为连接闪存控制器，串行引擎和RAM缓冲区的从站端口的CPU总线的总线主机。 与CPU总线并行的第二个总线将RAM缓冲器上的第二个从站端口连接到闪存控制器上的主站和串行引擎上的主站。 闪存控制器或串行引擎可以使用其主端口使用第二个总线将数据传输到RAM缓冲区，并允许CPU保留对CPU总线的控制。 第二个总线是提供数据传输速率的闪存串行缓冲区总线。 闪存控制器可以预取入RAM缓冲区。

公开(公告)号：US06854984B1

公开(公告)日：2005-02-15

申请号：US10605146

申请日：2003-09-11

申请人： Edward W. Lee ,  Ren-Kang Chiou ,  Tzu-Yih Chu

发明人： Edward W. Lee ,  Ren-Kang Chiou ,  Tzu-Yih Chu

IPC分类号： H01R12/00 ,  H01R13/627 ,  H01R24/00 ,  H01R33/00

CPC分类号： G06K19/07732 ,  G06K19/07733 ,  H01R24/62 ,  H01R27/02

摘要： A slim Universal-Serial-Bus (USB) connector fits on only one side of the connector substrate in a standard female USB connector. Wobble or vertical play is reduced by locking depressions in the slim USB connector that engage metal springs on a metal case that surrounds the female USB connector, locking the two connectors together. Between metal contacts on the slim USM connector are dividers that help fill in gaps when the two connectors are connected together, further reducing play. End rails on the slim USB connector fill in gaps on the sides. The connector substrate of the slim USB connector can be separate or can be integrated with a circuit board that holds a flash memory chip and a USB controller chip. The connector is wider than the standard width for a better fit. A slim female USB connector for use with the slim male USB connector is also disclosed.

摘要翻译： 一个超薄的通用串行总线（USB）连接器仅适用于标准母USB连接器中连接器基板的一侧。 通过在细长的USB连接器上锁定凹陷来减少摆动或垂直播放，该凹槽与围绕母USB连接器的金属外壳上的金属弹簧接合，将两个连接器锁定在一起。 在超薄USM连接器上的金属触点之间的分隔线有助于在两个连接器连接在一起时填补间隙，进一步减少播放。 超薄USB连接器上的端部导轨填充两侧的间隙。 细长USB连接器的连接器基板可以是分离的，或者可以与保存闪存芯片和USB控制器芯片的电路板集成。 连接器比标准宽度更宽，更好的适合。 还公开了一种用于与超薄公USB连接器一起使用的纤细的母USB连接器。

公开(公告)号：US06542671B1

公开(公告)日：2003-04-01

申请号：US09683306

申请日：2001-12-12

申请人： Abraham C. Ma ,  Tzu-Yih Chu

发明人： Abraham C. Ma ,  Tzu-Yih Chu

IPC分类号： G02B626

CPC分类号： G02B6/12007 ,  G02B6/12002 ,  G02B6/12004 ,  G02B6/29361 ,  G02B6/29364 ,  G02B2006/12109

摘要： An integrated optical device has two waveguide layers that are patterned to provide 2-dimensional interconnected networks of waveguides. A filter layer between the two waveguide layers is made by sputter deposition of thin films with alternating indexes of refraction. Light traveling vertically through the filter layer experiences an interferometric effect. A deflecting bump is formed in the plane of the lower waveguide layer. The bump is isotropicly etched, undercutting a photo-mask over the bump, producing a rounded, concave profile to the bump. High-index material is deposited over the bump and patterned to form a waveguide that has light deflected by the bump upward. The filter is formed over the bump to receive the deflected light. The filter reflects some light back down to the bump to another waveguide in the first layer. Light transmitted vertically up through the filter is bent to the horizontal plane of the upper waveguide layer.

摘要翻译： 集成光学器件具有被图案化以提供二维互连的波导网络的两个波导层。 通过溅射沉积具有交替的折射率的薄膜来制造两个波导层之间的滤光层。 通过过滤层垂直行进的光线经历干涉效应。 在下波导层的平面中形成偏转凸块。 凸块被各向同性地蚀刻，在凸块上切割光掩模，产生凹凸的圆形凹形轮廓。 高折射率材料沉积在凸块上并被图案化以形成具有由凸起向上偏转的光的波导。 过滤器形成在凸起上以接收偏转的光。 滤光器将一些光反射回第一层中另一个波导的凸起。 通过滤光器垂直向上透射的光被弯曲到上波导层的水平面。

公开(公告)号：US06462865B1

公开(公告)日：2002-10-08

申请号：US09681964

申请日：2001-06-29

申请人： Tzu-Yih Chu ,  Shyang Chang ,  Chi Au ,  Abraham C. Ma

发明人： Tzu-Yih Chu ,  Shyang Chang ,  Chi Au ,  Abraham C. Ma

IPC分类号： H01S300

CPC分类号： H01S5/50 ,  G02F2/004 ,  G02F3/00 ,  G02F2203/70

摘要： A novel semiconductor optical amplifier (SOA) can operate as an optical inverter as well as a power-restoring device. Together, an optical-OR and the optical inverter can provide a wide variety of high speed optical logic gates and functions. The optical inverter uses cross-gain modulation (XGM) to invert a modulated signal on a first input, to produce an inverted output. The inverse of the modulation is transferred from a first wavelength of the modulated first input to a second wavelength of a continuous-wave second input. A filter can then block the first wavelength, allowing the inversely-modulated second wavelength to be output as the inverted output. The first and second wavelengths are swapped in alternate inverters in a logic path. The Y-junction can be implemented as a Multi-Mode Interference (MMI) device.

摘要翻译： 一种新型的半导体光放大器（SOA）可以作为光逆变器以及功率恢复装置。 光学和光学逆变器一起可以提供各种各样的高速光逻辑门和功能。 光反向器使用交叉增益调制（XGM）来反转第一输入上的调制信号，以产生反相输出。 调制的反相从调制的第一输入的第一波长传送到连续波第二输入的第二波长。 滤波器然后可以阻挡第一波长，允许反向调制的第二波长作为反相输出输出。 第一和第二波长交替在逻辑路径中的交替逆变器中。 Y结可以实现为多模干扰（MMI）设备。