公开(公告)号：US6030904A

公开(公告)日：2000-02-29

申请号：US916001

申请日：1997-08-21

申请人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

IPC分类号： H01L21/3105 ,  H01L21/312 ,  H01L21/768 ,  H01L21/477

CPC分类号： H01L21/312 ,  H01L21/31058 ,  H01L21/76807

摘要： A method for treating a film of carbon-based dielectric material such as diamond-like carbon to remove volatiles is described. The method incorporates the steps of providing a non-oxidizing ambient and heating the film above 350.degree. C. Heating may be by rapid thermal annealing. The dielectric constant of the material may be lowered. A stabilized carbon-based material is provided with less than 0.5% thickness or weight change/hour at a selected temperature at or below 400.degree. C. The invention overcomes the problem of dimensional instability during the incorporation of the material in integrated circuit chips as an intra and inter level dielectric.

摘要翻译： 描述了一种用于处理诸如类金刚石碳的碳基电介质材料膜以除去挥发物的方法。 该方法包括提供非氧化环境并将膜加热到350℃以上的步骤。加热可以通过快速热退火。 材料的介电常数可能会降低。 在等于或低于400℃的选定温度下，稳定的碳基材料提供小于0.5％的厚度或重量变化/小时。本发明克服了在将材料掺入集成电路芯片中时的尺寸不稳定性的问题，作为 内部和中间电介质。

公开(公告)号：US6140226A

公开(公告)日：2000-10-31

申请号：US126212

申请日：1998-07-30

申请人： Alfred Grill ,  John Patrick Hummel ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  John Patrick Hummel ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

IPC分类号： H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76811 ,  H01L21/76813 ,  H01L2221/1063 ,  Y10S438/945

摘要： The present invention relates to lithographic methods for forming a dual relief pattern in a substrate, and the application of such methods to fabricating multilevel interconnect structures in semiconductor chips by a Dual Damascene process in which dual relief cavities formed in a dielectric are filled with conductive material to form the wiring and via levels. The invention comprises a twice patterned single mask layer Dual Damascene process modified by the addition of an easy-to-integrate sidewall liner to protect organic interlevel and intralevel dielectrics from potential damage induced by photoresist stripping steps during lithographic rework. The invention further comprises a method for forming a dual pattern hard mask which may be used to form dual relief cavities for use in Dual Damascene processing, said dual pattern hard mask comprising a first set of one or more layers with a first pattern, and a second set of one or more layers with a second pattern.

公开(公告)号：US06759321B2

公开(公告)日：2004-07-06

申请号：US10205526

申请日：2002-07-25

申请人： Katherina Babich ,  Alessandro Callegari ,  Stephen Alan Cohen ,  Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Sampath Purushothaman ,  Katherine Lynn Saenger

发明人： Katherina Babich ,  Alessandro Callegari ,  Stephen Alan Cohen ,  Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Sampath Purushothaman ,  Katherine Lynn Saenger

IPC分类号： H01L214763

CPC分类号： H01L21/76825 ,  H01L21/0212 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/31058 ,  H01L21/3127 ,  H01L21/31629 ,  H01L21/76814 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for providing regions of substantially lower fluorine content in a fluorine containing dielectric is described incorporating exposing a region to ultraviolet radiation and annealing at an elevated temperature to remove partially disrupted fluorine from the region. The invention overcomes the problem of fluorine from a fluorine containing dielectric reacting with other materials while maintaining a bulk dielectric material of sufficiently high or original fluorine content to maintain an effective low dielectric constant in semiconductor chip wiring interconnect structures.

摘要翻译： 描述了在含氟电介质中提供基本上较低氟含量的区域的方法，其包括将区域暴露于紫外线辐射并在升高的温度下退火以从该区域去除部分被破坏的氟。 本发明克服了与含氟介质与其他材料反应的氟的问题，同时保持足够高或原始氟含量的体电介质材料，以保持半导体芯片布线互连结构中有效的低介电常数。

公开(公告)号：US06448655B1

公开(公告)日：2002-09-10

申请号：US09067439

申请日：1998-04-28

申请人： Katherina Babich ,  Alessandro Callegari ,  Stephen Alan Cohen ,  Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Sampath Purushothaman ,  Katherine Lynn Saenger

发明人： Katherina Babich ,  Alessandro Callegari ,  Stephen Alan Cohen ,  Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Sampath Purushothaman ,  Katherine Lynn Saenger

IPC分类号： H01L2348

CPC分类号： H01L21/76825 ,  H01L21/0212 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/31058 ,  H01L21/3127 ,  H01L21/31629 ,  H01L21/76814 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for providing regions of substantially lower fluorine content in a fluorine containing dielectric is described incorporating exposing a region to ultraviolet radiation and annealing at an elevated temperature to remove partially disrupted fluorine from the region. The invention overcomes the problem of fluorine from a fluorine containing dielectric reacting with other materials while maintaining a bulk dielectric material of sufficiently high or original fluorine content to maintain an effective low dielectric constant in semiconductor chip wiring interconnect structures.

摘要翻译： 描述了在含氟电介质中提供基本上较低氟含量的区域的方法，其包括将区域暴露于紫外线辐射并在升高的温度下退火以从该区域去除部分被破坏的氟。 本发明克服了与含氟介质与其他材料反应的氟的问题，同时保持足够高或原始氟含量的体电介质材料，以保持半导体芯片布线互连结构中有效的低介电常数。

公开(公告)号：US06448176B1

公开(公告)日：2002-09-10

申请号：US09699900

申请日：2000-10-30

申请人： Alfred Grill ,  John Patrick Hummel ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  John Patrick Hummel ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

IPC分类号： H01L214763

CPC分类号： H01L21/76811 ,  H01L21/76813 ,  H01L2221/1063 ,  Y10S438/945

摘要： The present invention relates to lithographic methods for forming a dual relief pattern in a substrate, and the application of such methods to fabricating multilevel interconnect structures in semiconductor chips by a Dual Damascene process in which dual relief cavities formed in a dielectric are filled with conductive material to form the wiring and via levels. The invention comprises a twice patterned single mask layer Dual Damascene process modified by the addition of an easy-to-integrate sidewall liner to protect organic interlevel and intralevel dielectrics from potential damage induced by photoresist stripping steps during lithographic rework. The invention further comprises a method for forming a dual pattern hard mask which may be used to form dual relief cavities for use in Dual Damascene processing, said dual pattern hard mask comprising a first set of one or more layers with a first pattern, and a second set of one or more layers with a second pattern.

摘要翻译： 本发明涉及用于在衬底中形成双浮雕图案的平版印刷方法，以及通过双镶嵌工艺制造半导体芯片中的多层互连结构的方法，其中形成在电介质中的双浮雕空穴填充有导电材料 形成布线和通孔层。 本发明包括通过添加易于整合的侧壁衬里而修改的两次图案化单掩膜层双镶嵌工艺，以保护有机层间和层间电介质免受光刻胶剥离步骤在光刻返工期间引起的潜在损伤。 本发明还包括一种用于形成双重图案硬掩模的方法，该双面图案硬掩模可用于形成用于双镶嵌处理​​的双浮雕空腔，所述双图案硬掩模包括具有第一图案的一层或多层第一组和 具有第二图案的第二组一层或多层。

公开(公告)号：US06265779B1

公开(公告)日：2001-07-24

申请号：US09132608

申请日：1998-08-11

申请人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

IPC分类号： H01L21283

CPC分类号： H01L21/0212 ,  H01L21/02115 ,  H01L21/02131 ,  H01L21/3127 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： Metal and insulator interconnect structures are described incorporating one or more layers of fluorinated dielectric insulation, one or more conductive wiring levels interconnected by vias and capping and/or liner materials to physically isolate the wiring levels and vias from the fluorinated dielectric such as fluorinated diamond like carbon which has a low dielectric constant. The invention overcomes the problem that can arise when fluorine in the fluorinated dielectric insulation reacts with other materials in the interconnect structure to produce unwanted fluorine-containing compounds that can interfere with the structure's mechanical integrity or interconnect function.

摘要翻译： 描述了金属和绝缘体互连结构，其包括一层或多层氟化电介质绝缘体，通过通孔和封盖和/或衬垫材料互连的一个或多个导电布线层，以物理地隔离氟化电介质的布线层和通孔，例如氟化金刚石 具有低介电常数的碳。 本发明克服了当氟化绝缘绝缘体中的氟与互连结构中的其它材料反应产生不想要的含氟化合物时可能出现的问题，这些化合物可能会干扰结构的机械完整性或互连功能。

公开(公告)号：US6147009A

公开(公告)日：2000-11-14

申请号：US107567

申请日：1998-06-29

申请人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Laurent Claude Perraud

发明人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Laurent Claude Perraud

IPC分类号： C23C16/32 ,  H01L21/312 ,  H01L21/316 ,  H01L23/29 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L21/76832 ,  C23C16/325 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/3122 ,  H01L21/31633 ,  H01L23/291 ,  H01L23/296 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/5222 ,  H01L2924/0002 ,  Y10T428/30

摘要： A low dielectric constant, thermally stable hydrogenated oxidized silicon carbon film which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a thermally stable hydrogenated oxidized silicon carbon low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of thermally stable hydrogenated oxidized silicon carbon low dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of thermally stable hydrogenated oxidized silicon carbon low dielectric constant film, specific precursor materials having a ring structure are preferred.

公开(公告)号：US5981000A

公开(公告)日：1999-11-09

申请号：US058651

申请日：1998-04-10

申请人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel

发明人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel

IPC分类号： C23C16/26 ,  C23C16/509 ,  C23C16/56 ,  H01L21/314 ,  B05D3/06

CPC分类号： C23C16/5096 ,  C23C16/26 ,  C23C16/56 ,  H01L21/3146 ,  Y10S427/103 ,  Y10S427/104

摘要： A method for fabricating a thermally stable carbon-based low dielectric constant film such as a hydrogenated amorphous carbon film or a diamond-like carbon film in a parallel plate chemical vapor deposition process utilizing plasma enhanced chemical vapor deposition process is disclosed. Electronic devices containing insulating layers of thermally stable carbon-based low dielectric constant materials that are prepared by the method are further disclosed. In order to render the carbon-based low dielectric constant film thermally stable, i.e., at a temperature of at least 400.degree. C., the films are heat treated at a temperature of not less than 350.degree. C. for at least 0.5 hour. To enable the fabrication of thermally stable carbon-based low dielectric constant film, specific precursor materials such as cyclic hydrocarbons should be used, for instance, cyclohexane or benzene. The geometry of the chemical vapor deposition chamber is important in making the present invention thermally stable low dielectric constant films in order to achieve a specific bias voltage on the substrate onto which the electronic structure is formed.

摘要翻译： 公开了一种利用等离子体增强化学气相沉积工艺在平行板化学气相沉积工艺中制造热稳定性碳基低介电常数膜的方法，例如氢化无定形碳膜或类金刚石碳膜。 还公开了通过该方法制备的含有热稳定性碳基低介电常数材料绝缘层的电子器件。 为了使碳基低介电常数膜热稳定，即在至少400℃的温度下，将膜在不低于350℃的温度下热处理至少0.5小时。 为了制造热稳定性的碳系低介电常数膜，可以使用环状烃等环状烃等特定的前体材料。 化学气相沉积室的几何形状对于使本发明热稳定的低介电常数膜是重要的，以便在其上形成电子结构的基板上实现特定的偏置电压。

公开(公告)号：US06346747B1

公开(公告)日：2002-02-12

申请号：US09329004

申请日：1999-06-09

申请人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel

发明人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel

IPC分类号： H01L2348

CPC分类号： C23C16/5096 ,  C23C16/26 ,  C23C16/56 ,  H01L21/3146 ,  Y10S427/103 ,  Y10S427/104

摘要： A method for fabricating a thermally stable carbon-based low dielectric constant film such as a hydrogenated amorphous carbon film or a diamond-like carbon film in a parallel plate chemical vapor deposition process utilizing plasma enhanced chemical vapor deposition process is disclosed. Electronic devices containing insulating layers of thermally stable carbon-based low dielectric constant materials that are prepared by the method are further disclosed. In order to render the carbon-based low dielectric constant film thermally stable, i.e., at a temperature of at least 400° C., the films are heat treated at a temperature of not less than 350° C. for at least 0.5 hour. To enable the fabrication of thermally stable carbon-based low dielectric constant film, specific precursor materials such as cyclic hydrocarbons should be used, for instance, cyclohexane or benzene. The geometry of the chemical vapor deposition chamber is important in making the present invention thermally stable low dielectric constant films in order to achieve a specific bias voltage on the substrate onto which the electronic structure is formed.

摘要翻译： 公开了一种利用等离子体增强化学气相沉积工艺在平行板化学气相沉积工艺中制造热稳定性碳基低介电常数膜的方法，例如氢化无定形碳膜或类金刚石碳膜。 还公开了通过该方法制备的含有热稳定性碳基低介电常数材料绝缘层的电子器件。 为了使碳基低介电常数膜热稳定，即在至少400℃的温度下，将膜在不低于350℃的温度下热处理至少0.5小时。 为了制造热稳定性的碳系低介电常数膜，可以使用环状烃等环状烃等特定的前体材料。 化学气相沉积室的几何形状对于使本发明热稳定的低介电常数膜是重要的，以便在其上形成电子结构的基板上实现特定的偏置电压。

公开(公告)号：US06724086B1

公开(公告)日：2004-04-20

申请号：US09603256

申请日：2000-06-23

申请人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Laurent Claude Perraud

发明人： Alfred Grill ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Laurent Claude Perraud

IPC分类号： H01L2348

CPC分类号： H01L21/76832 ,  C23C16/325 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/02362 ,  H01L21/3122 ,  H01L21/31633 ,  H01L23/291 ,  H01L23/296 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  Y10T428/30 ,  H01L2924/00

摘要： A low dielectric constant, thermally stable hydrogenated oxidized silicon carbon film which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a thermally stable hydrogenated oxidized silicon carbon low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of thermally stable hydrogenated oxidized silicon carbon low dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of thermally stable hydrogenated oxidized silicon carbon low dielectric constant film, specific precursor materials having a ring structure are preferred.

摘要翻译： 公开了可用作IC芯片中的互连电介质的低介电常数，热稳定的氢化氧化硅碳膜。 还公开了利用等离子体增强化学气相沉积技术制造热稳定的氢化氧化硅碳低介电常数膜的方法。 还公开了通过该方法制备的包含热稳定的氢化氧化硅碳低介电常数材料的绝缘层的电子器件。 为了制造热稳定的氢化氧化硅碳低介电常数膜，优选具有环结构的特定的前体材料。