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1.发明申请公开(公告)号：US20060246357A1
公开(公告)日：2006-11-02
申请号：US11115433
申请日：2005-04-27
申请人： Chia-Jen Chen , Hsin-Chang Lee , Sheng-Chi Chin , Hung Hsieh , Burn Lin
发明人： Chia-Jen Chen , Hsin-Chang Lee , Sheng-Chi Chin , Hung Hsieh , Burn Lin
CPC分类号： G03F7/38
摘要： The present disclosure provides a system and method for manufacturing a mask for semiconductor processing. In one example, the system includes at least one exposure unit configured to select a recipe for a later baking process in a post treatment unit, a buffer unit coupled to the exposure unit and configured to move the mask substrate from the exposure unit to the post treatment unit without exposing the mask substrate to the environment; and the post treatment unit coupled to the buffer unit and the exposure unit and configured to perform a baking process on the mask substrate using baking parameters associated with the recipe selected by the exposure unit.
摘要翻译： 本公开提供了一种用于制造用于半导体处理的掩模的系统和方法。 在一个示例中，系统包括至少一个曝光单元，其被配置为在后处理单元中选择用于稍后烘焙处理的配方，缓冲单元，其耦合到曝光单元并且被配置为将掩模基板从曝光单元移动到柱 处理单元，而不将掩模基板暴露于环境中; 以及所述后处理单元，其耦合到所述缓冲单元和所述曝光单元，并且被配置为使用与由所述曝光单元选择的所述配方相关联的烘焙参数对所述掩模基板进行烘烤处理。
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2.发明申请New aperture design for improving critical dimension accuracy and electron beam lithography throughput 失效新的孔径设计，用于提高临界尺寸精度和电子束光刻产量公开(公告)号：US20070172744A1
公开(公告)日：2007-07-26
申请号：US11340249
申请日：2006-01-26
申请人： Chia-Jen Chen , Hsin-Chang Lee , Hung Hsieh
发明人： Chia-Jen Chen , Hsin-Chang Lee , Hung Hsieh
CPC分类号： G06Q40/00 , B82Y10/00 , B82Y40/00 , G03F1/78 , H01J37/3174
摘要： Disclosed is an improved aperture design for improving critical dimension accuracy and electron beam lithography. A pattern may be created on a reticle by passing an electron beam through a first aperture having a first shape comprising an upper horizontal edge, a lower horizontal edge, a vertical edge, an upper bevel, and a lower bevel, wherein a portion of the electron beam is projected onto a second aperture. The portion of the electronic beam is passed through the second aperture having a second shape, wherein the second shape is the first shape rotated horizontally by 180 degrees, and an overlapped portion of the first and second aperture is exposed on a surface of the reticle to create a pattern.
摘要翻译： 公开了一种改进的孔径设计，用于改进临界尺寸精度和电子束光刻。 可以通过使电子束通过具有包括上部水平边缘，下部水平边缘，垂直边缘，上部斜面和下部斜面的第一形状的第一孔而在掩模版上形成图案，其中， 电子束投射到第二孔上。 电子束的部分通过具有第二形状的第二孔，其中第二形状是水平旋转180度的第一形状，并且第一和第二孔的重叠部分暴露在掩模版的表面上 创建一个模式。
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公开(公告)号：US08679707B2
公开(公告)日：2014-03-25
申请号：US13564334
申请日：2012-08-01
申请人： Hsin-Chang Lee , Yun-Yue Lin , Pei-Cheng Hsu , Chia-Jen Chen , Ta-Cheng Lien , Anthony Yen
发明人： Hsin-Chang Lee , Yun-Yue Lin , Pei-Cheng Hsu , Chia-Jen Chen , Ta-Cheng Lien , Anthony Yen
摘要： A method of fabricating an extreme ultraviolet (EUV) mask is disclosed. The method includes providing a substrate, forming a reflective multilayer (ML) over the substrate, forming a buffer layer over the reflective ML, forming an absorption layer over the buffer layer and forming a capping layer over the absorption layer. The capping layer and the absorption layer are etched to form the EUV mask.
摘要翻译： 公开了一种制造极紫外（EUV）掩模的方法。 该方法包括提供衬底，在衬底上形成反射多层（ML），在反射ML上形成缓冲层，在缓冲层上形成吸收层，并在吸收层上形成覆盖层。 蚀刻覆盖层和吸收层以形成EUV掩模。
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公开(公告)号：US20130298088A1
公开(公告)日：2013-11-07
申请号：US13464116
申请日：2012-05-04
申请人： Hsin-Chang Lee , Chia-Jen Chen , Yeh Lee-Chih , Sheng-Chi Chin , Ting-Hao Hsu , Anthony Yen
发明人： Hsin-Chang Lee , Chia-Jen Chen , Yeh Lee-Chih , Sheng-Chi Chin , Ting-Hao Hsu , Anthony Yen
IPC分类号： G06F17/50
摘要： A method and system for measuring layer overlay and for inspecting a mask for defects unrelated to overlay utilizing a singe comprehensive tool is disclosed. An exemplary method includes receiving a mask design database that corresponds to a mask and has a die area with a mask database feature. A mask image of the mask is received, and a comprehensive inspection system compares the mask image to the mask design database in order to detect mask defects that are not related to layer alignment. The system produces mask defect information corresponding to the mask defects. The comprehensive inspection system also compares the mask image to the mask design database to determine a database-to-mask offset. From the database-to-mask offset, a mask overlay characteristic is determined.
摘要翻译： 公开了一种用于测量层叠覆盖层的方法和系统，并且用于使用单个综合工具来检查与覆盖无关的缺陷的掩模。 一种示例性方法包括接收对应于掩模并且具有掩模数据库特征的管芯区域的掩模设计数据库。 接收掩模的掩模图像，并且综合检查系统将掩模图像与掩模设计数据库进行比较，以便检测与层对齐无关的掩模缺陷。 系统产生对应于掩模缺陷的掩模缺陷信息。 综合检查系统还将掩模图像与掩模设计数据库进行比较，以确定数据库对掩模偏移量。 从数据库到掩码偏移，确定掩模覆盖特性。
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公开(公告)号：US20130280643A1
公开(公告)日：2013-10-24
申请号：US13451705
申请日：2012-04-20
申请人： Pei-Cheng Hsu , Chih-Tsung Shih , Chia-Jen Chen , Tsiao-Chen Wu , Shinn-Sheng Yu , Hsin-Chang Lee , Anthony Yen
发明人： Pei-Cheng Hsu , Chih-Tsung Shih , Chia-Jen Chen , Tsiao-Chen Wu , Shinn-Sheng Yu , Hsin-Chang Lee , Anthony Yen
IPC分类号： G03F1/24
CPC分类号： G03F1/24 , G03F1/48 , H01L21/0337
摘要： A reflective mask is described. The mask includes a low thermal expansion material (LTEM) substrate, a conductive layer deposited on a first surface of the LTEM substrate, a stack of reflective multilayers (ML) deposited on a second surface of the LTEM substrate, a capping layer deposited on the stack of reflective ML, a first absorption layer deposited on the first capping layer, a main pattern, and a border ditch. The border ditch reaches to the capping layer, the second absorption layer deposited inside the border ditch, and the second absorption layer contacts the capping layer.
摘要翻译： 描述了一种反光罩。 掩模包括低热膨胀材料（LTEM）衬底，沉积在LTEM衬底的第一表面上的导电层，沉积在LTEM衬底的第二表面上的反射多层堆叠（ML），沉积在 堆叠的反射ML，沉积在第一盖层上的第一吸收层，主图案和边界沟。 边界沟到达覆盖层，第二吸收层沉积在边界沟内，第二吸收层接触封盖层。
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6.发明授权公开(公告)号：US07999910B2
公开(公告)日：2011-08-16
申请号：US11115433
申请日：2005-04-27
CPC分类号： G03F7/38
摘要： The present disclosure provides a system and method for manufacturing a mask for semiconductor processing. In one example, the system includes at least one exposure unit configured to select a recipe for a later baking process in a post treatment unit, a buffer unit coupled to the exposure unit and configured to move the mask substrate from the exposure unit to the post treatment unit without exposing the mask substrate to the environment; and the post treatment unit coupled to the buffer unit and the exposure unit and configured to perform a baking process on the mask substrate using baking parameters associated with the recipe selected by the exposure unit.
摘要翻译： 本公开提供了一种用于制造用于半导体处理的掩模的系统和方法。 在一个示例中，系统包括至少一个曝光单元，其被配置为在后处理单元中选择用于稍后烘焙处理的配方，缓冲单元，其耦合到曝光单元并且被配置为将掩模基板从曝光单元移动到柱 处理单元，而不将掩模基板暴露于环境中; 以及所述后处理单元，其耦合到所述缓冲单元和所述曝光单元，并且被配置为使用与由所述曝光单元选择的所述配方相关联的烘焙参数对所述掩模基板进行烘烤处理。
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7.发明授权公开(公告)号：US07924405B2
公开(公告)日：2011-04-12
申请号：US11829701
申请日：2007-07-27
申请人： Lee-Chih Yeh , Hsin-Chang Lee , Chia-Jen Chen , Tzu-Yi Wang
发明人： Lee-Chih Yeh , Hsin-Chang Lee , Chia-Jen Chen , Tzu-Yi Wang
CPC分类号： G03F7/70258 , G03F7/70783
摘要： A method for lithography patterning includes providing a mask for photolithography patterning; measuring a mask flatness of the mask; calculating focal deviation of imaging the mask to a substrate in a lithography apparatus; adjusting the lithography apparatus to have a compensated focal plane of the mask based on the focal deviation; and exposing the semiconductor substrate utilizing the mask and the lithography apparatus with adjusted focal plane.
摘要翻译： 光刻图案化方法包括提供光刻图案掩模; 测量掩模的掩模平整度; 计算在光刻设备中将掩模成像到基底的焦点偏差; 基于焦点偏差调整光刻装置以具有掩模的补偿焦平面; 以及利用所述掩模和所述光刻设备利用经调整的焦平面曝光所述半导体衬底。
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8.发明申请公开(公告)号：US20090027643A1
公开(公告)日：2009-01-29
申请号：US11829701
申请日：2007-07-27
申请人： Lee-Chih Yeh , Hsin-Chang Lee , Chia-Jen Chen , Tzu-Yi Wang
发明人： Lee-Chih Yeh , Hsin-Chang Lee , Chia-Jen Chen , Tzu-Yi Wang
IPC分类号： G03B27/52
CPC分类号： G03F7/70258 , G03F7/70783
摘要： A method for lithography patterning includes providing a mask for photolithography patterning; measuring a mask flatness of the mask; calculating focal deviation of imaging the mask to a substrate in a lithography apparatus; adjusting the lithography apparatus to have a compensated focal plane of the mask based on the focal deviation; and exposing the semiconductor substrate utilizing the mask and the lithography apparatus with adjusted focal plane.
摘要翻译： 光刻图案化方法包括提供光刻图案掩模; 测量掩模的掩模平整度; 计算在光刻设备中将掩模成像到基底的焦点偏差; 基于焦点偏差调整光刻装置以具有掩模的补偿焦平面; 以及利用所述掩模和所述光刻设备利用经调整的焦平面曝光所述半导体衬底。
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9.发明授权公开(公告)号：US08656318B2
公开(公告)日：2014-02-18
申请号：US13464116
申请日：2012-05-04
申请人： Hsin-Chang Lee , Chia-Jen Chen , Yeh Lee-Chih , Sheng-Chi Chin , Ting-Hao Hsu , Anthony Yen
发明人： Hsin-Chang Lee , Chia-Jen Chen , Yeh Lee-Chih , Sheng-Chi Chin , Ting-Hao Hsu , Anthony Yen
IPC分类号： G06F17/50
摘要： A method and system for measuring layer overlay and for inspecting a mask for defects unrelated to overlay utilizing a singe comprehensive tool is disclosed. An exemplary method includes receiving a mask design database that corresponds to a mask and has a die area with a mask database feature. A mask image of the mask is received, and a comprehensive inspection system compares the mask image to the mask design database in order to detect mask defects that are not related to layer alignment. The system produces mask defect information corresponding to the mask defects. The comprehensive inspection system also compares the mask image to the mask design database to determine a database-to-mask offset. From the database-to-mask offset, a mask overlay characteristic is determined.
摘要翻译： 公开了一种用于测量层叠覆盖层的方法和系统，并且用于使用单个综合工具来检查与覆盖无关的缺陷的掩模。 一种示例性方法包括接收对应于掩模并且具有掩模数据库特征的管芯区域的掩模设计数据库。 接收掩模的掩模图像，并且综合检查系统将掩模图像与掩模设计数据库进行比较，以便检测与层对齐无关的掩模缺陷。 系统产生对应于掩模缺陷的掩模缺陷信息。 综合检查系统还将掩模图像与掩模设计数据库进行比较，以确定数据库对掩模偏移量。 从数据库到掩码偏移，确定掩模覆盖特性。
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10.发明授权公开(公告)号：US08624345B2
公开(公告)日：2014-01-07
申请号：US13486995
申请日：2012-06-01
申请人： Ken Wu , Hung-Chang Hsieh , Chang-Cheng Hung , Luke Hsu , Ren-Guey Hsieh , Hsin-Chang Lee , Chia-Jen Chen
发明人： Ken Wu , Hung-Chang Hsieh , Chang-Cheng Hung , Luke Hsu , Ren-Guey Hsieh , Hsin-Chang Lee , Chia-Jen Chen
CPC分类号： G03F7/70941 , G03F1/26 , G03F1/46 , G03F7/70433
摘要： A mask substrate, photomask and method for forming the same are provided. The photomask includes a substantially light transparent substrate and a circuitry pattern disposed over the light transparent substrate. The circuitry pattern includes a phase shifting layer disposed over the substantially light transparent substrate. A substantially light shielding layer is disposed over the phase shifting layer. At least one barrier layer is disposed over the substantially light shielding layer. An uppermost portion of the substantially light shielding layer does not comprise anti-reflective properties and the at least one barrier layer comprises an uppermost hardmask layer and an underlying anti-reflective layer.
摘要翻译： 提供了掩模基板，光掩模及其形成方法。 光掩模包括基本上透明的基板和设置在光透明基板上的电路图案。 电路图案包括设置在基本上光透明基底上的相移层。 基本上遮光层设置在相移层上。 至少一个阻挡层设置在基本上遮光层上。 基本上遮光层的最上部分不包括抗反射性质，并且至少一个阻挡层包括最上面的硬掩模层和下面的抗反射层。
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