公开(公告)号：US20110241085A1

公开(公告)日：2011-10-06

申请号：US12751891

申请日：2010-03-31

申请人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A. Conti

发明人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A. Conti

IPC分类号： H01L29/78 ,  H01L21/311

CPC分类号： H01L29/4983 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A semiconducting device with a dual sidewall spacer and method of forming are provided. The method includes: depositing a first spacer layer over a patterned structure, the first spacer layer having a seam propagating through a thickness of the first spacer layer near an interface region of a surface of the substrate and a sidewall of the patterned structure, etching the first spacer layer to form a residual spacer at the interface region, where the residual spacer coats less than the entirety of the sidewall of the patterned structure, depositing a second spacer layer on the residual spacer and on the sidewall of the patterned structure not coated by the residual spacer, the second spacer layer being seam-free on the seam of the residual spacer, and etching the second spacer layer to form a second spacer coating the residual spacer and coating the sidewall of the patterned structure not coated by the residual spacer.

摘要翻译： 提供了具有双侧壁间隔件和成形方法的半导体器件。 该方法包括：在图案化结构上沉积第一间隔层，第一间隔层具有在衬底的表面的界面区附近传播穿过第一间隔层的厚度的接缝和图案化结构的侧壁，蚀刻 第一间隔层，以在界面区域处形成残留间隔物，其中残余间隔物涂覆小于图案化结构的侧壁的整体，在剩余间隔物上和在图案化结构的侧壁上沉积第二间隔层， 所述剩余间隔物，所述第二间隔层在所述残余间隔物的接缝上是无缝的，并且蚀刻所述第二间隔层以形成涂覆所述剩余间隔物并涂覆未被所述残留间隔物涂覆的所述图案化结构的侧壁的第二间隔物。

公开(公告)号：US08673725B2

公开(公告)日：2014-03-18

申请号：US12751926

申请日：2010-03-31

申请人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A Conti

发明人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A Conti

IPC分类号： H01L29/78

CPC分类号： H01L21/28247 ,  H01L29/6656

摘要： A semiconducting device with a multilayer sidewall spacer and method of forming are described. In one embodiment, the method includes providing a substrate containing a patterned structure on a surface of the substrate and depositing a first spacer layer over the patterned structure at a first substrate temperature, where the first spacer layer contains a first material. The method further includes depositing a second spacer layer over the patterned substrate at a second substrate temperature that is different from the first substrate temperature, where the first and second materials contain the same chemical elements, and the depositing steps are performed in any order. The first and second spacer layers are then etched to form the multilayer sidewall spacer on the patterned structure.

摘要翻译： 描述了具有多层侧壁间隔件和形成方法的半导体器件。 在一个实施例中，该方法包括在衬底的表面上提供含有图案化结构的衬底，并且在第一衬底温度下在第一衬底温度下沉积在图案化结构上的第一间隔层，其中第一间隔层包含第一材料。 该方法还包括在不同于第一衬底温度的第二衬底温度下在图案化衬底上沉积第二间隔层，其中第一和第二材料含有相同的化学元素，并且沉积步骤以任何顺序进行。 然后蚀刻第一和第二间隔层以在图案化结构上形成多层侧壁间隔物。

公开(公告)号：US08664102B2

公开(公告)日：2014-03-04

申请号：US12751891

申请日：2010-03-31

申请人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A Conti

发明人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A Conti

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L29/4983 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A semiconducting device with a dual sidewall spacer and method of forming are provided. The method includes: depositing a first spacer layer over a patterned structure, the first spacer layer having a seam propagating through a thickness of the first spacer layer near an interface region of a surface of the substrate and a sidewall of the patterned structure, etching the first spacer layer to form a residual spacer at the interface region, where the residual spacer coats less than the entirety of the sidewall of the patterned structure, depositing a second spacer layer on the residual spacer and on the sidewall of the patterned structure not coated by the residual spacer, the second spacer layer being seam-free on the seam of the residual spacer, and etching the second spacer layer to form a second spacer coating the residual spacer and coating the sidewall of the patterned structure not coated by the residual spacer.

摘要翻译： 提供了具有双侧壁间隔件和成形方法的半导体器件。 该方法包括：在图案化结构上沉积第一间隔层，第一间隔层具有在衬底的表面的界面区附近传播穿过第一间隔层的厚度的接缝和图案化结构的侧壁，蚀刻 第一间隔层，以在界面区域处形成残留间隔物，其中残余间隔物涂覆小于图案化结构的侧壁的整体，在剩余间隔物上和在图案化结构的侧壁上沉积第二间隔层， 所述剩余间隔物，所述第二间隔层在所述残余间隔物的接缝上是无缝的，并且蚀刻所述第二间隔层以形成涂覆所述剩余间隔物并涂覆未被所述残留间隔物涂覆的所述图案化结构的侧壁的第二间隔物。

公开(公告)号：US20110241128A1

公开(公告)日：2011-10-06

申请号：US12751926

申请日：2010-03-31

申请人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A. Conti

发明人： David L. O'Meara ,  Anthony Dip ,  Aelan Mosden ,  Pao-Hwa Chou ,  Richard A. Conti

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L21/28247 ,  H01L29/6656

摘要： A semiconducting device with a multilayer sidewall spacer and method of forming are described. In one embodiment, the method includes providing a substrate containing a patterned structure on a surface of the substrate and depositing a first spacer layer over the patterned structure at a first substrate temperature, where the first spacer layer contains a first material. The method further includes depositing a second spacer layer over the patterned substrate at a second substrate temperature that is different from the first substrate temperature, where the first and second materials contain the same chemical elements, and the depositing steps are performed in any order. The first and second spacer layers are then etched to form the multilayer sidewall spacer on the patterned structure.

摘要翻译： 描述了具有多层侧壁间隔件和形成方法的半导体器件。 在一个实施例中，该方法包括在衬底的表面上提供含有图案化结构的衬底，并且在第一衬底温度下在第一衬底温度下沉积在图案化结构上的第一间隔层，其中第一间隔层包含第一材料。 该方法还包括在不同于第一衬底温度的第二衬底温度下在图案化衬底上沉积第二间隔层，其中第一和第二材料含有相同的化学元素，并且沉积步骤以任何顺序进行。 然后蚀刻第一和第二间隔层以在图案化结构上形成多层侧壁间隔物。

公开(公告)号：US08658247B2

公开(公告)日：2014-02-25

申请号：US13189648

申请日：2011-07-25

申请人： Toshiyuki Ikeuchi ,  Pao-Hwa Chou ,  Kazuya Yamamoto ,  Kentaro Sera

发明人： Toshiyuki Ikeuchi ,  Pao-Hwa Chou ,  Kazuya Yamamoto ,  Kentaro Sera

IPC分类号： C23C16/40

CPC分类号： H01L21/0228 ,  C23C16/401 ,  C23C16/45546 ,  C23C16/45557 ,  H01L21/02164 ,  H01L21/02219

摘要： A disclosed film deposition method comprises alternately repeating an adsorption step and a reaction step with an interval period therebetween. The adsorption step includes opening a first on-off valve of a source gas supplying system for a predetermined time period thereby to supply a source gas to a process chamber, closing the first valve after the predetermined time period elapses, and confining the source gas within the process tube, thereby allowing the source gas to be adsorbed on an object to be processed, while a third on-off valve of a vacuum evacuation system is closed. The reaction step includes opening a second on-off valve of a reaction gas supplying system thereby to supply a reaction gas to the process chamber, thereby allowing the source gas and the reaction gas to react with each other thereby to produce a thin film on the object to be processed.

摘要翻译： 所公开的膜沉积方法包括以间隔期交替地重复吸附步骤和反应步骤。 吸附步骤包括打开源气体供应系统的第一开关阀预定时间段，从而将源气体供应到处理室，在经过预定时间段之后关闭第一阀门，并将源气体限制在 处理管，从而允许源气体被吸附在待处理物体上，而真空排气系统的第三开关阀关闭。 反应步骤包括打开反应气体供应系统的第二开关阀，从而将反应气体提供给处理室，从而使源气体和反应气体彼此反应，从而在其上产生薄膜 对象被处理。

公开(公告)号：US20120269969A1

公开(公告)日：2012-10-25

申请号：US13401919

申请日：2012-02-22

申请人： Keisuke SUZUKI ,  Pao-Hwa Chou ,  Te Ching Chang

发明人： Keisuke SUZUKI ,  Pao-Hwa Chou ,  Te Ching Chang

IPC分类号： C23C16/455

CPC分类号： H01L21/0228 ,  C23C16/345 ,  C23C16/45527 ,  C23C16/52 ,  H01L21/0217

摘要： A film deposition method of depositing a thin film by alternately supplying at least a first source gas and a second source gas to a substrate is disclosed. The film deposition method includes steps of evacuating a process chamber where the substrate is accommodated, without supplying any gas to the process chamber; supplying an inert gas to the process chamber until a pressure within the process chamber becomes a predetermined pressure; supplying the first source gas to the process chamber filled with the inert gas at the predetermined pressure without evacuating the process chamber; stopping supplying the first source gas to the process chamber and evacuating the process chamber; supplying the second source gas to the process chamber; and stopping supplying the second source gas to the process chamber and evacuating the process chamber.

摘要翻译： 公开了一种通过交替地将至少第一源气体和第二源气体供应到基底而沉积薄膜的成膜方法。 膜沉积方法包括以下步骤：将处理室排出到容纳基板的步骤，而不向处理室供应任何气体; 向所述处理室供应惰性气体，直到所述处理室内的压力变为预定压力; 将第一源气体以预定压力供给到填充有惰性气体的处理室，而不需要排空处理室; 停止向处理室供应第一源气体并抽空处理室; 将第二源气体供应到处理室; 并停止向处理室供应第二源气体并抽空处理室。

公开(公告)号：US08034673B2

公开(公告)日：2011-10-11

申请号：US12417939

申请日：2009-06-09

申请人： Kentaro Kadonaga ,  Yamato Tonegawa ,  Pao-Hwa Chou ,  Kazuhide Hasebe ,  Tetsuya Shibata

发明人： Kentaro Kadonaga ,  Yamato Tonegawa ,  Pao-Hwa Chou ,  Kazuhide Hasebe ,  Tetsuya Shibata

IPC分类号： H01L21/00

CPC分类号： H01L21/3185 ,  H01L21/02145 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/28282 ,  H01L21/31612 ,  H01L29/792

摘要： A film formation method for a semiconductor process performs a film formation process to form a silicon-containing insulating film doped with a metal on a target substrate, in a process field inside a process container configured to be selectively supplied with a silicon source gas and a metal source gas. The method includes forming a first insulating thin layer by use of a chemical reaction of the silicon source gas, while maintaining a shut-off state of supply of the metal source gas; then, forming a first metal thin layer by use of a chemical reaction of the metal source gas, while maintaining a shut-off state of supply of the silicon source gas; and then, forming a second insulating thin layer by use of the chemical reaction of the silicon source gas, while maintaining a shut-off state of supply of the metal source gas.

摘要翻译： 半导体工艺的成膜方法在被配置为选择性地供应有硅源气体的处理容器内的处理场中进行成膜处理，以在目标衬底上形成掺杂有金属的含硅绝缘膜， 金属源气体。 该方法包括通过利用硅源气体的化学反应形成第一绝缘薄层，同时保持金属源气体的切断状态; 然后通过使用金属源气体的化学反应形成第一金属薄层，同时保持硅源气体的供应关闭状态; 然后通过利用硅源气体的化学反应形成第二绝缘薄层，同时保持金属源气体的截止供应状态。

公开(公告)号：US07959733B2

公开(公告)日：2011-06-14

申请号：US12504454

申请日：2009-07-16

申请人： Kazuhide Hasebe ,  Pao-Hwa Chou ,  Chaeho Kim

发明人： Kazuhide Hasebe ,  Pao-Hwa Chou ,  Chaeho Kim

IPC分类号： C23C16/00 ,  C30B28/14 ,  H01L21/00 ,  H01L21/22

CPC分类号： C23C16/24 ,  C23C16/45523 ,  Y10T117/1024

摘要： A film formation apparatus for a semiconductor process includes a source gas supply circuit to supply into a process container a source gas for depositing a thin film on target substrates, and a mixture gas supply circuit to supply into the process container a mixture gas containing a doping gas for doping the thin film with an impurity and a dilution gas for diluting the doping gas. The mixture gas supply circuit includes a gas mixture tank disposed outside the process container to mix the doping gas with the dilution gas to form the mixture gas, a mixture gas supply line to supply the mixture gas from the gas mixture tank into the process container, a doping gas supply circuit to supply the doping gas into the gas mixture tank, and a dilution gas supply circuit to supply the dilution gas into the gas mixture tank.

摘要翻译： 一种用于半导体工艺的成膜装置包括：源气体供应电路，用于向处理容器中提供用于在目标衬底上沉积薄膜的源气体;以及混合气体供应电路，向处理容器供应含有掺杂物质的混合气体 用于用杂质掺杂薄膜的气体和用于稀释掺杂气体的稀释气体。 混合气体供给回路包括：设置在处理容器外部的混合气体，将掺杂气体与稀释气体混合，形成混合气体，混合气体供给管路，将混合气体从气体混合罐供给到处理容器内; 用于将掺杂气体供应到气体混合罐中的掺杂气体供应回路，以及将稀释气体供应到气体混合罐中的稀释气体供给回路。

公开(公告)号：US20100112796A1

公开(公告)日：2010-05-06

申请号：US12441741

申请日：2008-06-06

申请人： Pao-Hwa Chou ,  Kazuhide Hasebe ,  Shigeru Nakajima ,  Yasushi Akasaka ,  Mitsuaki Iwashita ,  Reiji Niino

发明人： Pao-Hwa Chou ,  Kazuhide Hasebe ,  Shigeru Nakajima ,  Yasushi Akasaka ,  Mitsuaki Iwashita ,  Reiji Niino

IPC分类号： H01L21/28 ,  H01L21/3213

CPC分类号： H01L21/3086 ,  H01L21/0337 ,  H01L21/3088 ,  H01L21/32139 ,  H01L29/66795

摘要： Disclosed is a patterning method including: forming, on a thin film, a sacrificial film made of a material different from that of the thin film and made of SiBN; processing the sacrificial film into a pattern having a preset interval by using a photolithography technique; forming, on sidewalls of the processed sacrificial film, sidewall spacers made of a material different from those of the sacrificial film and the thin film; removing the processed sacrificial film; and processing the thin film by using the sidewall spacers as a mask.

摘要翻译： 公开了一种图案化方法，包括：在薄膜上形成由与SiBN不同的材料制成的牺牲膜; 通过使用光刻技术将牺牲膜处理成具有预设间隔的图案; 在加工的牺牲膜的侧壁上形成由与牺牲膜和薄膜不同的材料制成的侧壁间隔物; 去除加工的牺牲膜; 以及通过使用侧壁间隔件作为掩模来处理薄膜。

公开(公告)号：US20100112496A1

公开(公告)日：2010-05-06

申请号：US12441007

申请日：2008-06-06

申请人： Shigeru Nakajima ,  Kazuhide Hasebe ,  Pao-Hwa Chou ,  Mitsuaki Iwashita ,  Reiji Niino

发明人： Shigeru Nakajima ,  Kazuhide Hasebe ,  Pao-Hwa Chou ,  Mitsuaki Iwashita ,  Reiji Niino

IPC分类号： G03F7/20

CPC分类号： H01L21/3086 ,  G03F7/40 ,  H01L21/02164 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/3088 ,  H01L21/31608

摘要： A patterning method comprises a step for forming a first film on a substrate, a step for forming a multilayer film including a resist film on the first film, a step for patterning the resist film by photolithography to form a patterned resist film having a predetermined pattern, a step for forming an silicon oxide film different from the first film on the patterned resist film and the first film by supplying a first gas containing an organic silicon and a second gas containing an activated oxygen species alternately to the substrate, a step for etching the silicon oxide film to form a sidewall spacer on the sidewall of the patterned resist film, a step for removing the patterned resist film, and a step for processing the first film by using the sidewall spacer as a mask.

摘要翻译： 图案化方法包括在基板上形成第一膜的步骤，用于在第一膜上形成包括抗蚀剂膜的多层膜的步骤，通过光刻图案化抗蚀剂膜以形成具有预定图案的图案化抗蚀剂膜的步骤 通过将含有有机硅和含有活性氧的第二气体的第一气体交替地供给到基板上，在图案化的抗蚀剂膜和第一膜上形成与第一膜不同的氧化硅膜的步骤，蚀刻步骤 氧化硅膜在图案化的抗蚀剂膜的侧壁上形成侧壁间隔物，去除图案化的抗蚀剂膜的步骤，以及通过使用侧壁间隔物作为掩模来处理第一膜的步骤。