公开(公告)号：US09916098B2

公开(公告)日：2018-03-13

申请号：US15114098

申请日：2014-01-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Raphael Gay ,  Siamak Tavallaei

IPC: G06F12/08 ,  G06F3/06 ,  G06F13/16 ,  G06F12/0802 ,  G06F12/02 ,  G06F12/06

CPC classification number: G06F3/0611 ,  G06F3/0659 ,  G06F3/0673 ,  G06F12/0238 ,  G06F12/0638 ,  G06F12/0802 ,  G06F13/1689 ,  G06F2212/1024 ,  G06F2212/205 ,  G06F2212/60

Abstract: Example implementations relate to using an alternative memory (AltMem) to reduce read latency of a memory module having a dynamic random-access memory (DRAM). In example implementations, write data may be written to the DRAM and to the AltMem. A read command may be issued to the AltMem if a DRAM read latency time for executing the read command is greater than an AltMem read latency time for executing the read command. Data read from the AltMem in response to the read command may be received.

公开(公告)号：US20170040055A1

公开(公告)日：2017-02-09

申请号：US15305309

申请日：2014-04-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： David B. Fujii ,  Yoocharn Jeon ,  Siamak Tavallaei

IPC: G11C13/00 ,  G11C11/56

CPC classification number: G11C13/004 ,  G11C11/56 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2211/5641

Abstract: A multimodal memristor memory provides selectable or reconfigurable operation in a plurality of operational modes of a memristor. The multimodal memristor memory includes a memristor having a plurality of operational modes. The multimodal memristor memory further includes a reconfigurable interface driver to select an operational mode of the plurality of operational modes of the memristor. The memristor is to operate in the operational mode selected by the reconfigurable interface driver.

Abstract translation: 多模忆阻存储器在忆阻器的多个操作模式中提供可选择或可重新配置的操作。 多峰忆阻器存储器包括具有多个操作模式的忆阻器。 多模忆阻器存储器还包括可重配置接口驱动器，以选择忆阻器的多个操作模式的操作模式。 忆阻器将以由可重新配置的接口驱动程序选择的操作模式进行操作。

公开(公告)号：US09431103B2

公开(公告)日：2016-08-30

申请号：US15065080

申请日：2016-03-09

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Siamak Tavallaei

IPC: G11C13/00 ,  G11C11/00 ,  H01L29/02

CPC classification number: G11C13/004 ,  G11C5/04 ,  G11C13/0007 ,  G11C13/0033 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0047 ,  G11C2013/0073

Abstract: Apparatus to store data and methods to read memory cells are disclosed. A disclosed example method involves, during a read cycle of a memory cell, applying a current across the memory cell to read a content of the memory cell. During a subsequent read cycle of the memory cell, a subsequent current is applied across the memory cell in the opposite direction to read the content of the memory cell.

公开(公告)号：US20190227606A1

公开(公告)日：2019-07-25

申请号：US16369144

申请日：2019-03-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： John Franz ,  Tahir Cader ,  Cullen E. Bash ,  Niru Kumari ,  Sarah Anthony ,  Sergio Escobar-Vargas ,  Siamak Tavallaei

IPC: G06F1/20 ,  H05K7/20

Abstract: Apparatuses associated with liquid coolant supply are disclosed. One example apparatus is a computing cartridge which includes a first electronic device and a liquid-cooled cold plate. The computing cartridge also includes a first thermal couple between the first electronic device and the cold plate. The computing cartridge also includes an inlet fluid connector. The inlet fluid connector may supply a liquid coolant to the cold plate. The computing cartridge also includes an outlet fluid connector. The outlet fluid connector may facilitate return of the coolant from the cold plate.

公开(公告)号：US10241715B2

公开(公告)日：2019-03-26

申请号：US15111693

申请日：2014-01-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gregg B. Lesartre ,  Siamak Tavallaei ,  Russ W. Herrell

IPC: G06F12/00 ,  G06F3/06 ,  G06F17/30 ,  G06F12/02

Abstract: A method for rendering data invalid within a memory array is described. The method includes establishing governing metadata for a memory location within a memory array. The method also includes receiving a request to retrieve data from the memory location. The method also includes determining whether color metadata associated with the data matches the governing metadata. The method also includes returning the data when the color metadata matches the governing metadata. The method also includes returning invalidated data when the color metadata does not match the governing metadata.

公开(公告)号：US10032510B2

公开(公告)日：2018-07-24

申请号：US15305309

申请日：2014-04-28

Applicant: Hewlett Packard Enterprise Development LP

Inventor： David B. Fujii ,  Yoocharn Jeon ,  Siamak Tavallaei

IPC: G11C11/00 ,  G11C13/00 ,  G11C11/56

Abstract: A multimodal memristor memory provides selectable or reconfigurable operation in a plurality of operational modes of a memristor. The multimodal memristor memory includes a memristor having a plurality of operational modes. The multimodal memristor memory further includes a reconfigurable interface driver to select an operational mode of the plurality of operational modes of the memristor. The memristor is to operate in the operational mode selected by the reconfigurable interface driver.

公开(公告)号：US20160351259A1

公开(公告)日：2016-12-01

申请号：US15111981

申请日：2014-01-24

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Yoocharn Jeon ,  Erik Ordentlich ,  Gregg B. Lesartre ,  Siamak Tavallaei

IPC: G11C13/00 ,  G06F11/10 ,  G11C29/52 ,  G11C29/12

CPC classification number: G11C13/0069 ,  G06F11/1048 ,  G06F11/1068 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0064 ,  G11C29/12 ,  G11C29/52 ,  G11C2013/0076

Abstract: A memristor memory is disclosed. In an example, the memristor memory comprises a memristor component having a plurality of memristor cells. Each memristor cell is configured to change state based on application of an electric potential. The memristor memory also comprises a controller to read the state of the plurality of memristor cells and identify a subset of the plurality of memristor cells to rewrite. The controller writes the subset of the plurality of memristor cells, and the controller reads an updated state of the plurality of memristor cells to validate the subset was written correctly.

Abstract translation: 忆阻记忆体被公开。 在一个示例中，忆阻器存储器包括具有多个忆阻单元的忆阻器部件。 每个忆阻器单元被配置为基于施加电位而改变状态。 忆阻器存储器还包括控制器，用于读取多个忆阻单元的状态，并且识别多个忆阻器单元的子集以重写。 控制器写入多个忆阻器单元的子集，并且控制器读取多个忆阻器单元的更新状态以验证该子集被正确写入。

公开(公告)号：US20160189773A1

公开(公告)日：2016-06-30

申请号：US15065080

申请日：2016-03-09

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Siamak Tavallaei

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C5/04 ,  G11C13/0007 ,  G11C13/0033 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0047 ,  G11C2013/0073

Abstract: Apparatus to store data and methods to read memory cells are disclosed. A disclosed example method involves, during a read cycle of a memory cell, applying a current across the memory cell to read a content of the memory cell. During a subsequent read cycle of the memory cell, a subsequent current is applied across the memory cell in the opposite direction to read the content of the memory cell.

Abstract translation: 公开了存储用于读取存储器单元的数据和方法的装置。 所公开的示例性方法涉及在存储器单元的读取周期期间，跨过存储器单元施加电流以读取存储器单元的内容。 在存储器单元的随后的读取周期期间，沿相反方向跨越存储器单元施加随后的电流以读取存储器单元的内容。