公开(公告)号：US09451694B2

公开(公告)日：2016-09-20

申请号：US14663447

申请日：2015-03-19

Applicant: IBIS Innotech Inc.

Inventor： Chih-Kung Huang ,  Wei-Jen Lai ,  Wen-Chun Liu

IPC: H05K7/10 ,  H05K7/12 ,  H05K1/03 ,  H05K3/18 ,  H05K3/40 ,  H05K3/46 ,  H05K1/11 ,  H05K3/00 ,  H05K3/10

CPC classification number: H05K1/0373 ,  H01L21/568 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/48 ,  H01L25/04 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/9222 ,  H01L2224/96 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16195 ,  H01L2924/1715 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/19105 ,  H05K1/113 ,  H05K3/0014 ,  H05K3/105 ,  H05K3/188 ,  H05K3/4007 ,  H05K3/4697 ,  H05K2201/0236 ,  H05K2201/0376 ,  H05K2201/09063 ,  H05K2201/09118 ,  H05K2201/0919 ,  H05K2201/10151 ,  H05K2201/10515 ,  H05K2201/10674 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014

Abstract: A package structure includes a selective-electroplating epoxy compound, a first patterned circuit layer, second patterned circuit layers, metal studs, contact pads and conductive vias. The selective-electroplating epoxy compound includes cavities, a first surface and a second surface. The cavities disposed on the first surface in array arrangement. The selective-electroplating epoxy compound is formed by combining non-conductive metal complex. The metal studs are disposed in the cavities respectively and protruded from the first surface. The first patterned circuit layer is directly disposed on the first surface. The selective-electroplating epoxy compound exposes a top surface of the patterned circuit layer. The top surface is lower than or coplanar with the first surface. The second patterned circuit layers are directly disposed on the second surface. The conductive vias are disposed at the selective-electroplating epoxy compound to electrically connect the second patterned circuit layers to the corresponding metal studs.

Abstract translation: 封装结构包括选择性电镀环氧化合物，第一图案化电路层，第二图案化电路层，金属柱，接触焊盘和导电通孔。 选择性电镀环氧化合物包括空腔，第一表面和第二表面。 排列在第一表面上的空腔。 选择性电镀环氧化合物通过组合非导电金属络合物形成。 金属螺柱分别设置在空腔中并从第一表面突出。 第一图案化电路层直接设置在第一表面上。 选择性电镀环氧化合物暴露图案化电路层的顶表面。 顶面低于或与第一表面共面。 第二图案化电路层直接设置在第二表面上。 导电通孔设置在选择性电镀环氧化合物处，以将第二图案化电路层电连接到相应的金属螺柱。

公开(公告)号：US20150364448A1

公开(公告)日：2015-12-17

申请号：US14663450

申请日：2015-03-19

Applicant: IBIS Innotech Inc.

Inventor： Chih-Kung Huang ,  Wei-Jen Lai ,  Wen-Chun Liu

IPC: H01L25/065 ,  H01L21/78 ,  H01L21/768 ,  H01L23/31 ,  H01L23/522 ,  H01L23/498 ,  H01L23/552 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/17 ,  H01L24/20 ,  H01L24/96 ,  H01L2224/02379 ,  H01L2224/03462 ,  H01L2224/03552 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/08145 ,  H01L2224/08146 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16055 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/1703 ,  H01L2224/2518 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73209 ,  H01L2224/73227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/014

Abstract: A package structure includes a chip, a selective-electroplating epoxy compound, a patterned circuit layer and a plurality of conductive vias. The chip includes a plurality of solder pads, an active surface and a back surface opposite to the active surface. The solder pads are disposed on the active surface. The selective-electroplating epoxy compound covers the chip and includes non-conductive metal complex. The patterned circuit layer is disposed directly on a surface of the selective-electroplating epoxy compound. The conductive vias are disposed directly at the selective-electroplating epoxy compound to electrically connect the solder pads and the patterned circuit layer.

Abstract translation: 封装结构包括芯片，选择性电镀环氧化合物，图案化电路层和多个导电通孔。 芯片包括多个焊盘，有源表面和与有源表面相对的后表面。 焊盘设置在有源表面上。 选择性电镀环氧化合物覆盖芯片并且包括非导电金属络合物。 图案化电路层直接设置在选择性电镀环氧化合物的表面上。 导电通孔直接设置在选择性电镀环氧化合物上以电连接焊盘和图案化电路层。

公开(公告)号：US20150373849A1

公开(公告)日：2015-12-24

申请号：US14663447

申请日：2015-03-19

Applicant: IBIS Innotech Inc.

Inventor： Chih-Kung Huang ,  Wei-Jen Lai ,  Wen-Chun Liu

IPC: H05K1/11 ,  H05K1/18 ,  H05K1/03

CPC classification number: H05K1/0373 ,  H01L21/568 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/48 ,  H01L25/04 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/9222 ,  H01L2224/96 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16195 ,  H01L2924/1715 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/19105 ,  H05K1/113 ,  H05K3/0014 ,  H05K3/105 ,  H05K3/188 ,  H05K3/4007 ,  H05K3/4697 ,  H05K2201/0236 ,  H05K2201/0376 ,  H05K2201/09063 ,  H05K2201/09118 ,  H05K2201/0919 ,  H05K2201/10151 ,  H05K2201/10515 ,  H05K2201/10674 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014

Abstract: A package structure includes a selective-electroplating epoxy compound, a first patterned circuit layer, second patterned circuit layers, metal studs, contact pads and conductive vias. The selective-electroplating epoxy compound includes cavities, a first surface and a second surface. The cavities disposed on the first surface in array arrangement. The selective-electroplating epoxy compound is formed by combining non-conductive metal complex. The metal studs are disposed in the cavities respectively and protruded from the first surface. The first patterned circuit layer is directly disposed on the first surface. The selective-electroplating epoxy compound exposes a top surface of the patterned circuit layer. The top surface is lower than or coplanar with the first surface. The second patterned circuit layers are directly disposed on the second surface. The conductive vias are disposed at the selective-electroplating epoxy compound to electrically connect the second patterned circuit layers to the corresponding metal studs.

Abstract translation: 封装结构包括选择性电镀环氧化合物，第一图案化电路层，第二图案化电路层，金属柱，接触焊盘和导电通孔。 选择性电镀环氧化合物包括空腔，第一表面和第二表面。 排列在第一表面上的空腔。 选择性电镀环氧化合物通过组合非导电金属络合物形成。 金属螺柱分别设置在空腔中并从第一表面突出。 第一图案化电路层直接设置在第一表面上。 选择性电镀环氧化合物暴露图案化电路层的顶表面。 顶面低于或与第一表面共面。 第二图案化电路层直接设置在第二表面上。 导电通孔设置在选择性电镀环氧化合物处，以将第二图案化电路层电连接到相应的金属螺柱。