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公开(公告)号:US20230253475A1
公开(公告)日:2023-08-10
申请号:US18130334
申请日:2023-04-03
Applicant: Intel Corporation
Inventor: Tanay Gosavi , Chia-Ching Lin , Raseong Kim , Ashish Verma Penumatcha , Uygar Avci , Ian Young
IPC: H01L29/51 , H01L27/088 , H01L29/78 , H03H9/17 , H01L29/423
CPC classification number: H01L29/516 , H01L27/0886 , H01L29/7851 , H03H9/17 , H01L29/78391 , H01L29/42356
Abstract: Describe is a resonator that uses anti-ferroelectric (AFE) materials in the gate of a transistor as a dielectric. The use of AFE increases the strain/stress generated in the gate of the FinFET. Along with the usual capacitive drive, which is boosted with the increased polarization, additional current drive is also achieved from the piezoelectric response generated to due to AFE material. In some embodiments, the acoustic mode of the resonator is isolated using phononic gratings all around the resonator using the metal line above and vias' to body and dummy fins on the side. As such, a Bragg reflector is formed above or below the AFE based transistor. Increased drive signal from the AFE results in larger output signal and larger bandwidth.
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公开(公告)号:US11696514B2
公开(公告)日:2023-07-04
申请号:US17565106
申请日:2021-12-29
Applicant: Intel Corporation
Inventor: Chia-Ching Lin , Sasikanth Manipatruni , Tanay Gosavi , Dmitri Nikonov , Benjamin Buford , Kaan Oguz , John J. Plombon , Ian A. Young
Abstract: An apparatus is provided which comprises: a stack comprising a magnetoelectric (ME such as BiFeO3, (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, SmBiFeO3, Cr2O3, etc.) material and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, graphene, etc.); a magnet adjacent to a first portion of the TMD of the stack; a first interconnect adjacent to the magnet; a second interconnect adjacent to the ME material of the stack; and a third interconnect adjacent to a second portion of the TMD of the stack.
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公开(公告)号:US11508903B2
公开(公告)日:2022-11-22
申请号:US16022094
申请日:2018-06-28
Applicant: Intel Corporation
Inventor: Angeline Smith , Ian Young , Kaan Oguz , Sasikanth Manipatruni , Christopher Wiegand , Kevin O'Brien , Tofizur Rahman , Noriyuki Sato , Benjamin Buford , Tanay Gosavi
Abstract: An insertion layer for perpendicular spin orbit torque (SOT) memory devices between the SOT electrode and the free magnetic layer, memory devices and computing platforms employing such insertion layers, and methods for forming them are discussed. The insertion layer is predominantly tungsten and improves thermal stability and perpendicular magnetic anisotropy in the free magnetic layer.
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公开(公告)号:US20220352358A1
公开(公告)日:2022-11-03
申请号:US17833662
申请日:2022-06-06
Applicant: Intel Corporation
Inventor: Chia-Ching Lin , Sasikanth Manipatruni , Tanay Gosavi , Sou-Chi Chang , Dmitri Nikonov , Ian A. Young
Abstract: An apparatus is provided which comprises: a first stack comprising a magnetic insulating material (MI such as, EuS, EuO, YIG, TmIG, or GaMnAs) and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, or graphene; a second stack comprising an MI material and a TMD, wherein the first and second stacks are separated by an insulating material (e.g., oxide); a magnet (e.g., a ferromagnet or a paramagnet) adjacent to the TMDs of the first and second stacks, and also adjacent to the insulating material; and a magnetoelectric material (e.g., (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, or (SmBi)FeO3) adjacent to the magnet.
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公开(公告)号:US20220199783A1
公开(公告)日:2022-06-23
申请号:US17133087
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Ashish Verma Penumatcha , Kevin O'Brien , Chelsey Dorow , Kirby Maxey , Carl Naylor , Tanay Gosavi , Sudarat Lee , Chia-Ching Lin , Seung Hoon Sung , Uygar Avci
Abstract: A transistor includes a first channel layer over a second channel layer, where the first and the second channel layers include a monocrystalline transition metal dichalcogenide (TMD). The transistor structure further includes a source structure coupled to a first end of the first and second channel layers, a drain structure coupled to a second end of the first and second channel layers, a gate structure between the source material and the drain material, and between the first channel layer and the second channel layer. The transistor further includes a spacer laterally between the gate structure and the and the source structure and between the gate structure and the drain structure. A liner is between the spacer and the gate structure. The liner is in contact with the first channel layer and the second channel layer and extends between the gate structure and the respective source structure and the drain structure.
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公开(公告)号:US20220115438A1
公开(公告)日:2022-04-14
申请号:US17070808
申请日:2020-10-14
Applicant: Intel Corporation
Inventor: Hai Li , Dmitri Nikonov , Chia-Ching Lin , Tanay Gosavi , Ian Young
Abstract: A differential magnetoelectric spin-orbit (MESO) logic device is provided where two ports are used to connect the spin orbital module of the MESO device and a ferroelectric capacitor. In some examples, an insulating layer is added to decouple current paths.
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公开(公告)号:US11257613B2
公开(公告)日:2022-02-22
申请号:US15942434
申请日:2018-03-31
Applicant: Intel Corporation
Inventor: Kaan Oguz , Tanay Gosavi , Sasikanth Manipatruni , Charles Kuo , Mark Doczy , Kevin O'Brien
Abstract: A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit torque material, where the SOT material includes iridium and manganese and a perpendicular magnetic tunnel junction (pMTJ) device on a portion of the electrode. The pMTJ device includes a free magnet structure electrode, a fixed layer and a tunnel barrier between the free layer and the fixed layer and a SAF structure above the fixed layer. The Ir—Mn SOT material and the free magnet have an in-plane magnetic exchange bias.
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公开(公告)号:US11245068B2
公开(公告)日:2022-02-08
申请号:US16009035
申请日:2018-06-14
Applicant: Intel Corporation
Inventor: Chia-Ching Lin , Sasikanth Manipatruni , Tanay Gosavi , Dmitri Nikonov , Benjamin Buford , Kaan Oguz , John J. Plombon , Ian A. Young
Abstract: An apparatus is provided which comprises: a stack comprising a magnetoelectric (ME such as BiFeO3, (LaBi)FeO3, LuFeO3, PMN-PT, PZT, AlN, SmBiFeO3, Cr2O3, etc.) material and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, graphene, etc.); a magnet adjacent to a first portion of the TMD of the stack; a first interconnect adjacent to the magnet; a second interconnect adjacent to the ME material of the stack; and a third interconnect adjacent to a second portion of the TMD of the stack.
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公开(公告)号:US20210305398A1
公开(公告)日:2021-09-30
申请号:US16833375
申请日:2020-03-27
Applicant: Intel Corporation
Inventor: Sou-Chi Chang , Chia-Ching Lin , Nazila Haratipour , Tanay Gosavi , I-Cheng Tung , Seung Hoon Sung , Ian Young , Jack Kavalieros , Uygar Avci , Ashish Verma Penumatcha
Abstract: A capacitor device includes a first electrode having a first metal alloy or a metal oxide, a relaxor ferroelectric layer adjacent to the first electrode, where the ferroelectric layer includes oxygen and two or more of lead, barium, manganese, zirconium, titanium, iron, bismuth, strontium, neodymium, potassium, or niobium and a second electrode coupled with the relaxor ferroelectric layer, where the second electrode includes a second metal alloy or a second metal oxide.
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公开(公告)号:US10861861B2
公开(公告)日:2020-12-08
申请号:US16221083
申请日:2018-12-14
Applicant: Intel Corporation
Inventor: Chia-Ching Lin , Sasikanth Manipatruni , Tanay Gosavi , Dmitri Nikonov , Sou-Chi Chang , Uygar E. Avci , Ian A. Young
IPC: H01L27/11509 , H01L27/11592
Abstract: An embodiment includes a system comprising: first, second, third, fourth, fifth, and sixth layers, (a) the second, third, fourth, and fifth layers being between the first and sixth layers, and (b) the fourth layer being between the third and fifth layers; a formation between the first and second layers, the formation including: (a) a material that is non-amorphous; and (b) first and second sidewalls; a capacitor between the second and sixth layers, the capacitor including: (a) the third, fourth, and fifth layers, and (b) an electrode that includes the third layer and an additional electrode that includes the fifth layer; and a switching device between the first and sixth layers; wherein: (a) the first layer includes a metal and the sixth layer includes the metal, and (b) the fourth layer includes a Perovskite material. Other embodiments are addressed herein.
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