Methods for forming moisture blocking layers
    1.
    发明授权
    Methods for forming moisture blocking layers 失效
    形成防潮层的方法

    公开(公告)号:US5866476A

    公开(公告)日:1999-02-02

    申请号:US826483

    申请日:1997-03-27

    摘要: A method for forming an insulating layer for a microelectronic device includes the steps of forming a conductive pattern on a surface of a microelectronic substrate, and forming a spin-on-glass layer on the surface of the microelectronic substrate covering the conductive pattern. The spin-on-glass layer is baked at a temperature in the range of 400.degree. C. to 750.degree. C., and a moisture blocking layer is formed on the baked spin-on-glass layer. By reducing moisture absorbed from the air into the spin-on-glass layer, a relatively low etch rate and a relatively low dielectric constant can be maintained for the spin-on-glass layer. Related structures are also discussed.

    摘要翻译: 用于形成微电子器件绝缘层的方法包括以下步骤:在微电子衬底的表面上形成导电图案,并在覆盖导电图案的微电子衬底的表面上形成旋涂玻璃层。 旋涂玻璃层在400℃至750℃的温度范围内烘烤,并在烘烤的旋涂玻璃层上形成防潮层。 通过减少从空气吸收到自旋玻璃层中的水分,可以保持相对低的蚀刻速率和相对低的介电常数,用于旋涂玻璃层。 还讨论了相关结构。

    Multiple etch methods for forming contact holes in microelectronic
devices including SOG layers and capping layers thereon
    2.
    发明授权
    Multiple etch methods for forming contact holes in microelectronic devices including SOG layers and capping layers thereon 失效
    用于在微电子器件中形成接触孔的多种蚀刻方法,包括其上的SOG层和覆盖层

    公开(公告)号:US6117785A

    公开(公告)日:2000-09-12

    申请号:US891360

    申请日:1997-07-10

    CPC分类号: H01L21/76804 H01L21/31144

    摘要: A method for forming a microelectronic device includes the steps of forming a spin-on-glass layer on a microelectronic substrate, and forming a capping layer on the spin-on-glass layer opposite the substrate. A masking layer is formed on the capping layer opposite the substrate wherein the masking layer exposes portions of the capping layer and the spin-on-glass layer. The exposed portions of said capping layer and the spin-on-glass layer are etched using the masking layer as an etch mask to thereby form a contact hole through the capping layer and the spin-on-glass layer wherein protruding edge portions of the capping layer extend beyond the spin-on-glass layer adjacent the contact hole. The mask layer is removed, and the protruding edge portions of the capping layer are removed from adjacent the contact hole.

    摘要翻译: 一种形成微电子器件的方法包括以下步骤:在微电子衬底上形成旋涂玻璃层,并在与衬底相对的旋转玻璃层上形成覆盖层。 在与衬底相对的覆盖层上形成掩模层,其中掩模层露出覆盖层和旋涂玻璃层的部分。 使用掩模层作为蚀刻掩模蚀刻所述覆盖层和旋涂玻璃层的暴露部分,从而通过覆盖层和旋涂玻璃层形成接触孔,其中封盖的突出边缘部分 层延伸超过接触孔附近的旋涂玻璃层。 去除掩模层,并且覆盖层的突出边缘部分从邻近的接触孔去除。

    Method for forming conductive line of semiconductor device
    4.
    发明授权
    Method for forming conductive line of semiconductor device 失效
    形成半导体器件导线的方法

    公开(公告)号:US5629238A

    公开(公告)日:1997-05-13

    申请号:US557534

    申请日:1995-11-14

    CPC分类号: H01L21/76831 H01L21/76877

    摘要: A method for forming a conductive line uses a fluorine doped oxide layer as an insulating layer between conductive lines. The method comprises the steps of: (a) forming a fluorine doped oxide layer on a semiconductor substrate on which a lower structure is formed; (b) etching the oxide layer of the region where a conductive line is to be formed, thereby forming a trench; (c) forming an insulating layer on the overall surface of the resultant substrate; depositing conductive material on the resultant substrate; and (e) etching back the conductive material so that the conductive material is left on the trench only, thereby forming a conductive line. In this method, the conductive line is formed of aluminum-containing material and the insulating layer is formed of silicon dioxide. In the present invention, the insulating layer is interposed between the fluorine doped oxide layer and the aluminum-containing conductive line and thus the conductive line is free from corrosion.

    摘要翻译: 形成导线的方法使用氟掺杂氧化物层作为导线之间的绝缘层。 该方法包括以下步骤:(a)在形成下部结构的半导体衬底上形成氟掺杂氧化物层; (b)蚀刻要形成导电线的区域的氧化物层,从而形成沟槽; (c)在所得基板的整个表面上形成绝缘层; 在所得基板上沉积导电材料; 和(e)蚀刻导电材料,使得导电材料仅留在沟槽上,从而形成导电线。 在该方法中,导电线由含铝材料形成,绝缘层由二氧化硅形成。 在本发明中,绝缘层介于氟掺杂氧化物层和含铝导电线之间,因此导电线无腐蚀。

    Method and apparatus for monitoring human activity pattern
    5.
    发明申请
    Method and apparatus for monitoring human activity pattern 有权
    监测人类活动模式的方法和装置

    公开(公告)号:US20060161079A1

    公开(公告)日:2006-07-20

    申请号:US11332586

    申请日:2006-01-17

    IPC分类号: A61B5/103 A61B5/117

    摘要: A method and apparatus for monitoring a human activity pattern irrespective of the wearing position of the sensor unit by a user and a direction of the sensor unit are provided. The method for monitoring an inertia movement signal according to a movement of a user using a sensor unit attached to the user; detecting a direction of the sensor unit from the inertia movement signal; detecting a wearing location of the sensor unit by using acceleration and direction; determining the activity pattern of the user from inertia sensors; and delivering physical activity data corresponding to at least one caloric consumption, number of steps, and movement distance.

    摘要翻译: 提供了一种用于监视人类活动模式的方法和装置,而不管使用者的传感器单元的磨损位置和传感器单元的方向如何。 根据用户使用附接到用户的传感器单元的移动来监测惯性运动信号的方法; 从所述惯性运动信号检测所述传感器单元的方向; 通过加速度和方向检测传感器单元的磨损位置; 从惯性传感器确定用户的活动模式; 以及递送对应于至少一种热量消耗,步数和移动距离的体育活动数据。

    Apparatus and method for measuring bio signals
    6.
    发明申请
    Apparatus and method for measuring bio signals 审中-公开
    用于测量生物信号的装置和方法

    公开(公告)号:US20060100533A1

    公开(公告)日:2006-05-11

    申请号:US11267291

    申请日:2005-11-07

    IPC分类号: A61B5/02 A61B5/04

    摘要: An apparatus and a method for measuring bio signals are provided. The apparatus includes a body, a plurality of electrodes, and a controller. The body is filled with predetermined packing material. The electrodes are positioned at an outermost portion of the body and touch the skin of a subject to measure bio signals from the subject. The controller is positioned inside of the body and connected with the electrodes to analyze the bio signals measured from the electrodes and output bio information of the subject.

    摘要翻译: 提供了用于测量生物信号的装置和方法。 该装置包括主体,多个电极和控制器。 身体充满预定的包装材料。 电极定位在身体的最外侧部分并且接触受试者的皮肤以测量来自受试者的生物信号。 控制器位于体内并与电极连接,以分析从电极测量的生物信号并输出​​对象的生物信息。

    Trench isolation methods including plasma chemical vapor deposition and
lift off
    9.
    发明授权
    Trench isolation methods including plasma chemical vapor deposition and lift off 失效
    沟槽隔离方法,包括等离子体化学气相沉积和剥离

    公开(公告)号:US6001696A

    公开(公告)日:1999-12-14

    申请号:US52453

    申请日:1998-03-31

    CPC分类号: H01L21/76224

    摘要: Isolation methods for integrated circuits use plasma chemical vapor deposition of an insulating layer followed by lift-off to remove at least portions of the insulating layer. In particular, a lift-off layer is formed on an integrated circuit substrate. The lift-off layer and the integrated circuit substrate beneath the lift-off layer are etched to form a trench in the integrated circuit substrate. The trench defines a first region on one side of the trench and a second region that is narrower than the first region on the other side of the trench. Plasma chemical vapor deposition is then performed to form an insulating layer filling the trench, on the first region and on the second region, with the insulating layer on the first region being thicker than on the second region. The insulating layer is then etched to expose the lift-off layer in the second region. The lift-off layer is then lifted off from the first region. Isolation trenches so formed can have improved isolation characteristics and can be planarized with reduced dishing effects.

    摘要翻译: 用于集成电路的隔离方法使用绝缘层的等离子体化学气相沉积,然后剥离以去除绝缘层的至少一部分。 特别地,在集成电路基板上形成剥离层。 在剥离层下方的剥离层和集成电路基板被蚀刻以在集成电路基板中形成沟槽。 沟槽限定在沟槽的一侧上的第一区域和比沟槽另一侧上的第一区域窄的第二区域。 然后进行等离子体化学气相沉积以在第一区域和第二区域上形成填充沟槽的绝缘层,第一区域上的绝缘层比第二区域厚。 然后蚀刻绝缘层以暴露第二区域中的剥离层。 然后将剥离层从第一区域提起。 如此形成的绝缘沟槽可以具有改进的隔离特性,并且可以通过减少的凹陷效应来平坦化。