公开(公告)号：US6011303A

公开(公告)日：2000-01-04

申请号：US978648

申请日：1997-11-26

申请人： Junichi Tanaka ,  Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Taku Sato ,  Kenji Watanabe ,  Kenji Utida ,  Masatoshi Ohara ,  Takeo Ogihara ,  Satoshi Murata ,  Tsutomu Kubota

发明人： Junichi Tanaka ,  Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Taku Sato ,  Kenji Watanabe ,  Kenji Utida ,  Masatoshi Ohara ,  Takeo Ogihara ,  Satoshi Murata ,  Tsutomu Kubota

IPC分类号： H01L23/48 ,  H01L23/02 ,  H01L23/04 ,  H01L23/31 ,  H01L23/50 ,  H01L23/66

CPC分类号： H01L23/315 ,  H01L23/66 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/30107

摘要： An electronic component includes a substrate portion, a bank portion, a plurality of lead members, an anchor hole, and at least a pair of notches. A chip is supported on the substrate portion. The bank portion is formed on a periphery of the substrate portion to surround the chip. The plurality of lead members are made of conductive strip pieces, and each lead member has an inner lead electrically connected to the chip and an outer lead extending to an outside. The substrate portion and the bank portion are integrally molded with a resin to include the lead members, so that the inner and outer leads are fixed to a connecting portion between the substrate portion and the bank portion. The anchor hole is formed in a portion where each of the lead members is in contact with the bank portion, and is filled with a resin. The pair of notches are formed in two ends of each of the lead members to sandwich the anchor hole.

摘要翻译： 电子部件包括基板部分，堤部分，多个引线部件，锚定孔以及至少一对凹口。 芯片支撑在基板部分上。 堤部分形成在基片部分的周围以围绕芯片。 多个引线构件由导电条片制成，并且每个引线构件具有电连接到芯片的内引线和延伸到外部的外引线。 基板部分和堤部分用树脂一体地模制成包括引线部件，使得内引线和外引线固定到基片部分和堤部之间的连接部分。 锚定孔形成在每个引导部件与堤部分接触的部分中，并且填充有树脂。 一对切口形成在每个引导构件的两端以夹持锚定孔。

公开(公告)号：US5970322A

公开(公告)日：1999-10-19

申请号：US4447

申请日：1998-01-08

申请人： Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Taku Sato ,  Junichi Tanaka ,  Kenji Uchida ,  Masatoshi Ohara ,  Takeo Ogihara ,  Satoshi Murata ,  Tsutomu Kubota

发明人： Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Taku Sato ,  Junichi Tanaka ,  Kenji Uchida ,  Masatoshi Ohara ,  Takeo Ogihara ,  Satoshi Murata ,  Tsutomu Kubota

IPC分类号： H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/565 ,  H01L23/295 ,  H01L23/3135 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181

摘要： An ultrahigh-frequency electronic component has an ultrahigh-frequency chip encased in a molded-resin package. The ultrahigh-frequency electronic component includes a first sealing layer encasing the ultrahigh-frequency chip therein and a second sealing layer encasing the first sealing layer therein. The first sealing layer contains a number of voids or minute air bubbles therein which are effective in reducing the permittivity of the first sealing layer. A method of manufacturing the ultrahigh-frequency electronic component is also disclosed.

摘要翻译： 超高频电子元件具有封装在模制树脂封装中的超高频芯片。 超高频电子部件包括在其中包围超高频芯片的第一密封层和在其中包封第一密封层的第二密封层。 第一密封层包含多个空隙或微小的气泡，其有效降低第一密封层的介电常数。 还公开了一种制造超高频电子部件的方法。

公开(公告)号：US5904501A

公开(公告)日：1999-05-18

申请号：US824459

申请日：1997-03-26

申请人： Masatoshi Ohara ,  Takeo Ogihara ,  Satoshi Murata ,  Kenji Uchida ,  Tsutomu Kubota ,  Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Taku Sato ,  Junichi Tanaka

发明人： Masatoshi Ohara ,  Takeo Ogihara ,  Satoshi Murata ,  Kenji Uchida ,  Tsutomu Kubota ,  Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Taku Sato ,  Junichi Tanaka

IPC分类号： H01L23/02 ,  H01L21/00 ,  H01L23/04 ,  H01L23/10 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/67126 ,  H01L23/10 ,  H01L2924/0002 ,  H01L2924/09701 ,  Y10S257/924

摘要： A hollow package manufacturing method includes the adhesive spreading step, the adhesive applying step, and the cap adhering step. In the adhesive spreading step, an adhesive is spread on a circular table to a uniform thickness. In the adhesive applying step, an open end face of a cylindrical cap having a bottom is urged against the circular table to apply the adhesive to the cap. In the cap adhering step, the cap applied with the adhesive is adhered to a case. A hollow package manufacturing apparatus is also disclosed.

摘要翻译： 中空包装制造方法包括粘合剂铺展步骤，粘合剂施加步骤和盖子粘合步骤。 在粘合剂铺展步骤中，将粘合剂铺展在圆桌上以均匀的厚度。 在粘合剂涂布步骤中，具有底部的圆筒形盖的开口端面被推靠在圆台上以将粘合剂施加到盖上。 在盖接合步骤中，将涂有粘合剂的盖子粘附到壳体上。 还公开了一种中空包装制造装置。

公开(公告)号：US5889232A

公开(公告)日：1999-03-30

申请号：US855537

申请日：1997-05-13

申请人： Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Taku Sato ,  Junichi Tanaka ,  Kenji Uchida ,  Masatoshi Ohara ,  Takeo Ogihara ,  Satoshi Murata ,  Tsutomu Kubota

发明人： Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Taku Sato ,  Junichi Tanaka ,  Kenji Uchida ,  Masatoshi Ohara ,  Takeo Ogihara ,  Satoshi Murata ,  Tsutomu Kubota

IPC分类号： H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/28

CPC分类号： H01L21/565 ,  H01L23/295 ,  H01L23/3135 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181

摘要： An ultrahigh-frequency electronic component has an ultrahigh-frequency chip encased in a molded-resin package. The ultrahigh-frequency electronic component includes a first sealing layer encasing the ultrahigh-frequency chip therein and a second sealing layer encasing the first sealing layer therein. The first sealing layer contains a number of voids or minute air bubbles therein which are effective in reducing the permittivity of the first sealing layer. A method of manufacturing the ultrahigh-frequency electronic component is also disclosed.

摘要翻译： 超高频电子元件具有封装在模制树脂封装中的超高频芯片。 超高频电子部件包括在其中包围超高频芯片的第一密封层和在其中包封第一密封层的第二密封层。 第一密封层包含多个空隙或微小的气泡，其有效降低第一密封层的介电常数。 还公开了一种制造超高频电子部件的方法。

公开(公告)号：US5956574A

公开(公告)日：1999-09-21

申请号：US808420

申请日：1997-02-28

申请人： Seiji Ichikawa ,  Junichi Tanaka ,  Tomoaki Hirokawa ,  Taku Sato ,  Tomoaki Kimura ,  Satoshi Murata ,  Tsutomu Kubota ,  Takeo Ogihara ,  Kenji Uchida ,  Kenji Watanabe ,  Tsutomu Noguti

发明人： Seiji Ichikawa ,  Junichi Tanaka ,  Tomoaki Hirokawa ,  Taku Sato ,  Tomoaki Kimura ,  Satoshi Murata ,  Tsutomu Kubota ,  Takeo Ogihara ,  Kenji Uchida ,  Kenji Watanabe ,  Tsutomu Noguti

IPC分类号： H01L21/56 ,  H01L21/48 ,  H01L23/50 ,  H01L21/44 ,  H01L21/50

CPC分类号： H01L21/4835 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/16152 ,  H01L2924/30107

摘要： In a lead frame flash removing method and apparatus, a lead frame is molded integrally with a case. After molding, abrasive agent-mixed water is sprayed to a surface of the lead frame where a flash is formed. The lead frame is dipped in an electrolytic solution and applying a DC voltage is applied across the lead frame and an electrode in the electrolytic solution, thereby electrolytically processing the lead frame. After the electrolytic process, an external force is applied to the surface of the lead frame, thereby removing the flash.

摘要翻译： 在引线框架闪光去除方法和装置中，引线框架与壳体一体地模制。 在模制之后，将研磨剂混合水喷射到形成闪光的引线框架的表面。 将引线框架浸入电解液中，施加直流电压施加在引线框架和电解液中的电极，由此对引线框架进行电解处理。 在电解处理之后，将外力施加到引线框架的表面，从而去除闪光。

公开(公告)号：US5905301A

公开(公告)日：1999-05-18

申请号：US792394

申请日：1997-02-03

申请人： Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Junichi Tanaka ,  Taku Sato ,  Satoshi Murata ,  Tsutomu Kubota ,  Takeo Ogihara ,  Kenji Uchida

发明人： Seiji Ichikawa ,  Tomoaki Hirokawa ,  Tomoaki Kimura ,  Junichi Tanaka ,  Taku Sato ,  Satoshi Murata ,  Tsutomu Kubota ,  Takeo Ogihara ,  Kenji Uchida

IPC分类号： H01L23/04 ,  H01L23/02 ,  H01L23/057 ,  H01L23/08 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/66 ,  H01L23/10 ,  H01L29/82

CPC分类号： H01L24/49 ,  H01L23/057 ,  H01L23/315 ,  H01L23/49541 ,  H01L23/49555 ,  H01L23/49861 ,  H01L23/66 ,  H01L2224/16245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/85201 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01067 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12033 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025

摘要： A package of the present invention comprises a base molded integrally with a lead frame by resin, a chip mounted on the lead frame, and a cap made of resin, which covers the chip and is fixed to the base. The base includes a substrate portion sealing the lead frame therein, a frame-shaped bank portion formed at a periphery of an upper surface of said substrate portion, the bank portion having said lead frame interposed between it snd the substrate portion, and an anchor portion formed at a portion of the lead frame interposed between the substrate portion and the bank portion. The chip is mounted on a region of the lead frame surrounded by the bank portion. The cap is fixed to the bank portion.

摘要翻译： 本发明的封装包括：通过树脂与引线框架整体模制的基座，安装在引线框架上的芯片和覆盖芯片并固定到基座的由树脂制成的盖。 底座包括密封引线框架的基板部分，形成在所述基板部分的上表面的周边的框状的堤部分，其中插入在基板部分之间的引线框架的堤岸部分和锚定部分 形成在插入在基板部分和堤岸部分之间的引线框架的一部分。 芯片安装在由堤部分围绕的引线框架的区域上。 盖子固定在银行部分。

公开(公告)号：US09973763B2

公开(公告)日：2018-05-15

申请号：US13990893

申请日：2011-12-02

申请人： Masaru Ikeda ,  Junichi Tanaka ,  Yoshitaka Morigami

发明人： Masaru Ikeda ,  Junichi Tanaka ,  Yoshitaka Morigami

IPC分类号： H04N7/18 ,  H04N19/176 ,  H04N19/117 ,  H04N19/182 ,  H04N19/80 ,  H04N19/436 ,  H04N19/86 ,  H04N19/597 ,  H04N19/36

CPC分类号： H04N19/176 ,  H04N19/117 ,  H04N19/182 ,  H04N19/36 ,  H04N19/436 ,  H04N19/597 ,  H04N19/80 ,  H04N19/86

摘要： An image processing device including a decoding section configured to decode an image from an encoded stream, a determination section configured to perform determination processes of determining whether to apply a deblocking filter to neighboring blocks neighboring across a block boundary within an image to be decoded by the decoding section, a filtering section configured to apply a deblocking filter to neighboring blocks to which the determination section has determined to apply a deblocking filter, and a control section configured to allow the determination section to perform the determination processes for a vertical block boundary and a horizontal block boundary using pixels of the neighboring blocks of a reconstruct image as reference pixels.

公开(公告)号：US09723304B2

公开(公告)日：2017-08-01

申请号：US14005980

申请日：2012-03-29

申请人： Junichi Tanaka ,  Yoichi Yagasaki

发明人： Junichi Tanaka ,  Yoichi Yagasaki

IPC分类号： H04N7/12 ,  H04N19/152 ,  H04N19/172 ,  H04N19/15 ,  H04N19/115 ,  H04N19/61

CPC分类号： H04N19/172 ,  H04N19/115 ,  H04N19/15 ,  H04N19/152 ,  H04N19/61

摘要： The present technique relates to an image processing device and a method therefor allowing rate control to be performed more easily. An image encoding device that encodes image data to generate an encoded stream includes: a setting unit configured to set binary parameters used for defining the size, the accumulated data amount, and the like of a hypothetical decoder defined in the encoded stream obtained by encoding the image data in binary data generated by arithmetic coding; an encoding unit configured to encode image data to generate an encoded stream; and a transmitting unit configured to transmit the binary parameter set by the setting unit and the encoded stream generated by the encoding unit to an image decoding device that decodes the encoded stream via a predetermined transmission path such as a recording medium or a network. The present disclosure can be applied to image processing devices, for example.

公开(公告)号：US09706205B2

公开(公告)日：2017-07-11

申请号：US13990489

申请日：2012-01-18

申请人： Junichi Tanaka

发明人： Junichi Tanaka

IPC分类号： H04N19/124 ,  H04N19/463 ,  H04N19/174 ,  H04N19/70 ,  H04N19/103 ,  H04N19/126 ,  H04N19/157 ,  H04N19/31 ,  H04N19/50 ,  H04N19/44

CPC分类号： H04N19/124 ,  H04N19/103 ,  H04N19/126 ,  H04N19/157 ,  H04N19/174 ,  H04N19/31 ,  H04N19/44 ,  H04N19/463 ,  H04N19/50 ,  H04N19/70

摘要： An image processing device including an acquiring section configured to acquire quantization matrix parameters from an encoded stream in which the quantization matrix parameters defining a quantization matrix are set within a parameter set which is different from a sequence parameter set and a picture parameter set, a setting section configured to set, based on the quantization matrix parameters acquired by the acquiring section, a quantization matrix which is used when inversely quantizing data decoded from the encoded stream, and an inverse quantization section configured to inversely quantize the data decoded from the encoded stream using the quantization matrix set by the setting section.

公开(公告)号：US09123504B2

公开(公告)日：2015-09-01

申请号：US13380526

申请日：2010-06-23

申请人： Atsuko Yamaguchi ,  Yoshinori Momonoi ,  Junichi Tanaka ,  Hiroki Kawada

发明人： Atsuko Yamaguchi ,  Yoshinori Momonoi ,  Junichi Tanaka ,  Hiroki Kawada

IPC分类号： H04N9/47 ,  H04N7/18 ,  H01J37/28 ,  H01J37/244 ,  H01L21/66 ,  G06T7/00 ,  G02B21/36 ,  G02B21/00 ,  G06T5/50

CPC分类号： H01J37/28 ,  G01B2210/56 ,  G02B21/002 ,  G02B21/361 ,  G02B21/365 ,  G02B21/367 ,  G06T5/50 ,  G06T7/0004 ,  G06T7/0006 ,  G06T7/0008 ,  G06T7/001 ,  G06T2207/10016 ,  G06T2207/10056 ,  G06T2207/10061 ,  G06T2207/20081 ,  G06T2207/30141 ,  G06T2207/30148 ,  H01J37/244 ,  H01J2237/24578 ,  H01J2237/24592 ,  H01J2237/2816 ,  H01J2237/2817 ,  H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided are a semiconductor inspection device and a semiconductor inspection method such that in a specimen image in a single field of view obtained by an electron microscope, it is possible to suppress variations in the edge position measurement error attributable to the materials and structures of the lower layers of measured patterns by a first method, wherein the area in the field of view obtained by electron beam scanning is divided into a plurality of regions on the basis of information regarding the structures and materials of the object to be observed and the electron beam scanning conditions are changed for individual regions (805, 806), a second method, wherein, the image processing conditions are changed for individual regions resulting from division of the obtained images, or a third method, wherein the edge detection conditions are changed for individual regions resulting from the division within the edge inspection regions of the obtained images.

摘要翻译： 提供一种半导体检查装置和半导体检查方法，使得在通过电子显微镜获得的单个视场中的样本图像中，可以抑制归因于下部的材料和结构的边缘位置测量误差的变化 通过第一方法测量图案层，其中通过电子束扫描获得的视野中的区域基于关于待观察物体的结构和材料的信息以及电子束扫描被分成多个区域 对于各个区域（805,806）的条件改变，第二种方法，其中，针对由所获得的图像的划分产生的各个区域改变图像处理条件，或者第三种方法，其中针对各个区域改变边缘检测条件 由获得的图像的边缘检查区域内的划分产生。