Abstract:
A method for manufacturing an electrode for hydrogen production using a tungsten carbide nanoflake may include: forming a tungsten carbide nanoflake on a nanocrystalline diamond film by means of a chemical vapor deposition process in which hydrogen plasma is applied; and increasing activity of the tungsten carbide nanoflake to a hydrogen evolution reaction by removing an oxide layer or a graphene layer from a surface of the tungsten carbide nanoflake. Since an oxide layer and/or a graphene layer of a surface of tungsten carbide is removed by means of cyclic cleaning after tungsten carbide is formed, hydrogen evolution reaction (HER) activity of the tungsten carbide may be increased, thereby enhancing utilization as a catalyst electrode.
Abstract:
The present disclosure relates to a nonlinearity compensation circuit for a memristive device. The circuit according to an embodiment includes at least one power source unit to apply an input pulse; a modulation unit connected to the at least one power source unit to adjust a pulse width of an update pulse to be applied to the memristive device; and the memristive device to which the modulated update pulse is applied.
Abstract:
A method for manufacturing a thin film solar cell includes: depositing a transparent first rear electrode on a first surface of a transparent substrate; depositing a second rear electrode having a high-conductive metal on the first rear electrode; performing a first laser scribing process to separate a double layer of the first and second rear electrodes; depositing a light absorption layer having selenium (Se) or sulfur (S) on the second rear electrode; performing a second laser scribing process by inputting a laser to a second surface of the transparent substrate to separate the light absorption layer; depositing a transparent electrode on the light absorption layer; and performing a third laser scribing process by inputting a laser to the second surface to separate the transparent electrode. Accordingly, patterning may be performed in a substrate-incident laser manner to improve price, productivity and precision of the patterning process.
Abstract:
A flash memory device including multi-layered oxide for neuromorphic computing system is disclosed. According to embodiments, the flash memory device includes: a substrate; a channel layer disposed on the substrate; source/drain patterns disposed on both ends of the channel layer; a tunneling insulating layer disposed on the channel layer; a trapping layer disposed on the tunneling insulating layer and including a plurality of nitride layers; an intermediate barrier layer interposed within the trapping layer, and including an oxide layer, the oxide layer having a high dielectric constant; a blocking insulating layer disposed on the trapping layer; and an upper gate disposed on the blocking insulating layer.
Abstract:
A superhard boron carbide thin film with superior high temperature oxidation resistance has a structure in which a boron carbide layer and a silicon carbide layer are repeatedly stacked in an alternating manner. Accordingly, the high temperature oxidation resistance of the boron carbide thin film is enhanced, allowing the application as coating materials for wear resistant tools such as cutting tools.
Abstract:
A neuromorphic circuit according to example embodiments of inventive concepts includes a first neuron array including a plurality of neuron circuits generating a spike signal; a first synapse array including a plurality of first synapse circuits to process and output the spike signal transmitted from the first neuron array; a second synapse array including a plurality of second synapse circuits; a first connecting block positioned between the first synapse array and the second synapse array and connecting the first synapse array and the second synapse array in response to a control signal; and a control logic to generate the control signal. The neuromorphic circuit may easily expand the size of the synapse element array to a desired size by using a connecting block.
Abstract:
The present disclosure relates to a Se or S based thin film solar cell and a method for fabricating the same, which may improve the structural and electrical characteristics of an upper transparent electrode layer by controlling a structure of a lower transparent electrode layer in a thin film solar cell having a Se or S based light absorption layer. In the Se or S based thin film solar cell having a light absorption layer and a front transparent electrode layer, the front transparent electrode layer comprises a lower transparent electrode layer and an upper transparent electrode layer, and the lower transparent electrode layer comprises an oxide-based thin film obtained by blending an impurity element into a mixed oxide in which Zn oxide and Mg oxide are mixed (also, referred to as an ‘impurity-doped Zn—Mg-based oxide thin film’).
Abstract:
A method for manufacturing a cubic boron nitride (c-BN) thin film includes: applying a pulse-type bias voltage to a substrate; and forming the cubic boron nitride thin film by bombarding the substrate with ions using the pulse-type bias voltage. To control the compressive residual stress of the cubic boron nitride thin film, ON/OFF time ratio of the pulse-type bias voltage may be controlled. The compressive residual stress that is applied to the thin film can be minimized by using the pulse-type voltage as a negative bias voltage applied to the substrate. In addition, the deposition of the c-BN thin film can be performed in a low ion energy region by increasing the ion/neutral particle flux ratio through the control of the ON/OFF time ratio of the pulse-type voltage.
Abstract:
A flash memory device is provided. The flash memory device is disposed on a substrate, a channel layer made of a two-dimensional material, sources and drains disposed at both ends of the channel layer, a tunneling insulating layer having a first dielectric constant and a tunneling insulating layer disposed on the channel layer, a floating gate made of a two-dimensional material, a blocking insulating layer disposed on the floating gate and having a second dielectric constant greater than the first dielectric constant, and an upper gate disposed on the blocking insulating layer.