Semiconductor charge coupled device with split electrode configuration
    2.
    发明授权
    Semiconductor charge coupled device with split electrode configuration 失效
    具有分离电极配置的半导体电荷耦合器件

    公开(公告)号:US4126794A

    公开(公告)日:1978-11-21

    申请号:US818411

    申请日:1977-07-25

    摘要: A semiconductor charge coupled device (CCD) with split electrode charge sensors contains a localized connecting impurity doped region, of opposite conductivity type from that of the semiconductor transfer sites, underlying the gap between each pair of split electrodes; and each such connecting region is contiguous with both transfer sites underlying each pair of split electrodes, thereby serving to equilibrate the potentials of both such transfer sites. The entire downstream edge of each of these connecting regions is bounded by a separate localized channel stopping auxiliary barrier region of higher threshold than that of the charge transfer channel, in order to suppress dynamic signal charge transfer inefficiency caused by spurious contributions of charge from the connecting regions to the propagating signal charge packets.

    摘要翻译: 具有分裂电极电荷传感器的{PG,1A半导体电荷耦合器件(CCD)包含与半导体转移部位相反的导电类型的局部连接杂质掺杂区域,位于每对分离电极之间的间隙的下面; 并且每个这样的连接区域与每对分裂电极下面的两个转移位置相邻,从而用于平衡两个这样的转移位点的电位。 这些连接区域的每个的整个下游边缘由比电荷转移通道的阈值高的单独的局部通道停止辅助屏障区域限制,以便抑制由来自连接的电荷的虚假贡献引起的动态信号电荷转移低效率 区域到传播信号电荷包。

    Amplifier circuit arrangement for eliminating input signal offset in the
output
    3.
    发明授权
    Amplifier circuit arrangement for eliminating input signal offset in the output 失效
    用于消除输出中的输入信号偏移的放大器电路布置

    公开(公告)号:US4580103A

    公开(公告)日:1986-04-01

    申请号:US623575

    申请日:1984-06-22

    IPC分类号: H03F1/30 H03F1/26

    CPC分类号: H03F1/303

    摘要: In a semiconductor integrated circuit comprising an amplifier for detecting the presence of a carrier on an incoming wave signal, in order to suppress dc offset in the incoming wave and at the same time minimize any inherent input amplifier offset, the amplifier is supplied with a switched capacitor input network connected between a first input terminal of the amplifier and a circuit input terminal for receiving an incoming signal, and with a switched capacitor feedback network connected between an output terminal of the amplifier and a second (opposite polarity) input terminal of the amplifier.

    摘要翻译: 在包括用于检测输入波信号上的载波的存在的放大器的半导体集成电路中,为了抑制入射波中的直流偏移并且同时使任何固有的输入放大器偏移最小化,放大器被提供有开关 连接在放大器的第一输入端子和用于接收输入信号的电路输入端子之间的电容器输入网络,以及连接在放大器的输出端子和放大器的第二(相反极性)输入端子之间的开关电容器反馈网络 。

    Charge transfer logic apparatus
    5.
    发明授权
    Charge transfer logic apparatus 失效
    电荷传输逻辑装置

    公开(公告)号:US4217600A

    公开(公告)日:1980-08-12

    申请号:US114625

    申请日:1971-02-11

    摘要: Charge transfer devices are adapted to provide all possible forms of combinational logic functions by using combinations and variations of a basic state inversion-bit regeneration element. This basic element employs electrically floating means in the vicinity of a charge transfer device to sense the presence or absence of charge therein and to control the transfer of a newly-generated amount of charge away from an independent source.

    摘要翻译: 电荷转移装置适于通过使用基本状态转换位再生元件的组合和变化来提供组合逻辑功能的所有可能形式。 该基本元件在电荷转移装置附近使用电浮动装置来感测其中的电荷的存在或不存在,并且控制新产生的电荷量远离独立源的传输。

    Optical image sensor semiconductor apparatus
    6.
    发明授权
    Optical image sensor semiconductor apparatus 失效
    光学图像传感器半导体装置

    公开(公告)号:US4192015A

    公开(公告)日:1980-03-04

    申请号:US883476

    申请日:1978-03-06

    IPC分类号: G11C13/04 H04N5/70 G11C11/42

    CPC分类号: H04N5/70 G11C13/04

    摘要: The optical intensity pattern of a two-dimensional image field is electrically scanned a line at a time by a shift register access technique, thus providing a first stream of bits for each line. Each of these bits in a given line is compared with a dither coded second stream of bits generated in response to the background illumination (absence of image) along a line immediately adjacent to the line being scanned. The resulting sequence of comparisons is a dither coded signal representation of the line being scanned, which is compensated for nonuniform background illumination of the image field.

    摘要翻译: 二维图像场的光强度图案通过移位寄存器访问技术一次对行进行电扫描,从而为每条线提供第一比特流。 将给定行中的这些位中的每一个与响应于沿着正被扫描的线紧邻的线的背景照明(不存在图像)而生成的抖动编码的第二比特流进行比较。 所得到的比较序列是被扫描的线的抖动编码信号表示,其被补偿图像场的不均匀背景照明。

    Semiconductor charge coupled device analog to digital converter
    7.
    发明授权
    Semiconductor charge coupled device analog to digital converter 失效
    半导体充电耦合器件模拟数字转换器

    公开(公告)号:US4136335A

    公开(公告)日:1979-01-23

    申请号:US788546

    申请日:1977-04-18

    CPC分类号: H03M1/50

    摘要: A semiconductor charge coupled device (CCD) is provided with an array of auxiliary charge storage sites of successively decreasing binary digital storage capacities (1/2, 1/4, 1/8, 1/16, etc.) along the CCD propagation direction. These auxiliary sites sequentially subtract, from a propagating analog signal charge packet, successive amounts of charge ("1") vs. no charge ("0") corresponding to the presence vs. absence of correspondingly sufficient charge in the propagating analog packet. The resulting sequence of "1"'s and "0"'s provides a digital representation in the binary system of the analog signal charge packet.

    Automatic gain control amplifier circuit
    8.
    发明授权
    Automatic gain control amplifier circuit 失效
    自动增益控制放大电路

    公开(公告)号:US4634997A

    公开(公告)日:1987-01-06

    申请号:US670819

    申请日:1984-11-13

    IPC分类号: H03G3/20 H03G3/30

    CPC分类号: H03G3/30

    摘要: An automatic gain control (AGC) amplifier circuit uses a control loop comprising a digital counter (70) which controls a multiplying digital-to-analog converter (10) arranged as an attenuator of the input v to the AGC. The counter (70) is arranged to count up or down depending upon the output signal of the AGC circuit. In addition, a latency can be introduced into the control loop so that in case of most signal envelope variations, the counter is frozen to prevent output fluctuations.

    摘要翻译: 自动增益控制(AGC)放大器电路使用包括数字计数器(70)的控制回路,该数字计数器控制被配置为AGC的输入v的衰减器的乘法数模转换器(10)。 计数器(70)被配置为根据AGC电路的输出信号向上或向下计数。 此外,可以将延迟引入到控制回路中,使得在大多数信号包络变化的情况下,计数器被冻结以防止输出波动。

    High-ratio-accuracy capacitor geometries for integrated circuits
    9.
    发明授权
    High-ratio-accuracy capacitor geometries for integrated circuits 失效
    集成电路的高比率精度电容器几何形状

    公开(公告)号:US4210950A

    公开(公告)日:1980-07-01

    申请号:US947020

    申请日:1978-09-29

    CPC分类号: H01G2/00 H01G4/30 H01G4/38

    摘要: A number of known circuit configurations require high-ratio-accuracy capacitors. Maintaining such ratios during the various processing steps involved in fabricating the configurations in integrated-circuit form has been found to be difficult. In accordance with this invention, ratio capacitors are made in integrated-circuit form utilizing a unique geometry. In one specific embodiment, a so-called H-section geometry that is largely insensitive to processing variations is utilized to form the capacitors. In this way, high-yield low-parasitic precisely matched pairs of ratio capacitors are achieved.

    摘要翻译: 许多已知的电路配置需要高比率精度电容器。 已经发现,在制造集成电路形式的配置中涉及的各种处理步骤期间维持这种比例是困难的。 根据本发明,使用独特的几何形状的集成电路形式的比率电容器。 在一个具体实施例中,利用对处理变化大不敏感的所谓H形截面几何形状来形成电容器。 以这种方式,实现了高产率低寄生精确匹配的比电容对。