公开(公告)号：US11114355B2

公开(公告)日：2021-09-07

申请号：US16541206

申请日：2019-08-15

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Takahiro Hayakawa ,  Yasutaka Sugimoto ,  Tomoki Kato ,  Yoichi Moriya

IPC: H01L23/15 ,  H01L23/13 ,  H01L23/373 ,  C04B41/50 ,  C04B41/87 ,  H01L25/07 ,  H01L25/18 ,  H05K1/02 ,  H05K1/03 ,  H05K3/46 ,  F28F21/04 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00

Abstract: A power module includes a power wiring line provided with a power element, a glass ceramic multilayer substrate provided with a control element to control the power element, and a highly heat-conductive ceramic substrate made of a ceramic material having higher thermal conductivity than a glass ceramic contained in the glass ceramic multilayer substrate. The power wiring line is disposed on the highly heat-conductive ceramic substrate, and the glass ceramic multilayer substrate is disposed directly on the highly heat-conductive ceramic substrate.

公开(公告)号：US08975743B2

公开(公告)日：2015-03-10

申请号：US13776752

申请日：2013-02-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yoichi Moriya ,  Tetsuo Kanamori ,  Yukihiro Yagi ,  Yasutaka Sugimoto ,  Takahiro Takada

IPC: H01L23/34 ,  H01L23/373 ,  H01L23/538 ,  H01L25/07 ,  H01L25/16 ,  H01L23/00

Abstract: In a semiconductor device including a semiconductor element that produces heat and a substrate on which the semiconductor element is mounted, functions of the substrate are divided between a heat dissipating substrate and a wiring substrate. The heat dissipating substrate has a relatively high thermal conductivity, and includes principal surfaces defined by electric insulators, one of which is provided with an outer conductor located thereon. The wiring substrate is mounted on the upper principal surface of the heat dissipating substrate, has a thermal conductivity lower than that of the heat dissipating substrate, and includes a wiring conductor made mainly of silver or copper and located inside the wiring substrate, the wiring conductor being electrically connected to the outer conductor. The semiconductor element is mounted on the upper principal surface of the heat dissipating substrate and disposed in a through hole of the wiring substrate.

公开(公告)号：US20230270365A1

公开(公告)日：2023-08-31

申请号：US18173406

申请日：2023-02-23

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Tomoki OUCHI ,  Yoichi Moriya ,  Kahori Takatsuki ,  Koji Tanaka ,  Katsuhisa Higashiyama

IPC: A61B5/273 ,  A61B5/263

CPC classification number: A61B5/273 ,  A61B5/263 ,  H01B1/02

Abstract: An elastically deformable electrode that includes a plurality of electrode elements spaced from each other, and a liquid wire which is a liquid conductor configured to electrically connect the plurality of electrode elements. The electrode may also include a solid wire sealing the liquid wire, and an insulator between the solid wire and the plurality of electrode elements.

公开(公告)号：US11107741B2

公开(公告)日：2021-08-31

申请号：US16541208

申请日：2019-08-15

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Tomoki Kato ,  Yasutaka Sugimoto ,  Yoichi Moriya ,  Takahiro Hayakawa

IPC: B32B3/00 ,  H01L23/15 ,  C04B41/50 ,  C04B41/87 ,  H01L23/13 ,  H01L25/07 ,  H01L25/18 ,  H05K1/02 ,  H05K1/03 ,  H05K3/46 ,  F28F21/04 ,  H01L21/48 ,  H01L23/31 ,  H01L23/373 ,  H01L23/00

Abstract: A composite ceramic multilayer substrate includes a glass ceramic insulating layer including a wiring layer and a highly thermally conductive ceramic insulating layer made of a ceramic material having a higher thermal conductivity than the glass ceramic insulating layer. The glass ceramic insulating layer is provided on at least one main surface of the highly thermally conductive ceramic insulating layer directly and/or with a wiring layer interposed therebetween. When viewed in a direction perpendicular or substantially perpendicular to a main surface of the composite ceramic multilayer substrate, the composite ceramic multilayer substrate includes at least one heat generating element-mounting portion surrounded by the glass ceramic insulating layer and at which a heat generating element-mounting wiring line provide on the main surface of the highly thermally conductive ceramic insulating layer is exposed.

公开(公告)号：US09030005B2

公开(公告)日：2015-05-12

申请号：US13776752

申请日：2013-02-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yoichi Moriya ,  Tetsuo Kanamori ,  Yukihiro Yagi ,  Yasutaka Sugimoto ,  Takahiro Takada

IPC: H01L23/34 ,  H01L23/373 ,  H01L23/538 ,  H01L25/07 ,  H01L25/16 ,  H01L23/00

CPC classification number: H01L23/34 ,  H01L23/3735 ,  H01L23/5383 ,  H01L23/5389 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/072 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/48101 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/09701 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In a semiconductor device including a semiconductor element that produces heat and a substrate on which the semiconductor element is mounted, functions of the substrate are divided between a heat dissipating substrate and a wiring substrate. The heat dissipating substrate has a relatively high thermal conductivity, and includes principal surfaces defined by electric insulators, one of which is provided with an outer conductor located thereon. The wiring substrate is mounted on the upper principal surface of the heat dissipating substrate, has a thermal conductivity lower than that of the heat dissipating substrate, and includes a wiring conductor made mainly of silver or copper and located inside the wiring substrate, the wiring conductor being electrically connected to the outer conductor. The semiconductor element is mounted on the upper principal surface of the heat dissipating substrate and disposed in a through hole of the wiring substrate.

Abstract translation: 在包括产生热的半导体元件的半导体器件和其上安装半导体元件的衬底之间，衬底的功能在散热衬底和布线衬底之间被划分。 散热基板具有相对高的导热性，并且包括由绝缘体限定的主表面，其中一个被设置有位于其上的外部导体。 布线基板安装在散热基板的上主面上，其导热系数低于散热基板的导热系数，并且包括主要由银或铜制成并位于布线基板内的布线导体，布线导体 电连接到外导体。 半导体元件安装在散热基板的上主表面上，并布置在布线基板的通孔中。

公开(公告)号：US20150173185A1

公开(公告)日：2015-06-18

申请号：US14635429

申请日：2015-03-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi Ito ,  Yoichi Moriya ,  Tetsuo Kanamori ,  Yukihiro Yagi ,  Yuki Yamamoto

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/06 ,  H05K1/11

CPC classification number: H05K1/0298 ,  H05K1/115 ,  H05K3/06 ,  H05K3/38 ,  H05K3/4038 ,  H05K3/4661 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2201/09563 ,  H05K2203/0369 ,  H05K2203/0554 ,  H05K2203/063 ,  H05K2203/1105 ,  H05K2203/1461

Abstract: A circuit board structure and a manufacturing method for a circuit board that ensures an electrical connection between a metal foil and a projection without using a conductive adhesive and is less likely to cause a decrease in the reliability of the connection due to the interlayer separation or the like is provided. A circuit board includes an insulating layer, a lower main surface wiring pattern and an upper main surface wiring pattern disposed on either side of the insulating layer, and an interlayer connection conductor passing through the insulating layer in a thickness direction and electrically connecting to the lower main surface wiring pattern and the upper main surface wiring pattern. The interlayer connection conductor is formed integrally with the lower main surface wiring pattern, and is bonded to the upper main surface wiring pattern via an intermetallic compound.

Abstract translation: 一种用于电路板的电路板结构和制造方法，其确保金属箔和突起之间的电连接而不使用导电粘合剂，并且不太可能导致由于层间隔离引起的连接的可靠性降低 喜欢被提供。 电路板包括绝缘层，下主表面布线图案和布置在绝缘层两侧的上主表面布线图案，以及层间连接导体，其沿​​厚度方向穿过绝缘层并电连接到下层 主表面布线图案和上表面布线图案。 层间连接导体与下主表面布线图形一体地形成，并且通过金属间化合物结合到上主表面布线图案。

公开(公告)号：US08980028B2

公开(公告)日：2015-03-17

申请号：US13630049

申请日：2012-09-28

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yoichi Moriya ,  Tsuyoshi Katsube ,  Yuki Takemori ,  Tetsuo Kanamori ,  Yasutaka Sugimoto ,  Takahiro Takada

IPC: H01L23/15 ,  B32B18/00 ,  C04B35/117 ,  C04B35/16 ,  C04B35/195 ,  C04B37/02 ,  C23C24/08 ,  C23C28/04 ,  H01L23/14 ,  H01L23/498 ,  H05K1/05

CPC classification number: H01L23/15 ,  B32B18/00 ,  C04B35/117 ,  C04B35/16 ,  C04B35/195 ,  C04B37/021 ,  C04B37/025 ,  C04B2235/3203 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3215 ,  C04B2235/3217 ,  C04B2235/3262 ,  C04B2235/3409 ,  C04B2235/365 ,  C04B2235/6025 ,  C04B2235/652 ,  C04B2235/656 ,  C04B2235/6582 ,  C04B2235/77 ,  C04B2237/10 ,  C04B2237/341 ,  C04B2237/407 ,  C04B2237/56 ,  C04B2237/60 ,  C04B2237/704 ,  C04B2237/708 ,  C23C24/082 ,  C23C28/04 ,  H01L23/142 ,  H01L23/49822 ,  H01L23/49894 ,  H01L2224/16225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/09701 ,  H01L2924/15192 ,  H05K1/053 ,  Y10T156/10 ,  Y10T428/2495 ,  Y10T428/265

Abstract: In a metal base substrate with a low-temperature sintering ceramic layer located on a copper substrate, bonding reliability is increased between the copper substrate and the low-temperature sintering ceramic layer. A raw laminated body is prepared by stacking, on a surface of a copper substrate, a low-temperature sintering ceramic green layer including a low-temperature sintering ceramic material containing about 10 mol % to about 40 mol % of barium in terms of BaO and about 40 mol % to about 80 mol % of silicon in terms of SiO2, and this raw laminated body is subjected to firing at a temperature at which the low-temperature sintering ceramic green layer is sintered. In the thus obtained metal base substrate, a glass layer composed of Cu—Ba—Si based glass with a thickness of about 1 μm to about 5 μm is formed between the metal substrate and the low-temperature sintering ceramic layer.

Abstract translation: 在具有位于铜基板上的低温烧结陶瓷层的金属基底中，在铜基底和低温烧结陶瓷层之间的粘合可靠性提高。 通过在铜基材的表面上层叠包含以BaO换算含有约10mol％至约40mol％的钡的低温烧结陶瓷材料的低温烧结陶瓷生坯层来制备原料层压体，以及 约40mol％至约80mol％的SiO 2，并将该原料层压体在低温烧结陶瓷生坯层烧结的温度下进行烧制。 在这样得到的金属基底基板上，在金属基板和低温烧结陶瓷层之间形成厚度约1μm〜5μm的由Cu-Ba-Si系玻璃构成的玻璃层。