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公开(公告)号：US20160003923A1
公开(公告)日：2016-01-07
申请号：US14741285
申请日：2015-06-16
Applicant: NXP B.V.
Inventor： Victor Zieren , Olaf Wunnicke , Klaus Reimann
CPC classification number: G01R33/066 , G01R33/0206 , H01L27/22 , H01L43/02 , H01L43/08
Abstract: A differential magnetic field sensor system (10) is provided, in which offset cancelling for differential semiconductor structures in magnetic field sensors arranged close to each other is realized. The system (10) comprises a first, a second and a third magnetic field sensor (100, 200, 300), each of which is layouted substantially identically and comprises a, preferably silicon-on-insulator (SOI), surface layer portion (102) provided as a surface portion on a, preferably SOI, wafer and having a surface (104). On the surface (104) is arranged a central emitter structure (110, 210, 310) formed substantially mirror symmetrical with respect to a symmetry plane (106, 206, 306) that is substantially perpendicular to the surface (104, 204, 304), and a first and a second collector structure (116, 216, 316; 118, 218, 318), each of which is arranged spaced apart from the emitter structure (110, 210, 310) and which are arranged on opposite sides of the symmetry plane (106, 206, 306) so as to be substantially mirror images of each other. The first magnetic field sensor (100) is operated double-sided in that its first collector structure (116) and its emitter structure (110) are externally connected via a first read-out circuitry and its second collector structure (118) and its emitter structure (110) are externally connected via a second read-out circuitry. The second magnetic field sensor (200) is operated single-sided in that its first collector structure (216) and its emitter structure (210) are externally connected via a third read-out circuitry. The third magnetic field sensor (300) is operated single-sided in that its second collector structure (318) and its emitter structure (310) are externally connected via a fourth read-out circuitry.
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公开(公告)号：US20130328142A1
公开(公告)日：2013-12-12
申请号：US13915523
申请日：2013-06-11
Applicant: NXP B.V.
Inventor： Axel Nackaerts , Willem Frederik Adrianus Besling , Klaus Reimann
CPC classification number: G01L9/0073 , B81B7/008 , B81B2201/0264 , B81B2203/0127 , B81B2207/015 , B81C1/00246 , B81C2203/0735 , B81C2203/0771 , G01L9/0042 , H01L21/28 , H01L29/84
Abstract: Disclosed is an integrated circuit (100), comprising a semiconductor substrate (110) carrying a plurality of circuit elements; and a pressure sensor including a cavity (140) on said semiconductor substrate, said cavity comprising a pair of electrodes (120, 122) laterally separated from each other; and a flexible membrane (130) over and spatially separated from said electrodes such that said membrane interferes with a fringe field between said electrodes, said membrane comprising at least one aperture (132). A method of manufacturing such an IC is also disclosed.
Abstract translation: 公开了一种集成电路（100），包括承载多个电路元件的半导体衬底（110）; 和包括在所述半导体衬底上的空腔（140）的压力传感器，所述空腔包括彼此横向分离的一对电极（120,122）; 以及在所述电极之间和空间上分离的柔性膜（130），使得所述膜干扰所述电极之间的边缘场，所述膜包括至少一个孔（132）。 还公开了制造这种IC的方法。
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公开(公告)号：US20200333407A1
公开(公告)日：2020-10-22
申请号：US16388167
申请日：2019-04-18
Applicant: NXP B.V.
Inventor： Klaus Reimann , Hartmut Matz , Mark Isler , Jorg Kock
Abstract: A sensor includes first and second magnetoresistive sensor elements configured to produce respective first and second output signals in response to an external magnetic field. The first and second magnetoresistive sensor elements form a gradient unit, each of the magnetoresistive sensor elements includes a sense layer having a vortex magnetization pattern. A processing circuit is coupled to the sensor elements and is configured to produce a differential output signal as a difference between the first and second output signals of the first and second magnetoresistive sensor elements of the gradient unit. The system includes an encoder that produces the external magnetic field and the sensor having one or more gradient units, in which the gradient units may be arranged in a second-order gradient sensing configuration.
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公开(公告)号：US20190198751A1
公开(公告)日：2019-06-27
申请号：US16286149
申请日：2019-02-26
Applicant: NXP B.V.
Inventor： Mark Isler , Klaus Reimann , Hartmut Matz , Jörg Kock
Abstract: A method includes performing an ion beam etching process on a tunnel magnetoresistance (TMR) stack to remove material portions of a first magnetic layer and a tunnel barrier layer of the TMR stack. The ion beam etching process stops at a top surface of a second magnetic layer of the TMR stack. A protective layer is deposited over the TMR stack. Another etch process is performed to remove the protective layer such that a portion of the second magnetic layer is exposed from the protective layer and a spacer is formed from a remaining portion of the protective layer. The spacer surrounds sidewalls of the first magnetic layer and the tunnel barrier layer. The portion of the second magnetic layer exposed from the protective layer is removed so that a TMR sensor element remains, where the TMR sensor element includes a bottom magnet, a top magnet, and a tunnel junction.
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公开(公告)号：US10263179B2
公开(公告)日：2019-04-16
申请号：US15652311
申请日：2017-07-18
Applicant: NXP B.V.
Inventor： Mark Isler , Klaus Reimann , Hartmut Matz , Jörg Kock
Abstract: A method includes performing an ion beam etching process on a tunnel magnetoresistance (TMR) stack to remove material portions of a first magnetic layer and a tunnel barrier layer of the TMR stack. The ion beam etching process stops at a top surface of a second magnetic layer of the TMR stack. A protective layer is deposited over the TMR stack. Another etch process is performed to remove the protective layer such that a portion of the second magnetic layer is exposed from the protective layer and a spacer is formed from a remaining portion of the protective layer. The spacer surrounds sidewalls of the first magnetic layer and the tunnel barrier layer. The portion of the second magnetic layer exposed from the protective layer is removed so that a TMR sensor element remains, where the TMR sensor element includes a bottom magnet, a top magnet, and a tunnel junction.
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Patent Agency Ranking
公开(公告)号：US09368963B2
公开(公告)日：2016-06-14
申请号：US14072122
申请日：2013-11-05
Applicant: NXP B.V.
Inventor： Klaus Reimann , Hans-Martin Ritter , Wolfgang Schnitt , Anco Heringa
CPC classification number: H02H9/046 , H01L27/0255
Abstract: An ESD protection circuit comprises a series connection of at least two protection components between a signal line to be protected and a return line (e.g. ground), comprising a first protection component connected to the signal line and a second protection component connected to the ground line. They are connected with opposite polarity so that when one conducts in forward direction the other conducts in reverse breakdown mode. A bias voltage source connects to the junction between the two protection components through a bias impedance. The use of the bias voltage enables the signal distortions resulting from the ESD protection circuit to be reduced.
Abstract translation: ESD保护电路包括在待保护的信号线和返回线（例如接地）之间的至少两个保护部件的串联连接，包括连接到信号线的第一保护部件和连接到接地线的第二保护部件 。 它们以相反的极性连接，使得当一个正向导通时，另一个导通反向击穿模式。 偏置电压源通过偏置阻抗连接到两个保护元件之间的接点。 使用偏置电压可以降低由ESD保护电路产生的信号失真。
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公开(公告)号：US09331028B2
公开(公告)日：2016-05-03
申请号：US14293146
申请日：2014-06-02
Applicant: NXP B.V.
Inventor： Michael In 'T Zandt , Olaf Wunnicke , Klaus Reimann
CPC classification number: H01L23/60 , H01J9/025 , H01L21/74 , H01L21/76205 , H01L27/0288 , H01L29/0615 , H01L2924/0002 , H01L2924/00
Abstract: Substrate material is oxidized around side walls of a set of channels. A shielding structure means there is more oxide growth at the top than the bottom with the result that the non-oxidized substrate material area between the channels forms a tapered shape with a pointed tip at the top. These pointed substrate areas are then used to form cathodes.
Abstract translation: 衬底材料在一组通道的侧壁周围被氧化。 屏蔽结构意味着在顶部比底部存在更多的氧化物生长，结果通道之间的未氧化的衬底材料区域形成具有尖端在顶部的锥形形状。 然后将这些尖锐的基底区域用于形成阴极。
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公开(公告)号：US20150311024A1
公开(公告)日：2015-10-29
申请号：US14261246
申请日：2014-04-24
Applicant: NXP B.V.
Inventor： Klaus Reimann , Olaf Wunnicke , Michael in 't Zandt
CPC classification number: H01J9/025 , H01J1/304 , H01J1/308 , H01J9/24 , H01J19/24 , H01J19/54 , H01J21/04 , H01L27/0248
Abstract: Embodiments of a method for forming a field emission diode for an electrostatic discharge device include forming a first electrode, a sacrificial layer, and a second electrode. The sacrificial layer separates the first and second electrodes. The method further includes forming a cavity between the first and second electrode by removing the sacrificial layer. The cavity separates the first and second electrodes. The method further includes depositing an electron emission material on at least one of the first and second electrodes through at least one access hole after formation of the first and second electrodes. The access hole is located remotely from a location of electron emission on the first and second electrode.
Abstract translation: 用于形成用于静电放电装置的场致发射二极管的方法的实施例包括形成第一电极，牺牲层和第二电极。 牺牲层分离第一和第二电极。 该方法还包括通过去除牺牲层在第一和第二电极之间形成空腔。 腔分离第一和第二电极。 该方法还包括在形成第一和第二电极之后，通过至少一个进入孔，在第一和第二电极中的至少一个上沉积电子发射材料。 进入孔远离第一和第二电极上的电子发射位置。
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公开(公告)号：US20190027682A1
公开(公告)日：2019-01-24
申请号：US15652311
申请日：2017-07-18
Applicant: NXP B.V.
Inventor： Mark Isler , Klaus Reimann , Hartmut Matz , Jörg Kock
Abstract: A method includes performing an ion beam etching process on a tunnel magnetoresistance (TMR) stack to remove material portions of a first magnetic layer and a tunnel barrier layer of the TMR stack. The ion beam etching process stops at a top surface of a second magnetic layer of the TMR stack. A protective layer is deposited over the TMR stack. Another etch process is performed to remove the protective layer such that a portion of the second magnetic layer is exposed from the protective layer and a spacer is formed from a remaining portion of the protective layer. The spacer surrounds sidewalls of the first magnetic layer and the tunnel barrier layer. The portion of the second magnetic layer exposed from the protective layer is removed so that a TMR sensor element remains, where the TMR sensor element includes a bottom magnet, a top magnet, and a tunnel junction.
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公开(公告)号：US09696390B2
公开(公告)日：2017-07-04
申请号：US14741285
申请日：2015-06-16
Applicant: NXP B.V.
Inventor： Victor Zieren , Olaf Wunnicke , Klaus Reimann
CPC classification number: G01R33/066 , G01R33/0206 , H01L27/22 , H01L43/02 , H01L43/08
Abstract: A differential magnetic field sensor system (10) is provided, in which offset cancelling for differential semiconductor structures in magnetic field sensors arranged close to each other is realized. The system (10) comprises a first, a second and a third magnetic field sensor (100, 200, 300), each of which is layouted substantially identically and comprises a, preferably silicon-on-insulator (SOI), surface layer portion (102) provided as a surface portion on a, preferably SOI, wafer and having a surface (104). On the surface (104) is arranged a central emitter structure (110, 210, 310) formed substantially mirror symmetrical with respect to a symmetry plane (106, 206, 306) that is substantially perpendicular to the surface (104, 204, 304), and a first and a second collector structure (116, 216, 316; 118, 218, 318), each of which is arranged spaced apart from the emitter structure (110, 210, 310) and which are arranged on opposite sides of the symmetry plane (106, 206, 306) so as to be substantially mirror images of each other. The first magnetic field sensor (100) is operated double-sided in that its first collector structure (116) and its emitter structure (110) are externally connected via a first read-out circuitry and its second collector structure (118) and its emitter structure (110) are externally connected via a second read-out circuitry. The second magnetic field sensor (200) is operated single-sided in that its first collector structure (216) and its emitter structure (210) are externally connected via a third read-out circuitry. The third magnetic field sensor (300) is operated single-sided in that its second collector structure (318) and its emitter structure (310) are externally connected via a fourth read-out circuitry.
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