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公开(公告)号:US10002086B1
公开(公告)日:2018-06-19
申请号:US15385324
申请日:2016-12-20
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Stella Achtenberg , Eran Sharon , Ran Zamir , Amir Shaharabany
Abstract: In an illustrative example, a device includes a memory and a controller that is coupled to the memory and that is configured to communicate with the memory using at least a first channel and a second channel. The controller includes a bit error rate (BER) estimator configured to estimate a first BER corresponding to the first channel and a second BER corresponding to the second channel. The controller also includes a throughput balancer configured to determine whether to adjust at least one of a first clock rate of the first channel or a second clock rate of the second channel based on the first BER and the second BER.
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公开(公告)号:US09990158B2
公开(公告)日:2018-06-05
申请号:US15189684
申请日:2016-06-22
Applicant: SanDisk Technologies LLC
Inventor: Amir Shaharabany , Yoav Markus , Tal Heller , Hadas Oshinsky
CPC classification number: G06F3/0659 , G06F3/061 , G06F3/0655 , G06F3/068 , G06F3/0688 , G06F13/1673 , G11C14/00
Abstract: A storage system uses consumption of transfer RAM as a trigger to enter and exit burst mode. In one embodiment, the storage system stores, in volatile memory, data to be written in non-volatile memory; monitors an allocation level of the volatile memory to determine a first amount of time that the allocation level is at a first level and a second amount of time that the allocation level is at second level; enters burst mode when a ratio of the first amount of time and the second amount of time is above a first threshold; and exits burst mode when the ratio of the first amount of time and the second amount of time is below a second threshold. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
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公开(公告)号:US10534709B2
公开(公告)日:2020-01-14
申请号:US15252251
申请日:2016-08-31
Applicant: SanDisk Technologies LLC
Inventor: Hadas Oshinsky , Rotem Sela , Amir Shaharabany
IPC: G06F12/0804 , G06F12/0868
Abstract: A data storage device includes a write cache, a non-volatile memory and a controller coupled to the write cache and to the non-volatile memory. The controller is configured to, responsive to receiving a plurality of flush commands, write all data from the write cache to the non-volatile memory while executing fewer than all of the plurality of flush commands.
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公开(公告)号:US20180060232A1
公开(公告)日:2018-03-01
申请号:US15252251
申请日:2016-08-31
Applicant: SanDisk Technologies LLC
Inventor: Hadas Oshinsky , Rotem Sela , Amir Shaharabany
IPC: G06F12/0804 , G06F3/06
CPC classification number: G06F12/0804 , G06F12/0868 , G06F2212/1032
Abstract: A data storage device includes a write cache, a non-volatile memory and a controller coupled to the write cache and to the non-volatile memory. The controller is configured to, responsive to receiving a plurality of flush commands, write all data from the write cache to the non-volatile memory while executing fewer than all of the plurality of flush commands.
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公开(公告)号:US09870174B2
公开(公告)日:2018-01-16
申请号:US15404487
申请日:2017-01-12
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Amir Shaharabany , Hadas Oshinsky
CPC classification number: G06F3/0659 , G06F3/061 , G06F3/0611 , G06F3/0619 , G06F3/0626 , G06F3/064 , G06F3/065 , G06F3/0665 , G06F3/0679 , G06F2206/1014 , G11C11/5628
Abstract: An apparatus includes a memory storing a group of pages of data. An interface of the apparatus is configured to send, to a data storage device (DSD) from a first command queue, a first instruction of instructions to store the group of pages to the DSD using a logical address corresponding to the group of pages. The interface is further configured to send, to the DSD from a second command queue, a second instruction of the instructions to write the group of pages to the DSD using the logical address. Sending a first copy of the group of pages in association with the first instruction and sending a second copy of the group of pages in association with the second instruction enables a multi-stage programming operation to be performed at the DSD without storing the group of pages at the DSD between stages of the multi-stage programming operation.
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公开(公告)号:US20170371588A1
公开(公告)日:2017-12-28
申请号:US15189684
申请日:2016-06-22
Applicant: SanDisk Technologies LLC
Inventor: Amir Shaharabany , Yoav Markus , Tal Heller , Hadas Oshinsky
CPC classification number: G06F3/0659 , G06F3/061 , G06F3/0655 , G06F3/068 , G06F3/0688 , G06F13/1673 , G11C14/00
Abstract: A storage system uses consumption of transfer RAM as a trigger to enter and exit burst mode. In one embodiment, the storage system stores, in volatile memory, data to be written in non-volatile memory; monitors an allocation level of the volatile memory to determine a first amount of time that the allocation level is at a first level and a second amount of time that the allocation level is at second level; enters burst mode when a ratio of the first amount of time and the second amount of time is above a first threshold; and exits burst mode when the ratio of the first amount of time and the second amount of time is below a second threshold. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
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公开(公告)号:US10126970B2
公开(公告)日:2018-11-13
申请号:US15348875
申请日:2016-11-10
Applicant: SanDisk Technologies LLC
Inventor: Amir Shaharabany , Hadas Oshinsky , Yacov Duzly , James Fitzpatrick
Abstract: Systems, methods and/or devices are used to pair metablocks in a non-volatile storage device. In one aspect, a method of data organization of a memory device includes, writing data to and reading data from respective metablocks in a set of metablocks. The method further includes while performing said writing and reading: (1) accessing one or more management data structures in controller memory, identifying two or more metablock pairs; (2) accessing and updating metablock status information indicating which metablocks of the set of metablocks are closed, free and open; and (3) accessing and updating a valid count, corresponding to a number of sub-block memory units having valid data for each of a plurality of metablocks in the set of metablocks.
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8.
公开(公告)号:US20170344295A1
公开(公告)日:2017-11-30
申请号:US15168835
申请日:2016-05-31
Applicant: SanDisk Technologies LLC
Inventor: Liron Sheffi , Yuval Kenan , Amir Shaharabany , Yacov Duzly
CPC classification number: G06F3/0623 , G06F3/0601 , G06F3/062 , G06F3/0652 , G06F3/0688 , G06F11/1004 , G06F12/14 , G06F21/00 , G06F21/6209 , G06F21/78 , G06F21/79 , G06F2221/2143 , G11C11/5635 , G11C16/06 , G11C16/14 , G11C16/16 , G11C16/22 , G11C16/32
Abstract: A system and method is disclosed for fast secure destruction or erasure of data in a non-volatile memory. The method may include identifying a fast erase condition, such as an unauthorized access attempt, and then applying a fast erase process to a predetermined number of blocks of the non-volatile memory. The fast erase process may be implemented by applying an erase voltage for less than a full duration needed to place the blocks in a full erase state, but sufficient to make any data in those blocks unreadable. The system may include a non-volatile memory having a plurality of blocks and a controller configured to sequentially apply the erase voltage to a predetermined portion of the blocks for less than a time needed to fully erase those blocks such that the controller may rapidly make data unreadable without taking the full time to completely erase those blocks.
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公开(公告)号:US20170168716A1
公开(公告)日:2017-06-15
申请号:US15348875
申请日:2016-11-10
Applicant: SanDisk Technologies LLC
Inventor: Amir Shaharabany , Hadas Oshinsky , Yacov Duzly , James Fitzpatrick
CPC classification number: G06F3/064 , G06F3/0616 , G06F3/0679 , G06F11/0727 , G06F11/0751 , G06F11/0787 , G06F11/079 , G06F11/08 , G11C29/52 , G11C2029/4402
Abstract: Systems, methods and/or devices are used to pair metablocks in a non-volatile storage device. In one aspect, a method of data organization of a memory device includes, writing data to and reading data from respective metablocks in a set of metablocks. The method further includes while performing said writing and reading: (1) accessing one or more management data structures in controller memory, identifying two or more metablock pairs; (2) accessing and updating metablock status information indicating which metablocks of the set of metablocks are closed, free and open; and (3) accessing and updating a valid count, corresponding to a number of sub-block memory units having valid data for each of a plurality of metablocks in the set of metablocks.
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