公开(公告)号：US20250040215A1

公开(公告)日：2025-01-30

申请号：US18439634

申请日：2024-02-12

Applicant: SAMSUNG ELECTRONICS CO, LTD.

Inventor： Dong Hoon HWANG ,  Hyo Jin KIM ,  Myung II KANG ,  Tae Hyun RYU ,  Kyu Nam PARK ,  Woo Seok PARK

IPC: H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes a lower pattern. A channel isolation structure and a field insulating layer contact the lower pattern. A gate structure is on the lower pattern, in contact with the channel isolation structure. A channel pattern is on the lower pattern, and includes sheet patterns, each being in contact with the channel isolation structure. A source/drain pattern contacts the channel pattern and the channel isolation structure. The channel isolation structure includes a first region contacting the gate structure and a second region contacting the source/drain pattern. The second region of the channel isolation structure includes portions whose widths increase as a distance from a bottom surface of the field insulating layer increases. A width of an uppermost portion of the channel isolation structure is greater than a width of a lowermost portion of the channel isolation structure

公开(公告)号：US20240186321A1

公开(公告)日：2024-06-06

申请号：US18436812

申请日：2024-02-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Seok HA ,  Hyun Seung SONG ,  Hyo Jin KIM ,  Kyoung Mi PARK ,  Guk Il AN

IPC: H01L27/088 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L21/3086 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.

公开(公告)号：US20230317849A1

公开(公告)日：2023-10-05

申请号：US17961818

申请日：2022-10-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bum KIM ,  Hyo Jin KIM ,  Yong Jun NAM ,  Sang Moon LEE ,  Dong Woo KIM ,  In Geon HWANG

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7851 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/66545

Abstract: A semiconductor device includes a lower pattern extending in a first direction, and protruding from a substrate in a second direction, a lower insulating pattern on the lower pattern, and in contact with an upper surface of the lower pattern, a channel pattern on the lower insulating pattern, a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction, wherein each of the plurality of gate structures includes a gate electrode and a gate insulating film, and a source/drain pattern disposed on the lower pattern, and connected to the channel pattern. A vertical level of a lowermost portion of the source/drain pattern is lower than a vertical level of a bottom surface of the lower insulating pattern. The gate electrode overlaps the lower insulating pattern in the second direction.

公开(公告)号：US20230053251A1

公开(公告)日：2023-02-16

申请号：US17977031

申请日：2022-10-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Seok HA ,  Hyun Seung SONG ,  Hyo Jin KIM ,  Kyoung Mi PARK ,  Guk Il AN

IPC: H01L27/088 ,  H01L29/66 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/78

Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.

公开(公告)号：US20250098292A1

公开(公告)日：2025-03-20

申请号：US18966327

申请日：2024-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Seok HA ,  Hyun Seung SONG ,  Hyo Jin KIM ,  Kyoung Mi PARK ,  Guk Il AN

IPC: H01L27/088 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.

公开(公告)号：US20200043928A1

公开(公告)日：2020-02-06

申请号：US16354369

申请日：2019-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyo Jin KIM ,  Dae Won HA ,  Yoon Moon PARK ,  Keun Hwi CHO

IPC: H01L27/092

Abstract: A semiconductor device includes a substrate having a first region and a second region, a first transistor including a single first active fin disposed in the first region, a first gate electrode intersecting the single first active fin, and a single first source/drain layer disposed in the first recess of the single first active fin, and a second transistor including a plurality of second active fins disposed in the second region, a second gate electrode intersecting the plurality of second active fins, and a plurality of second source/drain layers disposed in the second recesses of the plurality of second active fins. The single first active fin and the plurality of second active fins may have a first conductivity type, and a depth of the first recess may be less than a depth of each of the second recesses.

公开(公告)号：US20240120400A1

公开(公告)日：2024-04-11

申请号：US18376549

申请日：2023-10-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Hoon HWANG ,  In Chan HWANG ,  Hyo Jin KIM

IPC: H01L29/423 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/41775 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes first lower nanosheets; an upper isolation layer on the first lower nanosheets; first upper nanosheets on the upper isolation layer; a first upper source/drain region on the first upper nanosheets; a second upper source/drain region on the first upper nanosheets; a first gate electrode surrounding the first lower nanosheets, the upper isolation layer, and the first upper nanosheets; a first gate cut on a side of the first gate electrode and extending from a lower surface of the first gate electrode to an upper surface of the first gate electrode; a first through via inside the first gate cut and insulated from the first gate electrode; a first upper source/drain contact on and electrically connected to the first upper source/drain region; and a second upper source/drain contact on the first upper source/drain region and electrically connecting the second upper source/drain region with the first through via.

公开(公告)号：US20220254650A1

公开(公告)日：2022-08-11

申请号：US17517304

申请日：2021-11-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do Young CHOI ,  Sung Min KIM ,  Cheol KIM ,  Hyo Jin KIM ,  Dae Won HA ,  Dong Woo HAN

IPC: H01L21/3213 ,  H01L21/308

Abstract: Provided is a semiconductor device. The semiconductor device comprises a first active pattern extending in a first direction on a substrate, a second active pattern which extends in the first direction and is adjacent to the first active pattern in a second direction different from the first direction, a field insulating film placed between the first active pattern and the second active pattern, a first gate structure which crosses the first active pattern, extends in the second direction, and includes a first gate electrode and a first gate spacer, a second gate structure which crosses the second active pattern, extends in the second direction, and includes a second gate electrode and a second gate spacer, a gate separation structure placed on the field insulating film between the first gate structure and the second gate structure.

公开(公告)号：US20210013200A1

公开(公告)日：2021-01-14

申请号：US17036355

申请日：2020-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Seok HA ,  Hyun Seung SONG ,  Hyo Jin KIM ,  Kyoung Mi PARK ,  Guk Il AN

IPC: H01L27/088 ,  H01L29/66 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/78

Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.

公开(公告)号：US20250081599A1

公开(公告)日：2025-03-06

申请号：US18616279

申请日：2024-03-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong Hoon HWANG ,  Hyo Jin KIM ,  Byung Ho MOON ,  Kyoung-MI PARK ,  Kyung Hee CHO

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

Abstract: A semiconductor device that includes a lower pattern extending in a first direction, a first channel pattern on the lower pattern, and includes a plurality of first sheet patterns, a second channel pattern on the lower pattern, includes a plurality of second sheet patterns and spaced apart from the first channel pattern, a first gate structure which extends around the first sheet pattern, and includes a first gate electrode and a first gate insulating film, a second gate structure which extends around the second sheet pattern, and includes a second gate electrode and a second gate insulating film, a first gate capping pattern and a second gate capping pattern. The number of first sheet patterns is different from the number of second sheet patterns, and a thickness of the first gate capping pattern is different from a thickness of the second gate capping pattern.