-
公开(公告)号:US12080941B2
公开(公告)日:2024-09-03
申请号:US17523027
申请日:2021-11-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Koog Kim , Young Jun Cho , Gwan Hyeob Koh , Kil Ho Lee , Jun Hoe Kim
CPC classification number: H01Q1/38 , G11C11/16 , H01F10/14 , H01F38/14 , H04B5/26 , H01F2038/143 , H04L27/2636
Abstract: A signal transferring device includes a first structure that includes a first magnetic thin film structure having a first magnetic vortex configured to receive a signal as an input signal, a second structure that is spaced apart from at least one side of the first structure, the second structure including a second magnetic thin film structure having a second magnetic vortex configured to transfer the signal, and a third structure that is spaced apart from at least one side of the second structure, the third structure including a third magnetic thin film structure having a third magnetic vortex configured to output the signal from the signal transferring device. The first and third structures have a symmetrical shape and the second structure has an asymmetrical shape.
-
公开(公告)号:US20230371276A1
公开(公告)日:2023-11-16
申请号:US18156570
申请日:2023-01-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Geon Hee Bae , Seung Pil Ko , Yoon Jong Song , Kil Ho Lee
IPC: H10B61/00
CPC classification number: H10B61/00 , G11C11/1673
Abstract: A magnetic memory device includes first and second upper insulating layers and a first mold layer sequentially stacked on a first substrate region; a first primary and first secondary wiring structure spaced apart in a first direction in the first upper insulating layer; a second wiring structure on the first primary wiring structure and a reference wiring structure on the first secondary wiring structure, in the second upper insulating layer; a first structure on the second wiring structure; a second structure on the reference wiring structure; a lower electrode contact between the second wiring structure and the first structure, and not between the reference wiring structure and the second structure, in the first mold layer; a bit line structure on the first structure; and a reference bit line structure on the second structure. The first and second structure include a lower electrode, MTJ structure, intermediate electrode, and upper electrode.
-
公开(公告)号:US11532782B2
公开(公告)日:2022-12-20
申请号:US17330969
申请日:2021-05-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kil Ho Lee , Woo Jin Kim , Gwan Hyeob Koh
Abstract: A semiconductor device includes first and second contact plugs in an insulating layer that is on a substrate, the first and second contact plugs spaced apart from each other. A spin-orbit torque (SOT) line on the insulating layer and overlapping the first and second contact plug is provided. A magnetic tunnel junction (MTJ) is on the SOT line. An upper electrode is on the MTJ. Each of the first and second contact plugs includes a recess region adjacent the SOT line. A sidewall of the recess region is substantially coplanar with a side surface of the SOT line and a side surface of the MTJ.
-
公开(公告)号:US12213322B2
公开(公告)日:2025-01-28
申请号:US17380331
申请日:2021-07-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyung Hwan Lee , Kwang Seok Kim , Yong Seok Kim , Il Gweon Kim , Kil Ho Lee
Abstract: A three-dimensional semiconductor memory device is provided. The semiconductor memory device includes first horizontal conductive lines on a substrate in a first direction, each of the first horizontal conductive lines extending in a second direction different from the first direction, second horizontal conductive lines stacked on the substrate in the first direction, each of the second horizontal conductive lines extending in the second direction, a vertical conductive line between the first horizontal conductive line and the second horizontal conductive line and extending in the first direction, a plurality of first magnetic tunnel junction patterns between the vertical conductive line and each of the first horizontal conductive lines, and a plurality of second magnetic tunnel junction patterns between the vertical conductive lines and each of the second horizontal conductive lines. The first horizontal conductive lines and the second horizontal conductive lines are spaced apart from each other in a third direction.
-
公开(公告)号:US12148784B2
公开(公告)日:2024-11-19
申请号:US17393855
申请日:2021-08-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dae Shik Kim , Min-Sun Keel , Hoon Joo Na , Kang Ho Lee , Kil Ho Lee , Sang Kil Lee , Jung Hyuk Lee , Shin Hee Han
IPC: H01L21/768 , H01L27/146
Abstract: An image sensor including a variable resistance element is provided. The image sensor comprises first and second chips having first and second connecting structures; and a contact plug connecting the first and second chips. The first chip includes a photoelectric conversion element. The second chip includes a first variable resistance element. The contact plug extends from the first surface of the first semiconductor substrate to connect the first and second connecting structures.
-
公开(公告)号:US12022744B2
公开(公告)日:2024-06-25
申请号:US17469502
申请日:2021-09-08
Inventor: Sang Koog Kim , Jae Hak Yang , Yoon Jong Song , Kil Ho Lee , Jun Hoe Kim
CPC classification number: H10N50/85 , G11C11/161 , G11C11/1675 , H01F10/3286 , H10B61/00 , H10N50/80 , H10N52/00
Abstract: A core magnetization reversal method includes transforming the first magnetic skyrmion into a skyrmionium by applying a first alternating current (AC) magnetic field to the first magnetic skyrmion, and then transforming the skyrmionium into a second magnetic skyrmion by applying a second AC magnetic field to the skyrmionium. The first magnetic skyrmion may be formed on a hemispherical shell, which may be formed by (i) preparing a membrane having a plurality of protrusions, and (ii) stacking, on the membrane, a first layer including at least one of platinum (Pt), nickel (Ni), and palladium (Pd), and a second layer including a ferromagnetic material. The first and second AC magnetic fields may have different frequencies.
-
公开(公告)号:US20220246837A1
公开(公告)日:2022-08-04
申请号:US17486034
申请日:2021-09-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kil Ho Lee , Gwan Hyeob Koh , Yong Jae Kim , Geon Hee Bae
Abstract: A magnetic memory device includes a substrate having a first mold insulating film on a first region thereof, and a first structure on the substrate. The first structure includes a lower electrode, a magnetic tunnel junction (MTJ) structure on the lower electrode, and an upper electrode on the MTJ structure. A capping film is provided, which extends on the first mold insulating film and sidewalls of the first structure. A first etching stop layer is provided on the first structure and the capping film. A second mold insulating film is provided, which at least partially fills a space between the capping film and the first etching stop layer. A first metal structure is provided, which extends through a portion of the first etching stop layer and a portion of the second mold insulating film, and is electrically coupled to the MTJ structure.
-
公开(公告)号:US11050016B2
公开(公告)日:2021-06-29
申请号:US16506391
申请日:2019-07-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kil Ho Lee , Woo Jin Kim , Gwan Hyeob Koh
Abstract: A semiconductor device includes first and second contact plugs in an insulating layer that is on a substrate, the first and second contact plugs spaced apart from each other. A spin-orbit torque (SOT) line on the insulating layer and overlapping the first and second contact plug is provided. A magnetic tunnel junction (MTJ) is on the SOT line. An upper electrode is on the MTJ. Each of the first and second contact plugs includes a recess region adjacent the SOT line. A sidewall of the recess region is substantially coplanar with a side surface of the SOT line and a side surface of the MTJ.
-
公开(公告)号:US20200227626A1
公开(公告)日:2020-07-16
申请号:US16506391
申请日:2019-07-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kil Ho Lee , Woo Jin KIM , Gwan Hyeob KOH
Abstract: A semiconductor device includes first and second contact plugs in an insulating layer that is on a substrate, the first and second contact plugs spaced apart from each other. A spin-orbit torque (SOT) line on the insulating layer and overlapping the first and second contact plug is provided. A magnetic tunnel junction (MTJ) is on the SOT line. An upper electrode is on the MTJ. Each of the first and second contact plugs includes a recess region adjacent the SOT line. A sidewall of the recess region is substantially coplanar with a side surface of the SOT line and a side surface of the MTJ.
-
-
-
-
-
-
-
-