ELECTRONIC COMPONENT AND MANUFACTURING METHOD OF THE SAME

    公开(公告)号:US20210407737A1

    公开(公告)日:2021-12-30

    申请号:US17330929

    申请日:2021-05-26

    Abstract: Disclosed herein is an electronic component that includes a substrate, a planarizing layer covering a surface of the substrate, a first conductive layer formed on the planarizing layer and having a lower electrode, a dielectric film made of a material different from that of the planarizing layer and covering the planarizing layer and first conductive layer, an upper electrode laminated on the lower electrode through the dielectric film, and a first insulating layer covering the first conductive layer, dielectric film, and upper electrode. An outer periphery of the first insulating layer directly contacts the planarizing layer without an intervention of the dielectric film.

    ELECTRONIC COMPONENT
    3.
    发明公开

    公开(公告)号:US20230317352A1

    公开(公告)日:2023-10-05

    申请号:US18191374

    申请日:2023-03-28

    CPC classification number: H01F27/2804 H01F27/402 H01F2027/2809

    Abstract: In an electronic component, a first inductor and a second inductor are disposed side by side in a first direction, and in a region where the first inductor and the second inductor are adjacent to each other in the first direction, at least one of positions in a second direction of an upper surface of a first inductor pattern, and an upper surface of a second inductor pattern and positions in the second direction of a lower surface of the first inductor pattern and a lower surface of a second inductor pattern, are different.

    ELECTRONIC COMPONENT
    4.
    发明申请

    公开(公告)号:US20230060995A1

    公开(公告)日:2023-03-02

    申请号:US17896744

    申请日:2022-08-26

    Abstract: Disclosed herein is an electronic component that includes an element body having a structure in which a plurality of conductor layers are stacked in a first direction on a surface of a substrate with insulating layers interposed therebetween, and a plurality of terminal electrodes provided on a mounting surface of the element body. The mounting surface extends in the first direction and in a second direction perpendicular to the first direction. The element body includes an inductor constituted by the plurality of conductor layers and has a coil axis extending in a third direction perpendicular to both the first and second directions.

    DIRECTIONAL COUPLER AND WIRELESS COMMUNICATION DEVICE
    5.
    发明申请
    DIRECTIONAL COUPLER AND WIRELESS COMMUNICATION DEVICE 有权
    方向耦合器和无线通信装置

    公开(公告)号:US20160248141A1

    公开(公告)日:2016-08-25

    申请号:US15049834

    申请日:2016-02-22

    CPC classification number: H01P5/18 H01P5/184 H04B1/44

    Abstract: A directional coupler including a main line having an input terminal and an output terminal, and a sub-line having a coupling terminal and an isolation terminal, the main line, the sub-line, the input terminal, the output terminal, the coupling terminal and the isolation terminal being disposed within a laminate, wherein the main line and the sub-line extend in a loop shape in parallel with and spaced apart from each other by a gap such that electromagnetic coupling is generated therebetween and such that the main line is positioned outside the sub-line on a coupling layer, the input terminal, the output terminal, the coupling terminal and the isolation terminal are disposed outside the main line, and the main line is interposed between the output terminal and the sub-line.

    Abstract translation: 一种定向耦合器,包括具有输入端和输出端的主线,以及具有耦合端子和隔离端子的子线,主线,子线,输入端,输出端,耦合端 并且所述隔离端子设置在层压体内,其中所述主线路和所述子线路以与所述主线路和所述子线路之间的间隔彼此平行并间隔开的环形延伸,使得在其间产生电磁耦合,并且所述主线路 位于耦合层的子线外侧,输入端子,输出端子,耦合端子和隔离端子配置在主线的外侧,主线插在输出端子与副线之间。

    MULTILAYER BAND-PASS FILTER
    8.
    发明公开

    公开(公告)号:US20230231530A1

    公开(公告)日:2023-07-20

    申请号:US18071936

    申请日:2022-11-30

    CPC classification number: H03H7/0169 H03H7/0115 H03H9/0561

    Abstract: A band-pass filter includes a first inductor and a second inductor electromagnetically coupled to each other, a first ground terminal electrically connected to the first inductor, a second ground terminal electrically connected to the second inductor, and a stack for integrating the first inductor, the second inductor, the first ground terminal, and the second ground terminal. The first ground terminal and the second ground terminal are each connected to a ground and are not electrically connected to each other in the stack.

    ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREFOR

    公开(公告)号:US20230138154A1

    公开(公告)日:2023-05-04

    申请号:US17910612

    申请日:2021-03-12

    Abstract: An electronic component includes conductor layers and insulating resin layers which are alternately stacked on a substrate. One of the insulating resin layers positioned in the lowermost layer is smaller in thickness than the insulating resin layers, and the insulating resin layers are smaller in thermal expansion coefficient than the one of the insulating resin layers. Thus, an element that requires high processing accuracy, such as a capacitor, can be embedded in the insulating resin layer positioned in the lowermost layer and having a small thickness, and an element that requires a sufficient conductor thickness, such as an inductor, can be embedded in the insulating resin layers having a large thickness. In addition, since the insulating resin layers each have a small thermal expansion coefficient, the occurrence of warpage and peeling can be suppressed.

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