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公开(公告)号：US20150262920A1
公开(公告)日：2015-09-17
申请号：US14215605
申请日：2014-03-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： You Chye How , Huay Yann Tay
IPC: H01L23/495 , H01L21/3213 , H01L23/31 , H01L23/00 , H01L21/56
CPC classification number: H01L24/13 , H01L21/4825 , H01L23/3107 , H01L23/3114 , H01L23/49513 , H01L23/49537 , H01L23/49541 , H01L23/49555 , H01L23/49589 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/02205 , H01L2224/0345 , H01L2224/0361 , H01L2224/0401 , H01L2224/05166 , H01L2224/05647 , H01L2224/1145 , H01L2224/1146 , H01L2224/1147 , H01L2224/11614 , H01L2224/11618 , H01L2224/11622 , H01L2224/1181 , H01L2224/13023 , H01L2224/13026 , H01L2224/13078 , H01L2224/13147 , H01L2224/13562 , H01L2224/13616 , H01L2224/13647 , H01L2224/1601 , H01L2224/1607 , H01L2224/16113 , H01L2224/16245 , H01L2224/16503 , H01L2224/291 , H01L2224/32245 , H01L2224/73253 , H01L2224/81191 , H01L2224/814 , H01L2224/8181 , H01L2224/81815 , H01L2224/83192 , H01L2224/83815 , H01L2224/92225 , H01L2924/01327 , H01L2924/181 , H01L2924/3841 , H01L2924/00012 , H01L2924/00014 , H01L2924/014
Abstract: An integrated circuit (“IC”) package including at least one IC die having a first side with at least two adjacent bump pads thereon and a second side opposite the first side; a first substrate having a first side with a plurality of electrical contact surfaces thereon; and a plurality of copper pillars, each having a first end attached to one of the adjacent bump pads and a second end attached to one of the electrical contact surfaces.
Abstract translation: 一种集成电路（“IC”）封装，其包括至少一个具有第一侧的IC管芯，其上具有至少两个相邻的凸点焊盘和与第一侧相对的第二侧; 第一基板，其上具有多个电接触表面的第一侧; 以及多个铜柱，每个铜柱具有附接到相邻凸块之一的第一端和连接到电接触表面之一的第二端。
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公开(公告)号：US20150053586A1
公开(公告)日：2015-02-26
申请号：US13973760
申请日：2013-08-22
Applicant: Texas Instruments Incorporated
Inventor： You Chye How , Siew Kee Lee , Huay Yann Tay
IPC: B65D85/62
CPC classification number: H05K13/0084 , Y10T428/13
Abstract: A carrier tape for transporting electronic components having a linearly displaceable continuous web and a plurality of pocket structures connected to the continuous web. The pocket structures are adapted to receive the electronic components. Each of the plurality of pocket structures defines an opening to enable passage of the electronic component into the pocket structure. Each of the pocket structures define at least one tab that is adapted to retain an electronic component in the pocket structure without a closure member.
Abstract translation: 一种用于运送具有线性可移动的连续卷材的电子部件的载带和连接到连续卷材的多个袋结构。 口袋结构适于接收电子部件。 多个凹穴结构中的每一个限定了一个开口，以使得电子部件能够通过到口袋结构中。 每个凹穴结构限定至少一个凸片，其适于将电子部件保持在口袋结构中而没有闭合部件。
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公开(公告)号：US09123626B1
公开(公告)日：2015-09-01
申请号：US14192402
申请日：2014-02-27
Applicant: Texas Instruments Incorporated
Inventor： You Chye How , Siew Kee Lee , Huay Yann Tay
IPC: H01L23/48 , H01L29/40 , H01L21/00 , H01L25/16 , H01L23/495 , H01L23/528 , H01L23/00 , H01L23/31 , H01L23/532 , H01L21/768 , H01L21/56 , H01L25/00
CPC classification number: H01L25/165 , H01L21/561 , H01L23/3107 , H01L23/481 , H01L23/49541 , H01L23/53214 , H01L23/53228 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/92 , H01L24/94 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06102 , H01L2224/06181 , H01L2224/131 , H01L2224/16245 , H01L2224/16265 , H01L2224/1703 , H01L2224/81801 , H01L2224/9212 , H01L2224/9222 , H01L2224/94 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/14 , H01L2924/181 , H01L2924/19104 , H01L2924/19106 , H01L2924/00 , H01L2924/00012 , H01L2924/014 , H01L2224/81 , H01L2924/00014
Abstract: A method for packaging integrated circuit die such that each package includes die with integrated passive components mounted to either the back surface, the active surface or both the back and active surfaces of the die.
Abstract translation: 一种用于封装集成电路管芯的方法，使得每个封装包括具有安装到管芯的背表面，活性表面或后表面和有源表面的集成无源元件的管芯。
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Patent Agency Ranking
公开(公告)号：US20240404973A1
公开(公告)日：2024-12-05
申请号：US18327036
申请日：2023-05-31
Applicant: Texas Instruments Incorporated
Inventor： Mohamad Ashraf bin Mohd Arshad , Jeffrey Salvacion Solas , Ruby Ann Merto Camenforte , Huay Yann Tay , Chia Wei Chang , Xiaolei Liao
Abstract: An example semiconductor device package includes a semiconductor die having bond pads on a device side surface, and a build-up routing layer on the semiconductor die including: connection level conductors directly contacting the bond pads; trace level conductors on the connection level conductors directly contacting distal ends of the connection level conductors; dielectric material surrounding the connection level conductors and the trace level conductors; terminals formed of portions of a top layer of the trace level conductors having a board side surface exposed from the dielectric material, wherein an electrical connection between the terminals and the bond pads is formed without a solder joint or a bond wire; and mold compound covering a portion of the semiconductor die, the trace level conductors and the connection level conductors of the build-up routing layer, wherein the board side surface of the terminals is exposed from the mold compound.
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公开(公告)号：US20170053883A1
公开(公告)日：2017-02-23
申请号：US15254948
申请日：2016-09-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： You Chye How , Huay Yann Tay
IPC: H01L23/00 , H01L23/495 , H01L21/48 , H01L23/31
CPC classification number: H01L24/13 , H01L21/4825 , H01L23/3107 , H01L23/3114 , H01L23/49513 , H01L23/49537 , H01L23/49541 , H01L23/49555 , H01L23/49589 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/02205 , H01L2224/0345 , H01L2224/0361 , H01L2224/0401 , H01L2224/05166 , H01L2224/05647 , H01L2224/1145 , H01L2224/1146 , H01L2224/1147 , H01L2224/11614 , H01L2224/11618 , H01L2224/11622 , H01L2224/1181 , H01L2224/13023 , H01L2224/13026 , H01L2224/13078 , H01L2224/13147 , H01L2224/13562 , H01L2224/13616 , H01L2224/13647 , H01L2224/1601 , H01L2224/1607 , H01L2224/16113 , H01L2224/16245 , H01L2224/16503 , H01L2224/291 , H01L2224/32245 , H01L2224/73253 , H01L2224/81191 , H01L2224/814 , H01L2224/8181 , H01L2224/81815 , H01L2224/83192 , H01L2224/83815 , H01L2224/92225 , H01L2924/01327 , H01L2924/181 , H01L2924/3841 , H01L2924/00012 , H01L2924/00014 , H01L2924/014
Abstract: An integrated circuit (“IC”) package including at least one IC die having a first side with at least two adjacent bump pads thereon and a second side opposite the first side; a first substrate having a first side with a plurality of electrical contact surfaces thereon; and a plurality of copper pillars, each having a first end attached to one of the adjacent bump pads and a second end attached to one of the electrical contact surfaces.
Abstract translation: 一种集成电路（“IC”）封装，包括至少一个IC裸片，其具有第一侧和至少两个相邻的凸块焊盘和与第一侧相对的第二侧; 第一基板，其上具有多个电接触表面的第一侧; 以及多个铜柱，每个铜柱具有附接到相邻凸块之一的第一端和连接到电接触表面之一的第二端。
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公开(公告)号：US11328984B2
公开(公告)日：2022-05-10
申请号：US15858948
申请日：2017-12-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： You Chye How , Huay Yann Tay , Franklin Santos Marcelino
IPC: H01L23/495 , H01L23/498 , H01L23/31 , H01L23/00 , H01L21/48 , H01L21/56 , H01L25/00
Abstract: Multi-die integrated circuit packages and methods of manufacturing the same are disclosed. An example integrated circuit package includes a first leadframe, a first die on a first side of the first leadframe, and a second die on a second side of the first leadframe opposite the first side. The example integrated circuit package further includes external second leadframe separate from the first leadframe.
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公开(公告)号：US20190206772A1
公开(公告)日：2019-07-04
申请号：US15858948
申请日：2017-12-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： You Chye How , Huay Yann Tay , Franklin Santos Marcelino
IPC: H01L23/495 , H01L23/498 , H01L23/31 , H01L23/00 , H01L21/48 , H01L21/56 , H01L25/00
CPC classification number: H01L23/49575 , H01L21/4839 , H01L21/4842 , H01L21/56 , H01L23/3121 , H01L23/3135 , H01L23/49513 , H01L23/49537 , H01L23/49805 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/50 , H01L2224/32141 , H01L2224/48091 , H01L2224/48177 , H01L2224/48247 , H01L2224/49052 , H01L2224/49109 , H01L2224/73265
Abstract: Multi-die integrated circuit packages and methods of manufacturing the same are disclosed. An example integrated circuit package includes a first leadframe, a first die on a first side of the first leadframe, and a second die on a second side of the first leadframe opposite the first side. The example integrated circuit package further includes external second leadframe separate from the first leadframe.
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公开(公告)号：US20150243639A1
公开(公告)日：2015-08-27
申请号：US14192402
申请日：2014-02-27
Applicant: Texas Instruments Incorporated
Inventor： You Chye How , Siew Kee Lee , Huay Yann Tay
IPC: H01L25/16 , H01L23/528 , H01L23/00 , H01L25/00 , H01L23/31 , H01L23/532 , H01L21/768 , H01L21/56 , H01L23/495 , H01L23/48
CPC classification number: H01L25/165 , H01L21/561 , H01L23/3107 , H01L23/481 , H01L23/49541 , H01L23/53214 , H01L23/53228 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/92 , H01L24/94 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06102 , H01L2224/06181 , H01L2224/131 , H01L2224/16245 , H01L2224/16265 , H01L2224/1703 , H01L2224/81801 , H01L2224/9212 , H01L2224/9222 , H01L2224/94 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/14 , H01L2924/181 , H01L2924/19104 , H01L2924/19106 , H01L2924/00 , H01L2924/00012 , H01L2924/014 , H01L2224/81 , H01L2924/00014
Abstract: A method for packaging integrated circuit die such that each package includes die with integrated passive components mounted to either the back surface, the active surface or both the back and active surfaces of the die.
Abstract translation: 一种用于封装集成电路管芯的方法，使得每个封装包括具有安装到管芯的背表面，活性表面或后表面和有源表面的集成无源元件的管芯。
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