公开(公告)号：US20100038716A1

公开(公告)日：2010-02-18

申请号：US12574162

申请日：2009-10-06

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Tamae TAKANO

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Tamae TAKANO

IPC分类号： H01L29/786

CPC分类号： H01L29/04 ,  H01L21/0237 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78675

摘要： There is provided a technique to form a single crystal semiconductor thin film or a substantially single crystal semiconductor thin film. A catalytic element for facilitating crystallization of an amorphous semiconductor thin film is added to the amorphous semiconductor thin film, and a heat treatment is carried out to obtain a crystalline semiconductor thin film. After the crystalline semiconductor thin film is irradiated with ultraviolet light or infrared light, a heat treatment at a temperature of 900 to 1200° C. is carried out in a reducing atmosphere. The surface of the crystalline semiconductor thin film is extremely flattened through this step, defects in crystal grains and crystal grain boundaries disappear, and the single crystal semiconductor thin film or substantially single crystal semiconductor thin film is obtained.

摘要翻译： 提供了形成单晶半导体薄膜或基本单晶半导体薄膜的技术。 将非晶半导体薄膜的促进结晶化的催化剂元素添加到非晶半导体薄膜中，进行热处理，得到结晶半导体薄膜。 在用紫外线或红外线照射结晶半导体薄膜之后，在还原气氛中进行900〜1200℃的热处理。 结晶半导体薄膜的表面通过该工序极其平坦化，晶粒和晶界的缺陷消失，得到单晶半导体薄膜或大致单晶半导体薄膜。

公开(公告)号：US20110073934A1

公开(公告)日：2011-03-31

申请号：US12963847

申请日：2010-12-09

申请人： Tamae TAKANO ,  Tetsuya KAKEHATA ,  Shunpei YAMAZAKI

发明人： Tamae TAKANO ,  Tetsuya KAKEHATA ,  Shunpei YAMAZAKI

IPC分类号： H01L29/792

CPC分类号： H01L27/1157 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11568 ,  H01L27/1214 ,  H01L27/1251 ,  H01L27/13 ,  H01L29/4234 ,  H01L29/792 ,  H01L29/7923

摘要： The invention provides a semiconductor device and its manufacturing method in which a memory transistor and a plurality of thin film transistors that have gate insulating films with different thicknesses are fabricated over a substrate. The invention is characterized by the structural difference between the memory transistor and the plurality of thin film transistors. Specifically, the memory transistor and some of the plurality of thin film transistors are provided to have a bottom gate structure while the other thin film transistors are provided to have a top gate structure, which enables the reduction of characteristic defects of the transistor and simplification of its manufacturing process.

公开(公告)号：US20110043513A1

公开(公告)日：2011-02-24

申请号：US12915086

申请日：2010-10-29

申请人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Mitsuaki OSAME ,  Takashi HAMADA ,  Tamae TAKANO ,  Yu YAMAZAKI ,  Aya ANZAI

发明人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Mitsuaki OSAME ,  Takashi HAMADA ,  Tamae TAKANO ,  Yu YAMAZAKI ,  Aya ANZAI

IPC分类号： G09G5/00 ,  G09G3/20

CPC分类号： H01L27/1214 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  G09G2300/0426 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/0233 ,  H01L27/3262 ,  H01L2251/5323

摘要： A light emitting device comprising a light emitting element and a first transistor and a second transistor controlling current to be supplied to the light emitting element in a pixel; the first transistor is normally-on; the second transistor is normally-off; a channel length of the first transistor is longer than a channel width thereof; a channel length of the second transistor is equal to or shorter than a channel length thereof; gate electrodes of the first transistor and the second transistor are connected to each other; the first transistor and the second transistor have the same polarity; and the light emitting element, the first transistor and the second transistor are all connected in series.

摘要翻译： 一种发光器件，包括发光元件和第一晶体管，以及第二晶体管，控制要在像素中提供给所述发光元件的电流; 第一个晶体管正常工作; 第二晶体管正常断开; 第一晶体管的沟道长度比沟道宽度长; 第二晶体管的沟道长度等于或短于其沟道长度; 第一晶体管和第二晶体管的栅电极彼此连接; 第一晶体管和第二晶体管具有相同的极性; 并且发光元件，第一晶体管和第二晶体管都全部串联连接。

公开(公告)号：US20100149851A1

公开(公告)日：2010-06-17

申请号：US12711333

申请日：2010-02-24

申请人： Yoshinobu ASAMI ,  Tamae TAKANO ,  Masayuki SAKAKURA ,  Ryoji NOMURA ,  Shunpei YAMAZAKI

发明人： Yoshinobu ASAMI ,  Tamae TAKANO ,  Masayuki SAKAKURA ,  Ryoji NOMURA ,  Shunpei YAMAZAKI

IPC分类号： G11C5/06 ,  G11C8/08

CPC分类号： H01L27/1082 ,  B82Y10/00 ,  G11C11/34 ,  G11C13/0014 ,  G11C2213/79 ,  H01L23/4828 ,  H01L27/105 ,  H01L27/1203 ,  H01L27/1244 ,  H01L27/28 ,  H01L29/458 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element.

摘要翻译： 可以在没有接触的情况下发送和接收数据的半导体器件部分地受到一些铁路通行证，电子货币卡等的普及; 然而，提供便宜的半导体器件以进一步普及是主要的任务。 鉴于上述现有条件，本发明的半导体器件包括具有用于提供便宜的半导体器件的简单结构的存储器及其制造方法。 包括在存储器中的存储元件包括含有有机化合物的层，并且将设置在存储元件部分中的TFT的源电极或漏电极用作形成存储元件的位线的导电层。

公开(公告)号：US20120299889A1

公开(公告)日：2012-11-29

申请号：US13570478

申请日：2012-08-09

申请人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Mitsuaki OSAME ,  Takashi HAMADA ,  Tamae TAKANO ,  Yu YAMAZAKI ,  Aya ANZAI

发明人： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Mitsuaki OSAME ,  Takashi HAMADA ,  Tamae TAKANO ,  Yu YAMAZAKI ,  Aya ANZAI

IPC分类号： G09G5/00 ,  H01L27/15

CPC分类号： H01L27/1214 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  G09G2300/0426 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/0233 ,  H01L27/3262 ,  H01L2251/5323

摘要： A light emitting device comprising a light emitting element and a first transistor and a second transistor controlling current to be supplied to the light emitting element in a pixel; the first transistor is normally-on; the second transistor is normally-off; a channel length of the first transistor is longer than a channel width thereof; a channel length of the second transistor is equal to or shorter than a channel length thereof; gate electrodes of the first transistor and the second transistor are connected to each other; the first transistor and the second transistor have the same polarity; and the light emitting element, the first transistor and the second transistor are all connected in series.

摘要翻译： 一种发光器件，包括发光元件和第一晶体管，以及第二晶体管，控制要在像素中提供给所述发光元件的电流; 第一个晶体管正常工作; 第二晶体管正常断开; 第一晶体管的沟道长度比沟道宽度长; 第二晶体管的沟道长度等于或短于其沟道长度; 第一晶体管和第二晶体管的栅电极彼此连接; 第一晶体管和第二晶体管具有相同的极性; 并且发光元件，第一晶体管和第二晶体管都全部串联连接。

公开(公告)号：US20120037978A1

公开(公告)日：2012-02-16

申请号：US13280643

申请日：2011-10-25

申请人： Tamae TAKANO ,  Shunpei YAMAZAKI

发明人： Tamae TAKANO ,  Shunpei YAMAZAKI

IPC分类号： H01L29/792

CPC分类号： H01L27/12 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A nonvolatile semiconductor memory device is provided in such a manner that a semiconductor layer is formed over a substrate, a charge accumulating layer is formed over the semiconductor layer with a first insulating layer interposed therebetween, and a gate electrode is provided over the charge accumulating layer with a second insulating layer interposed therebetween. The semiconductor layer includes a channel formation region provided in a region overlapping with the gate electrode, a first impurity region for forming a source region or drain region, which is provided to be adjacent to the channel formation region, and a second impurity region provided to be adjacent to the channel formation region and the first impurity region. A conductivity type of the first impurity region is different from that of the second impurity region.

摘要翻译： 以半导体层形成在基板上的方式设置非易失性半导体存储元件，在半导体层上形成电荷累积层，其间插入有第一绝缘层，在电荷累积层之上设置栅电极 其间插入有第二绝缘层。 半导体层包括设置在与栅电极重叠的区域中的沟道形成区域，用于形成与沟道形成区域相邻的源极区域或漏极区域的第一杂质区域和设置成与沟道形成区域相邻的第二杂质区域 与沟道形成区域和第一杂质区域相邻。 第一杂质区的导电类型与第二杂质区不同。

公开(公告)号：US20110095354A1

公开(公告)日：2011-04-28

申请号：US12977911

申请日：2010-12-23

申请人： Tamae TAKANO ,  Shunpei YAMAZAKI

发明人： Tamae TAKANO ,  Shunpei YAMAZAKI

IPC分类号： H01L29/792

CPC分类号： H01L27/12 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A nonvolatile semiconductor memory device is provided in such a manner that a semiconductor layer is formed over a substrate, a charge accumulating layer is formed over the semiconductor layer with a first insulating layer interposed therebetween, and a gate electrode is provided over the charge accumulating layer with a second insulating layer interposed therebetween. The semiconductor layer includes a channel formation region provided in a region overlapping with the gate electrode, a first impurity region for forming a source region or drain region, which is provided to be adjacent to the channel formation region, and a second impurity region provided to be adjacent to the channel formation region and the first impurity region. A conductivity type of the first impurity region is different from that of the second impurity region.

摘要翻译： 以半导体层形成在基板上的方式设置非易失性半导体存储元件，在半导体层上形成电荷累积层，其间插入有第一绝缘层，在电荷累积层之上设置栅电极 其间插入有第二绝缘层。 半导体层包括设置在与栅电极重叠的区域中的沟道形成区域，用于形成与沟道形成区域相邻的源极区域或漏极区域的第一杂质区域和设置成与沟道形成区域相邻的第二杂质区域 与沟道形成区域和第一杂质区域相邻。 第一杂质区的导电类型与第二杂质区不同。

公开(公告)号：US20120273778A1

公开(公告)日：2012-11-01

申请号：US13546013

申请日：2012-07-11

申请人： Yoshinobu ASAMI ,  Tamae TAKANO ,  Masayuki SAKAKURA ,  Ryoji NOMURA ,  Shunpei YAMAZAKI

发明人： Yoshinobu ASAMI ,  Tamae TAKANO ,  Masayuki SAKAKURA ,  Ryoji NOMURA ,  Shunpei YAMAZAKI

IPC分类号： H01L29/12

CPC分类号： H01L27/1082 ,  B82Y10/00 ,  G11C11/34 ,  G11C13/0014 ,  G11C2213/79 ,  H01L23/4828 ,  H01L27/105 ,  H01L27/1203 ,  H01L27/1244 ,  H01L27/28 ,  H01L29/458 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element.

摘要翻译： 可以在没有接触的情况下发送和接收数据的半导体器件部分地受到一些铁路通行证，电子货币卡等的普及; 然而，提供便宜的半导体器件以进一步普及是主要的任务。 鉴于上述现有条件，本发明的半导体器件包括具有用于提供便宜的半导体器件的简单结构的存储器及其制造方法。 包括在存储器中的存储元件包括含有有机化合物的层，并且将设置在存储元件部分中的TFT的源电极或漏电极用作形成存储元件的位线的导电层。

公开(公告)号：US20120108049A1

公开(公告)日：2012-05-03

申请号：US13338366

申请日：2011-12-28

申请人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Tamae TAKANO

发明人： Shunpei YAMAZAKI ,  Hisashi OHTANI ,  Tamae TAKANO

IPC分类号： H01L21/28

CPC分类号： H01L29/04 ,  H01L21/0237 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78675

摘要： There is provided a technique to form a single crystal semiconductor thin film or a substantially single crystal semiconductor thin film. A catalytic element for facilitating crystallization of an amorphous semiconductor thin film is added to the amorphous semiconductor thin film, and a heat treatment is carried out to obtain a crystalline semiconductor thin film. After the crystalline semiconductor thin film is irradiated with ultraviolet light or infrared light, a heat treatment at a temperature of 900 to 1200° C. is carried out in a reducing atmosphere. The surface of the crystalline semiconductor thin film is extremely flattened through this step, defects in crystal grains and crystal grain boundaries disappear, and the single crystal semiconductor thin film or substantially single crystal semiconductor thin film is obtained.

摘要翻译： 提供了形成单晶半导体薄膜或基本单晶半导体薄膜的技术。 将非晶半导体薄膜的促进结晶化的催化剂元素添加到非晶半导体薄膜中，进行热处理，得到结晶半导体薄膜。 在用紫外线或红外线照射结晶半导体薄膜之后，在还原气氛中进行900〜1200℃的热处理。 结晶半导体薄膜的表面通过该工序极其平坦化，晶粒和晶界的缺陷消失，得到单晶半导体薄膜或大致单晶半导体薄膜。

公开(公告)号：US20090258479A1

公开(公告)日：2009-10-15

申请号：US12488095

申请日：2009-06-19

申请人： Tamae TAKANO ,  Shunpei YAMAZAKI

发明人： Tamae TAKANO ,  Shunpei YAMAZAKI

IPC分类号： H01L21/28 ,  H01L21/22

CPC分类号： H01L27/12 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A nonvolatile semiconductor memory device is provided in such a manner that a semiconductor layer is formed over a substrate, a charge accumulating layer is formed over the semiconductor layer with a first insulating layer interposed therebetween, and a gate electrode is provided over the charge accumulating layer with a second insulating layer interposed therebetween. The semiconductor layer includes a channel formation region provided in a region overlapping with the gate electrode, a first impurity region for forming a source region or drain region, which is provided to be adjacent to the channel formation region, and a second impurity region provided to be adjacent to the channel formation region and the first impurity region. A conductivity type of the first impurity region is different from that of the second impurity region.

摘要翻译： 以半导体层形成在基板上的方式设置非易失性半导体存储元件，在半导体层上形成电荷累积层，其间插入有第一绝缘层，在电荷累积层之上设置栅电极 其间插入有第二绝缘层。 半导体层包括设置在与栅电极重叠的区域中的沟道形成区域，用于形成与沟道形成区域相邻的源极区域或漏极区域的第一杂质区域和设置成与沟道形成区域相邻的第二杂质区域 与沟道形成区域和第一杂质区域相邻。 第一杂质区的导电类型与第二杂质区不同。