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公开(公告)号：US20240353470A1
公开(公告)日：2024-10-24
申请号：US18641314
申请日：2024-04-19
Applicant: Tektronix, Inc.
Inventor： Niranjan R. Hegde , Daniel G. Knierim , Vivek Shivaram , Krishna N H Sri , Joshua J. O'Brien , Shubha B , Yogesh M. Pai
IPC: G01R31/26
CPC classification number: G01R31/2621
Abstract: A test and measurement system includes a device under test (DUT) interface structured to couple to at least one DUT and a measurement instrument coupled to the interface. The instrument includes one or more processors configured to, when testing the DUT, accept a measurement signal at a first input channel and generate a first sample waveform from the measurement signal using a first set of parameters, accept the measurement signal at a second input channel and generate a second sample from the measurement signal using a second set of parameters, and generate a measurement waveform from a combination of the first sample waveform and the second sample waveform. Additionally, the measurement instrument is structured to determine settling errors in the first pulse of a double-pulse test, and then compensate measurements made in subsequent pulses for the settling errors.
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公开(公告)号：US20240044975A1
公开(公告)日：2024-02-08
申请号：US18488936
申请日：2023-10-17
Applicant: Tektronix, Inc.
Inventor： Pirooz Hojabri , Joshua J. O'Brien , Gregory A. Martin , Patrick Satarzadeh , Karen Hovakimyan
IPC: G01R31/317 , G01R31/28 , G01R31/3187 , G01R31/319
CPC classification number: G01R31/3171 , G01R31/2841 , G01R31/3187 , G01R31/31905
Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.
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公开(公告)号：US20220334144A1
公开(公告)日：2022-10-20
申请号：US17721294
申请日：2022-04-14
Applicant: Tektronix, Inc.
Inventor： Joshua J. O'Brien , Josiah A. Bartlett
IPC: G01R1/067
Abstract: A measurement probe for producing a test signal for a measurement instrument includes a probe head structured to be connected to at least a first testing point and a second testing point of a Device Under Test (DUT), a current detector in the measurement probe structured to determine a current flowing between the first testing point and the second testing point of the DUT, a first selectable signal path that causes a voltage signal from the first testing point or a voltage signal from the second testing point to be routed to the measurement instrument as a selected voltage test signal, and a second selectable signal path that causes a current signal from an output of the current detector to be routed to the measurement instrument as a selected current test signal. Methods of testing a DUT using the measurement probe are also described, as well as a system for measuring signals from a DUT using the measurement probe.
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公开(公告)号：US20220148065A1
公开(公告)日：2022-05-12
申请号：US17515198
申请日：2021-10-29
Applicant: Tektronix, Inc.
Inventor： Joshua J. O'Brien
IPC: G06Q30/06 , G06F11/273 , G06F8/65
Abstract: A test and measurement instrument includes a system and/or method to generate a recommendation of a feature upgrade to the instrument. Such a method may include receiving a request by a user to perform an action on the instrument and performing the requested action by the instrument to generate first results. Then the instrument modifies an instrument parameter to one that is not presently available to the user, and performs the requested action again with the modified parameter to generate second results. After both results are generated, the instrument compares the first results to the second results and informs the user when the second results differ from the first results. Informing the user may include instructions for upgrading the instrument to include the modified parameter.
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公开(公告)号：US20220407523A1
公开(公告)日：2022-12-22
申请号：US17845896
申请日：2022-06-21
Applicant: Tektronix, Inc.
Inventor： Joshua J. O'Brien , Timothy E. Bieber , Barton T. Hickman
Abstract: A test and measurement instrument includes a first data channel including a first data converter operating at a first rate, and a second data channel including a second data converter operating at a second rate that is different than the first rate. Rate controls may include a clock generation circuit. The clock generation circuit includes an intermediate frequency generator structured to generate an intermediate frequency clock from a first clock reference signal, a first frequency clock generator structured to generate a first frequency clock directly from the intermediate frequency clock, and a second frequency clock generator structured to generate a second frequency clock directly from the intermediate frequency clock. The first frequency clock may be used to control the rate of the first data channel, and the second frequency clock may be used to control the rate of the second data channel. Methods are also described.
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Patent Agency Ranking
公开(公告)号：US11372025B2
公开(公告)日：2022-06-28
申请号：US17317841
申请日：2021-05-11
Applicant: Tektronix, Inc.
Inventor： Daniel G. Knierim , Barton T. Hickman , Joshua J. O'Brien
IPC: G01R13/02 , H03K5/00 , H03L7/08 , G01R31/319
Abstract: A system includes a plurality of oscilloscopes, each oscilloscope having an output port and an input port, a cable connecting the output port of an initial oscilloscope of the plurality of oscilloscopes to the input port of a second oscilloscope of the plurality of oscilloscopes, the initial oscilloscope having a processing element to generate a master run clock, the second oscilloscope having a processing element including a phase-locked loop to lock a slave run clock to the master run clock, wherein the processing element of one of the oscilloscopes executes code to cause the processing element to manipulate one of the run clocks to pass trigger information to another of the plurality of oscilloscopes. A method of synchronizing at least two oscilloscopes including a master oscilloscope and at least one slave oscilloscope includes connecting the at least two oscilloscopes together using output ports and input ports of the at least two oscilloscopes and at least one cable; sending a master run clock from the master oscilloscope to at least one slave oscilloscope; synchronizing a run clock of the at least one slave oscilloscope to the master run clock; recognizing a trigger event at a first oscilloscope of the at least two oscilloscopes; altering the run clock at the first oscilloscope to encode a trigger indication; and receiving the altered run clock at a second oscilloscope of the at least two oscilloscopes, wherein the trigger indication causes the second oscilloscope to recognize the trigger event.
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公开(公告)号：US20180299491A1
公开(公告)日：2018-10-18
申请号：US15952547
申请日：2018-04-13
Applicant: Tektronix, Inc.
Inventor： David A. Holaday , Joshua J. O'Brien
IPC: G01R13/02
Abstract: A test and measurement instrument can include an input to receive an analog signal, a sampler to produce digital sample data corresponding to the analog signal, a buffer to store a portion of the sample data, a memory to store sample data from the buffer, a plurality of comparators to establish a vertical range, and a controller configured to configure the plurality of comparators to establish a first vertical range based on sample data in the buffer, and determine whether any of the sample data in the buffer transitions outside the first vertical range during a period of time.
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9.发明授权公开(公告)号：US11994967B2
公开(公告)日：2024-05-28
申请号：US17094677
申请日：2020-11-10
Applicant: Tektronix, Inc.
Inventor： Joshua J. O'Brien
CPC classification number: G06F11/26 , G06F11/221 , G06F13/20 , H04L1/0013 , H04L1/0015 , H04L1/203 , H04L7/0016 , H04L2001/0094
Abstract: A test and measurement device includes an input port for receiving a bus conducting data from a device under test, and processing element coupled to the input port. The processing element is configured to execute instructions that cause the processing element to determine a data sequence from a signal of the bus received on a main channel of the device, and use information from at least one other signal of the bus on an auxiliary channel of the device based upon a protocol associated with the bus to adjust parameters for performing error detection on the data sequence. A method of performing error detection in a test instrument includes receiving, at an input port of the test instrument, a bus conducting a data sequence from a device under test, determining the data sequence from a signal of the bus received on a main channel of the test instrument, and using information from at least one other signal of the bus received on an auxiliary channel of the test instrument to perform error detection on the data sequence.
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公开(公告)号：US11789070B2
公开(公告)日：2023-10-17
申请号：US17324007
申请日：2021-05-18
Applicant: Tektronix, Inc.
Inventor： Pirooz Hojabri , Joshua J. O'Brien , Gregory A. Martin , Patrick Satarzadeh , Karen Hovakimyan
IPC: G06F11/00 , G01R31/317 , G01R31/28 , G01R31/3187 , G01R31/319
CPC classification number: G01R31/3171 , G01R31/2841 , G01R31/3187 , G01R31/31905
Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.
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