公开(公告)号：US20080135977A1

公开(公告)日：2008-06-12

申请号：US11614579

申请日：2006-12-21

申请人： Thorsten Meyer ,  Bernd Waidhas ,  Markus Brunnbauer ,  Grit Sommer ,  Thomas Wagner

发明人： Thorsten Meyer ,  Bernd Waidhas ,  Markus Brunnbauer ,  Grit Sommer ,  Thomas Wagner

IPC分类号： H01L21/20 ,  H01L29/00

CPC分类号： H01L23/645 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24195 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012

摘要： Semiconductor element having a semiconductor chip and a passive component, as well as a method for its productionThe invention relates to a semiconductor component (1) having a semiconductor chip (2), and a passive component (3), with the semiconductor component (1) having a coil (6) as the passive component (3). The semiconductor chip (2) and the passive component (3) are embedded in a plastic encapsulation compound (4) with connection elements to external contacts (31).

摘要翻译： 具有半导体芯片和无源元件的半导体元件及其制造方法本发明涉及具有半导体芯片（2）的半导体元件（1）和具有半导体元件（2）的无源元件（3） 1）具有线圈（6）作为被动部件（3）。 将半导体芯片（2）和无源部件（3）嵌入塑料封装化合物（4）中，其中连接元件连接到外部触点（31）。

公开(公告)号：US08471393B2

公开(公告)日：2013-06-25

申请号：US11614579

申请日：2006-12-21

申请人： Thorsten Meyer ,  Bernd Waidhas ,  Markus Brunnbauer ,  Grit Sommer ,  Thomas Wagner

发明人： Thorsten Meyer ,  Bernd Waidhas ,  Markus Brunnbauer ,  Grit Sommer ,  Thomas Wagner

IPC分类号： H01L23/522

CPC分类号： H01L23/645 ,  H01L21/568 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24195 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor component includes a semiconductor chip, and a passive component, with the semiconductor component including a coil as the passive component. The semiconductor chip and the passive component are embedded in a plastic encapsulation compound with connection elements to external contacts.

摘要翻译： 半导体部件包括半导体芯片和无源部件，其中半导体部件包括线圈作为被动部件。 半导体芯片和无源部件嵌入到具有与外部触点的连接元件的塑料封装化合物中。

公开(公告)号：US20140151700A1

公开(公告)日：2014-06-05

申请号：US13693109

申请日：2012-12-04

申请人： Thorsten Meyer ,  Markus Brunnbauer ,  Bernd Waidhas

发明人： Thorsten Meyer ,  Markus Brunnbauer ,  Bernd Waidhas

IPC分类号： H01L23/544 ,  H01L21/48

CPC分类号： H01L21/4853 ,  H01L22/32 ,  H01L23/49816 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

摘要： A chip package may include an interconnection layer having a first surface configured to face at least one chip, and a second surface opposite the first surface; at least one first pad and at least one second pad formed at at least one of the first surface and the second surface of the interconnection layer; at least one first conductive interconnect formed over the at least one first pad; and at least one second conductive interconnect formed over the at least one second pad, wherein a height of the at least one first conductive interconnect is less than a height of the at least one second conductive interconnect.

摘要翻译： 芯片封装可以包括具有构造成面对至少一个芯片的第一表面和与第一表面相对的第二表面的互连层; 至少一个第一焊盘和形成在所述互连层的所述第一表面和所述第二表面中的至少一个上的至少一个第二焊盘; 形成在所述至少一个第一焊盘上的至少一个第一导电互连; 以及形成在所述至少一个第二焊盘上的至少一个第二导电互连，其中所述至少一个第一导电互连的高度小于所述至少一个第二导电互连的高度。

公开(公告)号：US20130175686A1

公开(公告)日：2013-07-11

申请号：US13346993

申请日：2012-01-10

申请人： Thorsten Meyer ,  Gerald Ofner ,  Bernd Waidhas

发明人： Thorsten Meyer ,  Gerald Ofner ,  Bernd Waidhas

IPC分类号： H01L23/498 ,  H01L21/78 ,  H01L21/56

CPC分类号： H01L24/81 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/14 ,  H01L24/17 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/0231 ,  H01L2224/02371 ,  H01L2224/02373 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00

摘要： A flip chip package structure is proposed in which a redistribution layer (RDL) is disposed on a surface of both a semiconductor chip and one or more lateral extensions of the semiconductor chip surface. The lateral extensions may be made using, e.g., a reconstituted wafer to implement a fanout region lateral to one or more sides of the semiconductor chip. One or more electrical connectors such as solder bumps or copper cylinders may be applied to the RDL, and an interposer such as a PCB interposer may be connected to the electrical connectors. In this way, a relatively tight semiconductor pad pitch may be accommodated and translated to an appropriate circuit board pitch without necessarily requiring a silicon or glass interposer.

摘要翻译： 提出了一种倒装芯片封装结构，其中再分配层（RDL）设置在半导体芯片和半导体芯片表面的一个或多个侧向延伸部分的表面上。 横向延伸部可以使用例如重构的晶片来实现半导体芯片的一个或多个侧面的横向扇出区域。 可以将一个或多个电连接器（例如焊料凸块或铜圆筒）施加到RDL，并且诸如PCB插入器的插入件可以连接到电连接器。 以这种方式，可以容纳相对紧凑的半导体衬垫间距并将其转换成适当的电路板间距，而不需要硅或玻璃插入件。

公开(公告)号：US08716859B2

公开(公告)日：2014-05-06

申请号：US13346993

申请日：2012-01-10

申请人： Thorsten Meyer ,  Gerald Ofner ,  Bernd Waidhas

发明人： Thorsten Meyer ,  Gerald Ofner ,  Bernd Waidhas

IPC分类号： H01L23/52

CPC分类号： H01L24/81 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/14 ,  H01L24/17 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/0231 ,  H01L2224/02371 ,  H01L2224/02373 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00

摘要： A flip chip package structure is proposed in which a redistribution layer (RDL) is disposed on a surface of both a semiconductor chip and one or more lateral extensions of the semiconductor chip surface. The lateral extensions may be made using, e.g., a reconstituted wafer to implement a fanout region lateral to one or more sides of the semiconductor chip. One or more electrical connectors such as solder bumps or copper cylinders may be applied to the RDL, and an interposer such as a PCB interposer may be connected to the electrical connectors. In this way, a relatively tight semiconductor pad pitch may be accommodated and translated to an appropriate circuit board pitch without necessarily requiring a silicon or glass interposer.

摘要翻译： 提出了一种倒装芯片封装结构，其中再分配层（RDL）设置在半导体芯片和半导体芯片表面的一个或多个侧向延伸部分的表面上。 横向延伸部可以使用例如重构的晶片来实现半导体芯片的一个或多个侧面的横向扇出区域。 可以将一个或多个电连接器（例如焊料凸块或铜圆筒）施加到RDL，并且诸如PCB插入器的插入件可以连接到电连接器。 以这种方式，可以容纳相对紧凑的半导体衬垫间距并将其转换成适当的电路板间距，而不需要硅或玻璃插入件。

公开(公告)号：US08415803B2

公开(公告)日：2013-04-09

申请号：US12871939

申请日：2010-08-31

申请人： Thorsten Meyer ,  Gottfried Beer ,  Christian Geissler ,  Thomas Ort ,  Klaus Pressel ,  Bernd Waidhas ,  Andreas Wolter

发明人： Thorsten Meyer ,  Gottfried Beer ,  Christian Geissler ,  Thomas Ort ,  Klaus Pressel ,  Bernd Waidhas ,  Andreas Wolter

IPC分类号： H01L23/48 ,  H01L21/768

摘要： A method and a system for routing electrical connections are disclosed. A semiconductor device includes a first semiconductor chip and a routing plane having a plurality of routing lines. A first connecting line is electrically coupled to the first semiconductor chip and one of the plurality of routing lines and a second connecting line is electrically coupled to the one of the plurality of routing lines and to one of a second semiconductor chip or a first external contact element.

公开(公告)号：US20140138827A1

公开(公告)日：2014-05-22

申请号：US14164289

申请日：2014-01-27

申请人： Thorsten Meyer ,  Gerald Ofner ,  Bernd Waidhas

发明人： Thorsten Meyer ,  Gerald Ofner ,  Bernd Waidhas

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/498

CPC分类号： H01L24/81 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/14 ,  H01L24/17 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/0231 ,  H01L2224/02371 ,  H01L2224/02373 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00

摘要： According to various embodiments, a flip chip package structure is provided in which a redistribution layer (RDL) is disposed on a surface of both a semiconductor chip and one or more lateral extensions of the semiconductor chip surface. The lateral extensions may be made using, e.g., a reconstituted wafer to implement a fanout region lateral to one or more sides of the semiconductor chip. One or more electrical connectors such as solder bumps or copper cylinders may be applied to the RDL, and an interposer such as a PCB interposer may be connected to the electrical connectors. In this way, a relatively tight semiconductor pad pitch may be accommodated and translated to an appropriate circuit board pitch without necessarily requiring a silicon or glass interposer.

摘要翻译： 根据各种实施例，提供了一种倒装芯片封装结构，其中再分配层（RDL）设置在半导体芯片和半导体芯片表面的一个或多个侧向延伸部分的表面上。 横向延伸部可以使用例如重构的晶片来实现半导体芯片的一个或多个侧面的横向扇出区域。 可以将一个或多个电连接器（例如焊料凸块或铜圆筒）施加到RDL，并且诸如PCB插入器的插入件可以连接到电连接器。 以这种方式，可以容纳相对紧凑的半导体衬垫间距并将其转换成适当的电路板间距，而不需要硅或玻璃插入件。

公开(公告)号：US08598709B2

公开(公告)日：2013-12-03

申请号：US12871939

申请日：2010-08-31

申请人： Thorsten Meyer ,  Gottfried Beer ,  Christian Geissler ,  Thomas Ort ,  Klaus Pressel ,  Bernd Waidhas ,  Andreas Wolter

发明人： Thorsten Meyer ,  Gottfried Beer ,  Christian Geissler ,  Thomas Ort ,  Klaus Pressel ,  Bernd Waidhas ,  Andreas Wolter

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L24/05 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05547 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/18162 ,  H01L2924/00

摘要： A method and a system for routing electrical connections are disclosed. A semiconductor device includes a first semiconductor chip and a routing plane having a plurality of routing lines. A first connecting line is electrically coupled to the first semiconductor chip and one of the plurality of routing lines and a second connecting line is electrically coupled to the one of the plurality of routing lines and to one of a second semiconductor chip or a first external contact element.

摘要翻译： 公开了用于路由电连接的方法和系统。 半导体器件包括第一半导体芯片和具有多个布线线路的布线平面。 第一连接线电耦合到第一半导体芯片，并且多个布线线之一和第二连接线电耦合到多个路由线中的一个并且耦合到第二半导体芯片或第一外部触点之一 元件。

公开(公告)号：US20130256883A1

公开(公告)日：2013-10-03

申请号：US13430765

申请日：2012-03-27

申请人： Thorsten Meyer ,  Bernd Waidhas ,  Thomas Ort

发明人： Thorsten Meyer ,  Bernd Waidhas ,  Thomas Ort

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L23/5386 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/14 ,  H01L24/20 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/14152 ,  H01L2224/14179 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/221 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00

摘要： In various aspects of the disclosure, a package may be provided. The package may include at least one semiconductor device rotated about an axis with respect to an edge of the package, at least one bond pad on each semiconductor device, and at least one conductive trace electrically connected to the semiconductor device through the at least one bond pad.

摘要翻译： 在本公开的各个方面，可以提供包装。 封装可以包括相对于封装的边缘围绕轴旋转的至少一个半导体器件，每个半导体器件上的至少一个接合焊盘以及通过至少一个键电连接到半导体器件的至少一个导电迹线 垫。

公开(公告)号：US20190214327A1

公开(公告)日：2019-07-11

申请号：US15866810

申请日：2018-01-10

申请人： Sonja Koller ,  Bernd Waidhas ,  Thomas Ort ,  Andreas Wolter

发明人： Sonja Koller ,  Bernd Waidhas ,  Thomas Ort ,  Andreas Wolter

IPC分类号： H01L23/373 ,  H01L21/56 ,  H01L23/498 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L23/3733 ,  H01L21/56 ,  H01L23/49816 ,  H01L24/49 ,  H01L25/0657

摘要： A semiconductor device includes a semiconductor die that is coupled to a substrate. A mold compound encapsulates the semiconductor die and one or more passages are in the mold compound between a backside of the mold compound and an electrically non-active region of the first semiconductor die. A thermal conductor material within the one or more of the passages.