Waveform synthesizing circuit
    1.
    发明授权
    Waveform synthesizing circuit 失效
    波形合成电路

    公开(公告)号:US5327021A

    公开(公告)日:1994-07-05

    申请号:US895901

    申请日:1992-06-09

    摘要: A waveform synthesizing circuit comprises a plurality of signal output switching means for outputting predetermined magnitudes of voltage or current signals when a voltage or current value of an input pulse reaches preliminarily assigned comparing reference values, a signal summing means for superimposing output signals from a plurality of signal output switching means for summing, and a comparing signal switching means detecting the rising and falling of the input pulse, providing the comparing reference values with given differences between a plurality of signal output switching means according to an order of operation of a plurality of signal output switching means upon the detection of a rise, and providing the comparing reference values, which are different from those for rising, with given differences between a plurality of signal output switching means according to an order of operation of a plurality of signal output switching means upon the detection of a fall.

    摘要翻译: 一种波形合成电路包括多个信号输出切换装置,用于当输入脉冲的电压或电流值达到预先分配的比较参考值时输出预定幅度的电压或电流信号;信号求和装置,用于叠加来自多个 和用于求和的信号输出切换装置,以及检测输入脉冲的上升和下降的比较信号切换装置,根据多个信号的操作顺序,提供比较参考值与多个信号输出切换装置之间的给定差异 输出切换装置,根据多个信号输出切换装置的操作顺序,给出多个信号输出切换装置之间的给定差异,提供与上升相比不同的比较基准值 在检测到秋天。

    Phase-locked loop circuit
    2.
    发明授权
    Phase-locked loop circuit 失效
    锁相环电路

    公开(公告)号:US5438299A

    公开(公告)日:1995-08-01

    申请号:US220057

    申请日:1994-03-30

    摘要: A PLL circuit comprising a phase comparator unit which forms a differentiation signal based upon both edges of an external signal, outputs an early pulse only during a period in which the differentiation signal is overlapped on a period from the leading edge to the trailing edge of a reference signal, and outputs a late pulse only during a period in which the differentiation signal is overlapped on a period from the trailing edge to the leading edge thereof, a charge pump unit which calculates and compares the amounts of integration of the early pulse and the late pulse, lowers the output voltage when the amount of the late pulse is larger than the amount of the early pulse and raises the output voltage when it is smaller, and a VCO which outputs a corrected reference signal of which the frequency decreases or increases accompanying the increase or decrease in the output voltage of the charge pump unit, wherein the VCO is controlled by the output voltage of the charge pump unit and by the early pulse and the late pulse, and works to raise the oscillation frequency when the late pulse is longer than the early pulse and to lower the oscillation frequency when it is shorter.

    摘要翻译: 一种PLL电路,包括相位比较器单元,该相位比较器单元基于外部信号的两个边缘形成微分信号,仅在从差分信号重叠的周期期间输出早期脉冲,该周期在从前沿到后沿的周期 参考信号,并且仅在从后沿到其前沿的周期中的差分信号重叠的时段期间输出延迟脉冲;电荷泵单元,其计算并比较早期脉冲和 延迟脉冲,当后期脉冲的量大于早期脉冲的量时降低输出电压,并且当其较小时升高输出电压,以及输出频率随之减少或增加的校正参考信号的VCO 电荷泵单元的输出电压的增加或减小,其中VCO由电荷泵单元的输出电压和 早期脉冲和晚期脉冲,并且当延迟脉冲比早期脉冲长时,提高振荡频率,并且当其较短时降低振荡频率。

    Charge-pump circuit for use in phase locked loop
    3.
    发明授权
    Charge-pump circuit for use in phase locked loop 失效
    用于锁相环的电荷泵电路

    公开(公告)号:US5382923A

    公开(公告)日:1995-01-17

    申请号:US223320

    申请日:1994-04-05

    IPC分类号: H03K17/06 H03L7/089 H03L7/093

    CPC分类号: H03L7/0895

    摘要: A charge-pump circuit for controlling a voltage controlled oscillator by converting a phase difference between two input signals, which never become low at the same time, into a voltage. The charge-pump circuit includes first and second feeder circuits, made of bipolar transistors, outputting current in accordance with the input signals; a capacitor circuit having first, second, and third capacitors, and the first and the second or the first and the third capacitors are charged by the output current from the first or the second feeder circuit; and a differential amplifying circuit amplifying the voltage between the ends of the first capacitor to a predetermined voltage for output. The differential amplifying circuit operates to draw the same leakage current from the second and the third capacitors when the first capacitor is not being charged. The charge-pump circuit is effectively used to control the frequency of the voltage controlled oscillator in an PLL circuit having a phase comparator, a voltage controlled oscillator, and an output circuit.

    摘要翻译: 一种电荷泵电路,用于通过将两个不会同时变低的输入信号之间的相位差转换为电压来控制压控振荡器。 电荷泵电路包括由双极晶体管制成的第一和第二馈电电路,根据输入信号输出电流; 具有第一,第二和第三电容器的电容器电路,并且第一和第二或第一和第三电容器由来自第一或第二馈电电路的输出电流充电; 以及差分放大电路,将第一电容器的端部之间的电压放大到预定电压以输出。 当第一电容器未被充电时,差分放大电路用于从第二和第三电容器抽出相同的漏电流。 电荷泵电路有效地用于控制具有相位比较器,压控振荡器和输出电路的PLL电路中的压控振荡器的频率。

    PRINTING APPARATUS, JOB PROCESSING METHOD, PRINTING SYSTEM, STORAGE MEDIUM, AND PROGRAM
    4.
    发明申请
    PRINTING APPARATUS, JOB PROCESSING METHOD, PRINTING SYSTEM, STORAGE MEDIUM, AND PROGRAM 有权
    印刷装置,作业处理方法,印刷系统,存储介质和程序

    公开(公告)号:US20110261385A1

    公开(公告)日:2011-10-27

    申请号:US13177349

    申请日:2011-07-06

    申请人: Yasunori Kanai

    发明人: Yasunori Kanai

    IPC分类号: G06K15/02

    摘要: A job processing method in a printing system having a printing apparatus which can accept a plurality of kinds of print jobs, wherein a print stop request of a print job which is to be printed by the printing apparatus is enabled by a user via a user interface section; and if a print job which is an object of a print stop is a print job which requires printing for a plurality of copies, the print stop processing of the print job is enabled by the printing apparatus in the print stop processing method based on a request from a user inputted via said user interface section in a plurality of kinds of print stop processing methods which can be executed in the printing apparatus.

    摘要翻译: 一种打印系统中的作业处理方法,具有能够接受多种打印作业的打印装置,其中由打印装置打印的打印作业的打印停止请求由用户经由用户界面 部分; 并且如果作为打印停止的对象的打印作业是需要打印多个副本的打印作业,则通过打印装置在打印停止处理方法中基于请求使打印作业的打印停止处理能够被执行 从可以在打印装置中执行的多种打印停止处理方法经由所述用户界面部分输入的用户。

    Method and circuit for achieving frequency conversion
    5.
    发明授权
    Method and circuit for achieving frequency conversion 失效
    实现变频的方法和电路

    公开(公告)号:US5924024A

    公开(公告)日:1999-07-13

    申请号:US855416

    申请日:1997-05-13

    摘要: A frequency conversion method and a frequency conversion circuit which enlarge the frequency difference between the upper and lower sidebands of the output signal so as to enable the undesired sideband to be easily eliminated by a filter even in a case where the frequency of the input signal is low. First, a first excitation signal having a first excitation frequency (Fp) is modulated by an input signal (a) of a predetermined frequency (F1) to produce two sidebands and thereby generate a first intermediate signal (b). Next, a second excitation signal having a second excitation frequency (Fq) lower than the first excitation frequency (Fp) by exactly a frequency twice the frequency of the input signal (a) is modulated by the input signal (a) to produce two sidebands and thereby generate a second intermediate signal (c). Further the first intermediate signal (b) and the second intermediate signal (c) are added so that the lower sideband of the first intermediate signal (b) and the upper sideband of the second intermediate signal (c) are cancelled by each other to thereby generate an output signal (d) composed of the upper sideband of the first intermediate signal (b) and the lower sideband of the second intermediate signal (c). By this, the space between the upper sideband and the lower sideband is widened and thereby the lower band erasing filter can easily erase the lower sideband.

    摘要翻译: 一种频率转换方法和频率转换电路,其扩大了输出信号的上边带和下边带之间的频差,使得即使在输入信号的频率为 低。 首先,具有第一激励频率(Fp)的第一激励信号由预定频率(F1)的输入信号(a)调制以产生两个边带,从而产生第一中间信号(b)。 接下来,通过输入信号(a)调制具有低于第一激励频率(Fp)的第二激励频率(Fq)的精度为输入信号(a)的两倍的频率的第二激励信号,以产生两个边带 从而产生第二中间信号(c)。 此外,第一中间信号(b)和第二中间信号(c)相加,使得第一中间信号(b)的下边带和第二中间信号(c)的上边带彼此抵消,从而 产生由第一中间信号(b)的上边带和第二中间信号(c)的下边带组成的输出信号(d)。 由此,上边带和下边带之间的空间被加宽,从而下带消除滤波器可以容易地擦除下边带。

    Bias circuit with voltage and temperature compensation for an emitter
coupled logic circuit
    6.
    发明授权
    Bias circuit with voltage and temperature compensation for an emitter coupled logic circuit 失效
    偏置电路,具有发射极耦合逻辑电路的电压和温度补偿

    公开(公告)号:US4599521A

    公开(公告)日:1986-07-08

    申请号:US453113

    申请日:1982-12-27

    CPC分类号: H03K19/086 G05F3/22 G05F3/227

    摘要: A bias circuit for providing a reference voltage to an output circuit, for example, an ECL circuit in an LSI. The bias circuit is able to operate at a lower power supply voltage of about -2 V and includes a first transistor having an emitter which is connected to a power supply and a base and a collector commonly connected through an impedance circuit to ground. The bias circuit is also connected to the output circuit, whereby heat generation in the LSI is decreased.

    摘要翻译: 用于向输出电路提供参考电压的偏置电路,例如LSI中的ECL电路。 偏置电路能够在约-2V的较低电源电压下工作,并且包括具有连接到电源的发射极的第一晶体管,以及通过阻抗电路共同连接到地的基极和集电极。 偏置电路也连接到输出电路,由此降低LSI中的发热。

    ECL Integrated circuit
    8.
    发明授权
    ECL Integrated circuit 失效
    ECL集成电路

    公开(公告)号:US4410816A

    公开(公告)日:1983-10-18

    申请号:US327692

    申请日:1981-12-04

    申请人: Yasunori Kanai

    发明人: Yasunori Kanai

    摘要: An ECL integrated circuit comprises an emitter-follower transistor at the output stage and a pull-down resistor connected to the emitter-follower transistor. The ECL integrated circuit is provided with a test circuit on a line extending from the output of emitter-follower transistor to a subsequent stage so as to cause a test current to flow only at the time of the test. The test current is smaller than the current usually flowing to the pull-down resistor but larger than the current flowing to the subsequent stage.

    摘要翻译: ECL集成电路包括在输出级的发射极跟随器晶体管和连接到发射极跟随器晶体管的下拉电阻。 ECL集成电路在从发射极跟随器晶体管的输出延伸到后续级的线上设置有测试电路,以便仅在测试时使测试电流流动。 测试电流小于通常流向下拉电阻的电流,但大于流向后续级的电流。

    Printing apparatus printing method for controlling to stop executing print job and storage medium storing program thereof
    9.
    发明授权
    Printing apparatus printing method for controlling to stop executing print job and storage medium storing program thereof 有权
    用于控制停止执行打印作业的打印设备打印方法及其存储介质存储程序

    公开(公告)号:US08493603B2

    公开(公告)日:2013-07-23

    申请号:US13177349

    申请日:2011-07-06

    申请人: Yasunori Kanai

    发明人: Yasunori Kanai

    IPC分类号: G06F3/12 G06K15/00

    摘要: A job processing method in a printing system having a printing apparatus which can accept a plurality of kinds of print jobs, wherein a print stop request of a print job which is to be printed by the printing apparatus is enabled by a user via a user interface section; and if a print job which is an object of a print stop is a print job which requires printing for a plurality of copies, the print stop processing of the print job is enabled by the printing apparatus in the print stop processing method based on a request from a user inputted via said user interface section in a plurality of kinds of print stop processing methods which can be executed in the printing apparatus.

    摘要翻译: 一种打印系统中的作业处理方法,具有能够接受多种打印作业的打印装置,其中由打印装置打印的打印作业的打印停止请求由用户经由用户界面 部分; 并且如果作为打印停止的对象的打印作业是需要打印多个副本的打印作业,则通过打印装置在打印停止处理方法中基于请求使打印作业的打印停止处理能够被执行 从可以在打印装置中执行的多种打印停止处理方法经由所述用户界面部分输入的用户。