摘要:
A waveform synthesizing circuit comprises a plurality of signal output switching means for outputting predetermined magnitudes of voltage or current signals when a voltage or current value of an input pulse reaches preliminarily assigned comparing reference values, a signal summing means for superimposing output signals from a plurality of signal output switching means for summing, and a comparing signal switching means detecting the rising and falling of the input pulse, providing the comparing reference values with given differences between a plurality of signal output switching means according to an order of operation of a plurality of signal output switching means upon the detection of a rise, and providing the comparing reference values, which are different from those for rising, with given differences between a plurality of signal output switching means according to an order of operation of a plurality of signal output switching means upon the detection of a fall.
摘要:
A PLL circuit comprising a phase comparator unit which forms a differentiation signal based upon both edges of an external signal, outputs an early pulse only during a period in which the differentiation signal is overlapped on a period from the leading edge to the trailing edge of a reference signal, and outputs a late pulse only during a period in which the differentiation signal is overlapped on a period from the trailing edge to the leading edge thereof, a charge pump unit which calculates and compares the amounts of integration of the early pulse and the late pulse, lowers the output voltage when the amount of the late pulse is larger than the amount of the early pulse and raises the output voltage when it is smaller, and a VCO which outputs a corrected reference signal of which the frequency decreases or increases accompanying the increase or decrease in the output voltage of the charge pump unit, wherein the VCO is controlled by the output voltage of the charge pump unit and by the early pulse and the late pulse, and works to raise the oscillation frequency when the late pulse is longer than the early pulse and to lower the oscillation frequency when it is shorter.
摘要:
A charge-pump circuit for controlling a voltage controlled oscillator by converting a phase difference between two input signals, which never become low at the same time, into a voltage. The charge-pump circuit includes first and second feeder circuits, made of bipolar transistors, outputting current in accordance with the input signals; a capacitor circuit having first, second, and third capacitors, and the first and the second or the first and the third capacitors are charged by the output current from the first or the second feeder circuit; and a differential amplifying circuit amplifying the voltage between the ends of the first capacitor to a predetermined voltage for output. The differential amplifying circuit operates to draw the same leakage current from the second and the third capacitors when the first capacitor is not being charged. The charge-pump circuit is effectively used to control the frequency of the voltage controlled oscillator in an PLL circuit having a phase comparator, a voltage controlled oscillator, and an output circuit.
摘要:
A job processing method in a printing system having a printing apparatus which can accept a plurality of kinds of print jobs, wherein a print stop request of a print job which is to be printed by the printing apparatus is enabled by a user via a user interface section; and if a print job which is an object of a print stop is a print job which requires printing for a plurality of copies, the print stop processing of the print job is enabled by the printing apparatus in the print stop processing method based on a request from a user inputted via said user interface section in a plurality of kinds of print stop processing methods which can be executed in the printing apparatus.
摘要:
A frequency conversion method and a frequency conversion circuit which enlarge the frequency difference between the upper and lower sidebands of the output signal so as to enable the undesired sideband to be easily eliminated by a filter even in a case where the frequency of the input signal is low. First, a first excitation signal having a first excitation frequency (Fp) is modulated by an input signal (a) of a predetermined frequency (F1) to produce two sidebands and thereby generate a first intermediate signal (b). Next, a second excitation signal having a second excitation frequency (Fq) lower than the first excitation frequency (Fp) by exactly a frequency twice the frequency of the input signal (a) is modulated by the input signal (a) to produce two sidebands and thereby generate a second intermediate signal (c). Further the first intermediate signal (b) and the second intermediate signal (c) are added so that the lower sideband of the first intermediate signal (b) and the upper sideband of the second intermediate signal (c) are cancelled by each other to thereby generate an output signal (d) composed of the upper sideband of the first intermediate signal (b) and the lower sideband of the second intermediate signal (c). By this, the space between the upper sideband and the lower sideband is widened and thereby the lower band erasing filter can easily erase the lower sideband.
摘要:
A bias circuit for providing a reference voltage to an output circuit, for example, an ECL circuit in an LSI. The bias circuit is able to operate at a lower power supply voltage of about -2 V and includes a first transistor having an emitter which is connected to a power supply and a base and a collector commonly connected through an impedance circuit to ground. The bias circuit is also connected to the output circuit, whereby heat generation in the LSI is decreased.
摘要:
A semiconductor device having improved construction of connection leads extending from the chip carrier housing for connecting a semiconductor chip in the housing with the external circuitry. The connection leads are arranged in the form of a plurality of concentric arrays. The leads in the outermost array are composed of surface connection leads to be electrically connected to the uppermost layer of a multilayer printed board to which the semiconductor device will be mounted, and the leads in the inner array or arrays are composed of lead pins to be inserted into and be electrically connected to the through holes of the multilayer printed board.
摘要:
An ECL integrated circuit comprises an emitter-follower transistor at the output stage and a pull-down resistor connected to the emitter-follower transistor. The ECL integrated circuit is provided with a test circuit on a line extending from the output of emitter-follower transistor to a subsequent stage so as to cause a test current to flow only at the time of the test. The test current is smaller than the current usually flowing to the pull-down resistor but larger than the current flowing to the subsequent stage.
摘要:
A job processing method in a printing system having a printing apparatus which can accept a plurality of kinds of print jobs, wherein a print stop request of a print job which is to be printed by the printing apparatus is enabled by a user via a user interface section; and if a print job which is an object of a print stop is a print job which requires printing for a plurality of copies, the print stop processing of the print job is enabled by the printing apparatus in the print stop processing method based on a request from a user inputted via said user interface section in a plurality of kinds of print stop processing methods which can be executed in the printing apparatus.
摘要:
An image forming apparatus acquires a type of consumable material possessed by the image forming apparatus using a library provided in an application platform, displays forms capable of printing using the type of consumable material acquired, and forms an image using one or more forms designated from among the displayed forms.