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    REAL-SPACE CHARGE-TRANSFER DEVICE AND METHOD THEREOF
    4.
    发明申请
    REAL-SPACE CHARGE-TRANSFER DEVICE AND METHOD THEREOF 有权
    实时充电转移装置及其方法

    公开(公告)号：US20160181523A1

    公开(公告)日：2016-06-23

    申请号：US14573891

    申请日：2014-12-17

    申请人： Don D. Smith

    发明人： Don D. Smith

    IPC分类号： H01L47/02 ,  H03K5/1252 ,  H03K5/04

    CPC分类号： H01L47/026 ,  H03B9/12 ,  H03B2009/123 ,  H03K5/04 ,  H03K5/1252

    摘要： A real-space charge-transfer device is disclosed. In particular, a Gunn diode is disclosed having a conductive structure fabricated overlying its active region. A secondary signal, other than the normal Gunn diode signal, is generated by the Gunn diode based upon a characteristic of the overlying conductive structure. For example, when the conductive structure is a grate having N teeth the secondary signal will have N secondary oscillation cycles that occur during the duration of a single normal Gunn diode oscillation cycle.

    摘要翻译： 公开了一种实际空间电荷转移装置。 特别地，公开了具有制造在其有源区域上的导电结构的耿氏二极管。 基于上覆导电结构的特性，由耿氏二极管产生除正常耿氏二极管信号之外的二次信号。 例如，当导电结构是具有N齿的格栅时，次级信号将具有在单个正常耿氏二极管振荡周期期间发生的N个次级振荡周期。

    Memory cells
    5.
    发明授权
    Memory cells 有权
    记忆单元

    公开(公告)号：US08759807B2

    公开(公告)日：2014-06-24

    申请号：US13427529

    申请日：2012-03-22

    申请人： Gurtej S. Sandhu ,  Scott E. Sills

    发明人： Gurtej S. Sandhu ,  Scott E. Sills

    IPC分类号： H01L29/00 ,  H01L47/00 ,  H01L29/02 ,  H01L29/04 ,  H01L29/06 ,  H01L47/02

    CPC分类号： H01L45/16 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/04 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148

    摘要： Some embodiments include methods of forming memory cells. An opening is formed over a first conductive structure to expose an upper surface of the first conductive structure. The opening has a bottom level with a bottom width. The opening has a second level over the bottom level, with the second level having a second width which is greater than the bottom width. The bottom level of the opening is filled with a first portion of a multi-portion programmable material, and the second level is lined with the first portion. The lined second level is filled with a second portion of the multi-portion programmable material. A second conductive structure is formed over the second portion. Some embodiments include memory cells.

    摘要翻译： 一些实施例包括形成存储器单元的方法。 在第一导电结构上形成开口以暴露第一导电结构的上表面。 开口具有底部底部宽度。 开口具有超过底部水平的第二水平，其中第二水平具有大于底部宽度的第二宽度。 开口的底部水平填充有多部分可编程材料的第一部分，并且第二层与第一部分相衬。 衬里的第二层被多部分可编程材料的第二部分填充。 在第二部分上形成第二导电结构。 一些实施例包括存储器单元。

    Atomic layer deposition epitaxial silicon growth for TFT flash memory cell
    6.
    发明授权
    Atomic layer deposition epitaxial silicon growth for TFT flash memory cell 有权
    用于TFT闪存单元的原子层沉积外延硅生长

    公开(公告)号：US08415218B2

    公开(公告)日：2013-04-09

    申请号：US12259128

    申请日：2008-10-27

    申请人： Fumitake Mieno

    发明人： Fumitake Mieno

    IPC分类号： H01L21/336 ,  H01L21/20 ,  H01L21/36 ,  H01L21/00 ,  C23C16/24 ,  H01L29/06 ,  H01L47/02 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L29/80 ,  H01L29/76 ,  H01L29/788 ,  H01L21/70

    CPC分类号： H01L21/02381 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/78672

    摘要： A method of growing an epitaxial silicon layer is provided. The method comprising providing a substrate including an oxygen-terminated silicon surface and forming a first hydrogen-terminated silicon surface on the oxygen-terminated silicon surface. Additionally, the method includes forming a second hydrogen-terminated silicon surface on the first hydrogen-terminated silicon surface through atomic-layer deposition (ALD) epitaxy from SiH4 thermal cracking radical assisted by Ar flow and flash lamp annealing continuously. The second hydrogen-terminated silicon surface is capable of being added one or more layer of silicon through ALD epitaxy from SiH4 thermal cracking radical assisted by Ar flow and flash lamp annealing continuously. In one embodiment, the method is applied for making devices with thin-film transistor (TFT) floating gate memory cell structures which is capable for three-dimensional integration.

    摘要翻译： 提供了生长外延硅层的方法。 该方法包括提供包含氧封端的硅表面的衬底，并在氧封端的硅表面上形成第一个氢封端的硅表面。 此外，该方法包括通过原子层沉积（ALD）外延从由Ar流和闪光灯退火辅助的SiH 4热裂解基团连续形成在第一氢封端硅表面上的第二氢封端硅表面。 第二个氢封端的硅表面能够连续地由Ar流和闪光灯退火辅助的SiH 4热裂解基团通过ALD外延添加一层或多层硅。 在一个实施例中，该方法被应用于制造具有能够进行三维集成的薄膜晶体管（TFT）浮动栅极存储单元结构的器件。

    Multi-terminal electrically actuated switch
    8.
    发明授权
    Multi-terminal electrically actuated switch 有权
    多端电动开关

    公开(公告)号：US07763880B2

    公开(公告)日：2010-07-27

    申请号：US11706119

    申请日：2007-02-14

    申请人： R. Stanley Williams

    发明人： R. Stanley Williams

    IPC分类号： H01L47/02

    CPC分类号： H01L45/08 ,  G11C13/0007 ,  G11C13/0009 ,  G11C2213/52 ,  G11C2213/53 ,  G11C2213/56 ,  G11C2213/77 ,  H01L27/2463 ,  H01L45/1206 ,  H01L45/1233 ,  H01L45/14 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H03K17/00

    摘要： A multi-terminal electrically actuated switch comprises a source electrode, a drain electrode, and an active region physically connected to both electrodes. The active region comprises at least one primary active region comprising at least one material that can be doped or undoped to change its electrical conductivity, and a secondary active region comprising at least one material for providing a source/sink of ionic species that act as dopants for the primary active region(s). A gate electrode is physically connected to the source/sink region. Methods of operating the switch are also provided.

    摘要翻译： 多端子电致动开关包括源电极，漏电极和物理连接到两个电极的有源区。 活性区域包括至少一个主要活性区域，其包含至少一种可被掺杂或未掺杂以改变其导电性的材料，以及包含至少一种材料的辅助活性区域，用于提供用作掺杂剂的离子物质的源/ 对于主要活动区域。 栅电极物理连接到源/汇区。 还提供了操作开关的方法。

    GUNN DIODE
    9.
    发明申请
    GUNN DIODE 审中-公开
    枪手二极管

    公开(公告)号：US20100163837A1

    公开(公告)日：2010-07-01

    申请号：US12526534

    申请日：2008-01-31

    申请人： Oktay Yilmazoglu ,  Kabula Mutamba ,  Dimitris Pavlidis ,  Tamer Karduman

    发明人： Oktay Yilmazoglu ,  Kabula Mutamba ,  Dimitris Pavlidis ,  Tamer Karduman

    IPC分类号： H01L47/02

    CPC分类号： H01L47/026

    摘要： A Gunn diode includes an active layer having a top and a bottom, a first contact layer disposed adjacent to the top of the active layer, a second contact layer disposed adjacent to the bottom of the active layer, wherein the first and second contact layers are more heavily doped than the active layer, and at least one outer contact layer disposed at an outer region of at least one of the first and second contact layers, the at least one outer contact layer being more heavily doped than the first and second contact layers, wherein the first and second contact layers, the active layer, and the at least one outer contact layer include a base material that is the same.

    摘要翻译： 耿氏二极管包括具有顶部和底部的有源层，邻近有源层顶部设置的第一接触层，邻近有源层底部设置的第二接触层，其中第一和第二接触层是 比有源层​​更重掺杂，以及至少一个外部接触层，其设置在第一和第二接触层中的至少一个的外部区域处，所述至少一个外部接触层比第一和第二接触层更重掺杂 ，其中所述第一和第二接触层，所述有源层和所述至少一个外部接触层包括相同的基底材料。